Add pin control driver for BCM2712 SoC
Subsystems (5)
v4 cover Add pin control driver for BCM2712 SoC
Hi,
The following patches add a pin control driver for the BCM2712 SoC.
Device driver is follow up version on what Andrea posted in April [1].
It is based on sources from here [2]. Since its first inception, this patchset has undergone heavy rework in order to split the driver in a generic core API useful for several STB pin controller and a specific implementation for BCM2712 SoC found on RaspberryPi 5.
A separate patchset will add peripheral nodes that rely on the SoC pin controller to setup and config the pins.
All this have been tested as kernel was directly booted RPi5 via kernel= config.txt option and cmdline.txt file with following content (Note I am using Tumbleweed RPi raw images)
$ cat /boot/efi/cmdline.txt root=/dev/mmcblk0p3 rootwait rw systemd.show_status=1 console=tty ignore_loglevel earlycon console=ttyAMA10,115200
With all these patches Bluetooth and Wifi are working fine (tm) with firmware files provided by openSUSE Tumbleweed.
All comments and suggestions are welcome!
Happy hacking!
Ivan and Andrea
[1] https://lore.kernel.org/lkml/[email protected]/
[2] https://github.com/raspberrypi/linux/blob/rpi-6.6.y/drivers/pinctrl/bcm/pinctrl-bcm2712.c
[3] https://lore.kernel.org/lkml/[email protected]/#t
[4] https://lore.kernel.org/all/[email protected]/
CHANGES in V4:
--- DT BINDINGS ---
- brcm,bcm2712c0-pinctrl.yaml: added blank lines between paragraphs in descriptions.
- brcm,bcm2712c0-pinctrl.yaml: descriptions are now layout in the same order everywhere.
--- DRIVER ---
- pinctrl-brcmstb.c: this is now the core driver that will manage the generic functions of any STB pin controller. The new pinctrl-brcmstb.h header contains the APIs that can be leveraged by specific implementations. I've applied quite a conservative approach in determining what is generic and what is not. It's easier to specialize some generic code when we need it that the other way around.
- pinctrl-brcmstb.h: new file! Header contains the APIs that can be leveraged by specific implementations.
- pinctrl-brcmstb-bcm2712.c: new file! The custom implementation for BCM2712 SoC. It specifies the pinsi/functions for this chipset and calls the probe function from the core driver. Some values are now set from this file since they are considered chip-specific, e.g. func_mask, func_gpio and func_names.
- PIN macro renamed to BRCMSTB_PIN.
- enum brcmstb_funcs renamed to bcm2712_funcs.
- avoid wrapping some lines above 80 char containing GPIO declarations for the sake of readability.
- renamed the chipset specific structs from brcmst_* to bcm2712_*.
- AGPIO_* renamed to AON_GPIO_* and SGPIO_* to AON_SGPIO_*.
- FUNC macro renamed to BRCMSTB_FUNC.
- brcmstb_reg_rd() and brcmstb_reg_wr() have been inlined, substituted by their inner implementation based on readl/writel.
- spin_lock_* replaced by guards. Asa a result, the flags var definition is dropped.
- implemented .function_is_gpio() in pinmux_ops. As a result, this driver is marked as strict.
- used of_device_get_match_data() directly in place of retrieving it through of_match_node()->data;
- added a comment to better specify the differences between AGPIO and SGPIO.
--- KBUILD ---
- Kconfig.stb: new file! to be included by top level Kconfig to enable the Broadcom STB specific drivers (e.g. BCM2712 pin controller). Enabled only if PINCTRL_BRCMSTB is enabled from top level.
- Kconfig: amended to enable the generic support for Broadcom STB pin controller family. Includes Kconfig.stb.
- Makefile: added pinctrl-brcmstb-bcm2712.o
Andrea della Porta (1):
arm64: defconfig: Enable BCM2712 on-chip pin controller driver
Ivan T. Ivanov (2):
dt-bindings: pinctrl: Add support for Broadcom STB pin controller
pinctrl: bcm: Add STB family pin controller driver
.../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 137 ++++ arch/arm64/configs/defconfig | 2 + drivers/pinctrl/bcm/Kconfig | 12 + drivers/pinctrl/bcm/Kconfig.stb | 10 + drivers/pinctrl/bcm/Makefile | 2 + drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c | 747 ++++++++++++++++++ drivers/pinctrl/bcm/pinctrl-brcmstb.c | 442 +++++++++++ drivers/pinctrl/bcm/pinctrl-brcmstb.h | 93 +++ 8 files changed, 1445 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml create mode 100644 drivers/pinctrl/bcm/Kconfig.stb create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb.c create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb.h
Signature · 1 line
2.35.3
PATCH v4 1/3 dt-bindings: pinctrl: Add support for Broadcom STB pin controller
From: "Ivan T. Ivanov" <[email protected]>
The STB pin controller represents a family whose silicon instances are found e.g. on BCM2712 SoC.
In particular, on RaspberryPi 5, there are two separate instantiations of the same IP block which differ in the number of pins that are associated and the pinmux functions for each of those pins. The -aon- variant stands for 'Always On'.
Depending on the revision of the BCM2712 (CO or D0), the pin controller instance has slight differences in the register layout.
--- .../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 137 ++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file +137 -0
@@ -0,0 +1,137 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm2712c0-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom STB family pin controller + +maintainers: + - Ivan T. Ivanov <[email protected]> + - A. della Porta <[email protected]> + +description: > + Broadcom's STB family of memory-mapped pin controllers. + + This includes the pin controllers inside the BCM2712 SoC which + are instances of the STB family and has two silicon variants, + C0 and D0, which differs slightly in terms of registers layout. + + The -aon- (Always On) variant is the same IP block but differs + in the number of pins that are associated and the pinmux functions + for each of those pins. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - brcm,bcm2712c0-pinctrl + - brcm,bcm2712c0-aon-pinctrl + - brcm,bcm2712d0-pinctrl + - brcm,bcm2712d0-aon-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '-state$': + oneOf: + - $ref: '#/$defs/brcmstb-pinctrl-state' + - patternProperties: + '-pins$': + $ref: '#/$defs/brcmstb-pinctrl-state' + additionalProperties: false + +$defs: + brcmstb-pinctrl-state: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: > + Pin controller client devices use pin configuration subnodes (children + and grandchildren) for desired pin configuration. + + Client device subnodes use below standard properties. + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode (either this or "groups" must be specified). + items: + pattern: '^((aon_)?s?gpio[0-6]?[0-9])|(emmc_(clk|cmd|dat[0-7]|ds))$' + + function: + description: + Specify the alternative function to be configured for the specified + pins. + enum: [ gpio, alt1, alt2, alt3, alt4, alt5, alt6, alt7, alt8, + aon_cpu_standbyb, aon_fp_4sec_resetb, aon_gpclk, aon_pwm, + arm_jtag, aud_fs_clk0, avs_pmu_bsc, bsc_m0, bsc_m1, bsc_m2, + bsc_m3, clk_observe, ctl_hdmi_5v, enet0, enet0_mii, enet0_rgmii, + ext_sc_clk, fl0, fl1, gpclk0, gpclk1, gpclk2, hdmi_tx0_auto_i2c, + hdmi_tx0_bsc, hdmi_tx1_auto_i2c, hdmi_tx1_bsc, i2s_in, i2s_out, + ir_in, mtsif, mtsif_alt, mtsif_alt1, pdm, pkt, pm_led_out, sc0, + sd0, sd2, sd_card_a, sd_card_b, sd_card_c, sd_card_d, sd_card_e, + sd_card_f, sd_card_g, spdif_out, spi_m, spi_s, sr_edm_sense, te0, + te1, tsio, uart0, uart1, uart2, usb_pwr, usb_vbus, uui, vc_i2c0, + vc_i2c3, vc_i2c4, vc_i2c5, vc_i2csl, vc_pcm, vc_pwm0, vc_pwm1, + vc_spi0, vc_spi3, vc_spi4, vc_spi5, vc_uart0, vc_uart2, vc_uart3, + vc_uart4 ] + + bias-disable: true + bias-pull-down: true + bias-pull-up: true + + required: + - pins + + if: + properties: + pins: + not: + contains: + pattern: "^emmc_(clk|cmd|dat[0-7]|ds)$" + then: + required: + - function + else: + properties: + function: false + + additionalProperties: false + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + brcm_pinctrl: pinctrl@7d504100 { + compatible = "brcm,bcm2712c0-pinctrl"; + reg = <0x7d504100 0x30>; + + bt-shutdown-default-state { + function = "gpio"; + pins = "gpio29"; + }; + + uarta-default-state { + rts-tx-pins { + function = "uart0"; + pins = "gpio24", "gpio26"; + bias-disable; + }; + + cts-rx-pins { + function = "uart0"; + pins = "gpio25", "gpio27"; + bias-pull-up; + }; + }; + };
Signature · 1 line
2.35.3
Re: [PATCH v4 1/3] dt-bindings: pinctrl: Add support for Broadcom STB pin controller
Quoted 131 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
The STB pin controller represents a family whose silicon instances are found e.g. on BCM2712 SoC.
In particular, on RaspberryPi 5, there are two separate instantiations of the same IP block which differ in the number of pins that are associated and the pinmux functions for each of those pins. The -aon- variant stands for 'Always On'.
Depending on the revision of the BCM2712 (CO or D0), the pin controller instance has slight differences in the register layout.
Signed-off-by Ivan T. Ivanov <[email protected]>Signed-off-by Andrea della Porta <[email protected]>--- .../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 137 ++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yamlDocumentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file +105
-0@@ -0,0 +1,137 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm2712c0-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom STB family pin controller + +maintainers: + - Ivan T. Ivanov <[email protected]> + - A. della Porta <[email protected]> + +description: > + Broadcom's STB family of memory-mapped pin controllers. + + This includes the pin controllers inside the BCM2712 SoC which + are instances of the STB family and has two silicon variants, + C0 and D0, which differs slightly in terms of registers layout. + + The -aon- (Always On) variant is the same IP block but differs + in the number of pins that are associated and the pinmux functions + for each of those pins. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - brcm,bcm2712c0-pinctrl + - brcm,bcm2712c0-aon-pinctrl + - brcm,bcm2712d0-pinctrl + - brcm,bcm2712d0-aon-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '-state$': + oneOf: + - $ref: '#/$defs/brcmstb-pinctrl-state' + - patternProperties: + '-pins$': + $ref: '#/$defs/brcmstb-pinctrl-state' + additionalProperties: false + +$defs: + brcmstb-pinctrl-state: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: > + Pin controller client devices use pin configuration subnodes (children + and grandchildren) for desired pin configuration. + + Client device subnodes use below standard properties. + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode (either this or "groups" must be specified). + items: + pattern: '^((aon_)?s?gpio[0-6]?[0-9])|(emmc_(clk|cmd|dat[0-7]|ds))$' + + function: + description: + Specify the alternative function to be configured for the specified + pins. + enum: [ gpio, alt1, alt2, alt3, alt4, alt5, alt6, alt7, alt8, + aon_cpu_standbyb, aon_fp_4sec_resetb, aon_gpclk, aon_pwm, + arm_jtag, aud_fs_clk0, avs_pmu_bsc, bsc_m0, bsc_m1, bsc_m2, + bsc_m3, clk_observe, ctl_hdmi_5v, enet0, enet0_mii, enet0_rgmii, + ext_sc_clk, fl0, fl1, gpclk0, gpclk1, gpclk2, hdmi_tx0_auto_i2c, + hdmi_tx0_bsc, hdmi_tx1_auto_i2c, hdmi_tx1_bsc, i2s_in, i2s_out, + ir_in, mtsif, mtsif_alt, mtsif_alt1, pdm, pkt, pm_led_out, sc0, + sd0, sd2, sd_card_a, sd_card_b, sd_card_c, sd_card_d, sd_card_e, + sd_card_f, sd_card_g, spdif_out, spi_m, spi_s, sr_edm_sense, te0, + te1, tsio, uart0, uart1, uart2, usb_pwr, usb_vbus, uui, vc_i2c0, + vc_i2c3, vc_i2c4, vc_i2c5, vc_i2csl, vc_pcm, vc_pwm0, vc_pwm1, + vc_spi0, vc_spi3, vc_spi4, vc_spi5, vc_uart0, vc_uart2, vc_uart3, + vc_uart4 ] + + bias-disable: true + bias-pull-down: true + bias-pull-up: true + + required: + - pins + + if: + properties: + pins: + not: + contains: + pattern: "^emmc_(clk|cmd|dat[0-7]|ds)$" + then: + required: + - function + else: + properties: + function: false + + additionalProperties: false
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml line 115
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file +10
-0+ +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + brcm_pinctrl: pinctrl@7d504100 {
Drop unused label.
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml line 121
Quoted 6 lines
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file +6
-0+ compatible = "brcm,bcm2712c0-pinctrl"; + reg = <0x7d504100 0x30>; + + bt-shutdown-default-state { + function = "gpio"; + pins = "gpio29";
Wrong indentation. With those fixed,
Quoted 19 lines
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file +16
-0+ }; + + uarta-default-state { + rts-tx-pins { + function = "uart0"; + pins = "gpio24", "gpio26"; + bias-disable; + }; + + cts-rx-pins { + function = "uart0"; + pins = "gpio25", "gpio27"; + bias-pull-up; + }; + }; + };Signature · 1 line
2.35.3
Re: [PATCH v4 1/3] dt-bindings: pinctrl: Add support for Broadcom STB pin controller
Hi Rob,
Quoted 17 lines · Rob Herring
Quoted 16 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
The STB pin controller represents a family whose silicon instances are found e.g. on BCM2712 SoC.
In particular, on RaspberryPi 5, there are two separate instantiations of the same IP block which differ in the number of pins that are associated and the pinmux functions for each of those pins. The -aon- variant stands for 'Always On'.
Depending on the revision of the BCM2712 (CO or D0), the pin controller instance has slight differences in the register layout.
Signed-off-by Ivan T. Ivanov <[email protected]>Signed-off-by Andrea della Porta <[email protected]>---
[...]
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml line 115
Quoted 8 lines
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file +8
-0+ - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + brcm_pinctrl: pinctrl@7d504100 {Drop unused label.
Ack.
Quoted 9 lines
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml line 121
Quoted 7 lines
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file +6
-0+ compatible = "brcm,bcm2712c0-pinctrl"; + reg = <0x7d504100 0x30>; + + bt-shutdown-default-state { + function = "gpio"; + pins = "gpio29";Wrong indentation. With those fixed,
Ack.
Many thanks,
Andrea
Quoted 22 lines
Reviewed-by Rob Herring (Arm) <[email protected]>Quoted 19 lines
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file +16
-0+ }; + + uarta-default-state { + rts-tx-pins { + function = "uart0"; + pins = "gpio24", "gpio26"; + bias-disable; + }; + + cts-rx-pins { + function = "uart0"; + pins = "gpio25", "gpio27"; + bias-pull-up; + }; + }; + };Signature · 1 line
2.35.3
Re: [PATCH v4 1/3] dt-bindings: pinctrl: Add support for Broadcom STB pin controller
In reply to Andrea della PortaQuoted 10 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
The STB pin controller represents a family whose silicon instances are found e.g. on BCM2712 SoC.
In particular, on RaspberryPi 5, there are two separate instantiations of the same IP block which differ in the number of pins that are associated and the pinmux functions for each of those pins. The -aon- variant stands for 'Always On'.
Quoted 5 lines
Depending on the revision of the BCM2712 (CO or D0), the pin controller instance has slight differences in the register layout.
Signed-off-by Ivan T. Ivanov <[email protected]>Signed-off-by Andrea della Porta <[email protected]>
Fixed up the extraneous label and whitespace error and applied this patch!
Yours,
Linus Walleij
Re: [PATCH v4 1/3] dt-bindings: pinctrl: Add support for Broadcom STB pin controller
Hi Linus,
Quoted 13 lines · Linus Walleij
Quoted 10 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
The STB pin controller represents a family whose silicon instances are found e.g. on BCM2712 SoC.
In particular, on RaspberryPi 5, there are two separate instantiations of the same IP block which differ in the number of pins that are associated and the pinmux functions for each of those pins. The -aon- variant stands for 'Always On'.
Quoted 8 lines
Quoted 5 lines
Depending on the revision of the BCM2712 (CO or D0), the pin controller instance has slight differences in the register layout.
Signed-off-by Ivan T. Ivanov <[email protected]>Signed-off-by Andrea della Porta <[email protected]>Fixed up the extraneous label and whitespace error and applied this patch!
Thanks for fixing that up!
Regards,
Andrea
Quoted 3 lines
Yours,
Linus Walleij
PATCH v4 2/3 pinctrl: bcm: Add STB family pin controller driver
In reply to Andrea della PortaFrom: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
[1] https://lore.kernel.org/lkml/[email protected]/
--- drivers/pinctrl/bcm/Kconfig | 12 + drivers/pinctrl/bcm/Kconfig.stb | 10 + drivers/pinctrl/bcm/Makefile | 2 + drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c | 747 ++++++++++++++++++ drivers/pinctrl/bcm/pinctrl-brcmstb.c | 442 +++++++++++ drivers/pinctrl/bcm/pinctrl-brcmstb.h | 93 +++ 6 files changed, 1306 insertions(+) create mode 100644 drivers/pinctrl/bcm/Kconfig.stb create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb.c create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb.h
drivers/pinctrl/bcm/Kconfig +12 -0
@@ -106,6 +106,18 @@ config PINCTRL_BCM63268 help Say Y here to enable the Broadcom BCM63268 GPIO driver. +config PINCTRL_BRCMSTB + tristate "Broadcom STB product line pin controller driver" + depends on OF && (ARCH_BRCMSTB || COMPILE_TEST) + select PINMUX + select PINCONF + select GENERIC_PINCONF + help + Enable pin muxing and configuration functionality + for Broadcom STB product line chipsets. + +source "drivers/pinctrl/bcm/Kconfig.stb" + config PINCTRL_IPROC_GPIO bool "Broadcom iProc GPIO (with PINCONF) driver" depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
drivers/pinctrl/bcm/Kconfig.stb new file +10 -0
@@ -0,0 +1,10 @@ +# SPDX-License-Identifier: GPL-2.0-only +if PINCTRL_BRCMSTB + +config PINCTRL_BCM2712 + tristate "BCM2712 SoC pin controller driver" + help + Driver for BCM2712 integrated pin controller, + commonly found on Raspberry Pi 5. + +endif
drivers/pinctrl/bcm/Makefile +2 -0
@@ -11,6 +11,8 @@ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o +obj-$(CONFIG_PINCTRL_BRCMSTB) += pinctrl-brcmstb.o +obj-$(CONFIG_PINCTRL_BCM2712) += pinctrl-brcmstb-bcm2712.o obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o obj-$(CONFIG_PINCTRL_NS) += pinctrl-ns.o
drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c new file +747 -0
747 lines not on this page · raw message
drivers/pinctrl/bcm/pinctrl-brcmstb.c new file +442 -0
442 lines not on this page · raw message
drivers/pinctrl/bcm/pinctrl-brcmstb.h new file +93 -0
93 lines not on this page · raw message
Signature · 1 line
2.35.3
Re: [PATCH v4 2/3] pinctrl: bcm: Add STB family pin controller driver
Quoted 13 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
[1] https://lore.kernel.org/lkml/[email protected]/
Cc Jonathan Bell <[email protected]>Cc Phil Elwell <[email protected]>Signed-off-by Ivan T. Ivanov <[email protected]>Reviewed-by Phil Elwell <[email protected]>Signed-off-by Andrea della Porta <[email protected]>
(...)
Quoted 8 lines
drivers/pinctrl/bcm/pinctrl-brcmstb.c new file +8
-0+static bool brcmstb_pmx_function_is_gpio (struct pinctrl_dev *pctldev, +unsigned int selector) +{ +struct brcmstb_pinctrl *pc =pinctrl_dev_get_drvdata (pctldev); + +return pc->func_gpio == selector; +} +
drivers/pinctrl/bcm/pinctrl-brcmstb.c line 283
Quoted 10 lines
drivers/pinctrl/bcm/pinctrl-brcmstb.c new file +10
-0+static const struct pinmux_ops brcmstb_pmx_ops = { + .free = brcmstb_pmx_free, + .get_functions_count = brcmstb_pmx_get_functions_count, + .get_function_name = brcmstb_pmx_get_function_name, + .get_function_groups = brcmstb_pmx_get_function_groups, + .set_mux = brcmstb_pmx_set, + .gpio_request_enable = brcmstb_pmx_gpio_request_enable, + .gpio_disable_free = brcmstb_pmx_gpio_disable_free, + .function_is_gpio = brcmstb_pmx_function_is_gpio, + .strict = true,
Oh! It's now using .function_is_gpio() and can be charmingly strict!
Better let Bartosz have a look at this and ACK it, I will merge his GPIO function awareness patches first.
Yours,
Linus Walleij
Re: [PATCH v4 2/3] pinctrl: bcm: Add STB family pin controller driver
In reply to Andrea della PortaQuoted 6 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
Quoted 7 lines
[1] https://lore.kernel.org/lkml/[email protected]/
Cc Jonathan Bell <[email protected]>Cc Phil Elwell <[email protected]>Signed-off-by Ivan T. Ivanov <[email protected]>Reviewed-by Phil Elwell <[email protected]>Signed-off-by Andrea della Porta <[email protected]>
Overall this feels merge class, I am looking over the requirement series from Bartosz to see if we can merge it all today.
I also looked in a vendor tree for the (by now 6 years old...) BCMBCA driver, but it appears to be a completely different beast, requiring some magic 0x21 to be written into a register to "commit" a pin control change.
Yours,
Linus Walleij
Re: [PATCH v4 2/3] pinctrl: bcm: Add STB family pin controller driver
Hi Linus,
Quoted 11 lines · Linus Walleij
Quoted 8 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
Quoted 8 lines
Quoted 5 lines
Cc Jonathan Bell <[email protected]>Cc Phil Elwell <[email protected]>Signed-off-by Ivan T. Ivanov <[email protected]>Reviewed-by Phil Elwell <[email protected]>Signed-off-by Andrea della Porta <[email protected]>Overall this feels merge class, I am looking over the requirement series from Bartosz to see if we can merge it all today.
This would be great! Thanks!
Andrea
Quoted 8 lines
I also looked in a vendor tree for the (by now 6 years old...) BCMBCA driver, but it appears to be a completely different beast, requiring some magic
0x21to be written into a register to "commit" a pin control change.Yours,
Linus Walleij
Florian Fainelli
maintainerRe: [PATCH v4 2/3] pinctrl: bcm: Add STB family pin controller driver
In reply to Linus WalleijQuoted 17 lines · Linus Walleij
Quoted 6 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
Quoted 7 lines
[1] https://lore.kernel.org/lkml/[email protected]/
Cc Jonathan Bell <[email protected]>Cc Phil Elwell <[email protected]>Signed-off-by Ivan T. Ivanov <[email protected]>Reviewed-by Phil Elwell <[email protected]>Signed-off-by Andrea della Porta <[email protected]>
Quoted 7 lines
Overall this feels merge class, I am looking over the requirement series from Bartosz to see if we can merge it all today.
I also looked in a vendor tree for the (by now 6 years old...) BCMBCA driver, but it appears to be a completely different beast, requiring some magic
0x21to be written into a register to "commit" a pin control change.
Yeah, the BCA chips have a different controller for pin mux/control.
This driver submitted by Andrea is common to STB and CM product lines, although the CM chips also used the BCA block at some point in their history.
Signature · 1 line
Florian
Re: [PATCH v4 2/3] pinctrl: bcm: Add STB family pin controller driver
In reply to Andrea della PortaQuoted 6 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
Quoted 7 lines
[1] https://lore.kernel.org/lkml/[email protected]/
Cc Jonathan Bell <[email protected]>Cc Phil Elwell <[email protected]>Signed-off-by Ivan T. Ivanov <[email protected]>Reviewed-by Phil Elwell <[email protected]>Signed-off-by Andrea della Porta <[email protected]>
Patch applied!
drivers/pinctrl/bcm/Kconfig config PINCTRL_BCM63268 · line 111
Quoted 3 lines
drivers/pinctrl/bcm/Kconfig +3
-0+config PINCTRL_BRCMSTB + tristate "Broadcom STB product line pin controller driver" + depends on OF && (ARCH_BRCMSTB || COMPILE_TEST)
I changed this to (ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST) because Peter Robinson told me the Pi5 needs this driver too. See commit 1d99f92f71b6b4b2eee776562c991428490f71ef for details.
Yours,
Linus Walleij
Florian Fainelli
maintainerRe: [PATCH v4 2/3] pinctrl: bcm: Add STB family pin controller driver
Quoted 19 lines · Linus Walleij
Quoted 6 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
Quoted 7 lines
[1] https://lore.kernel.org/lkml/[email protected]/
Cc Jonathan Bell <[email protected]>Cc Phil Elwell <[email protected]>Signed-off-by Ivan T. Ivanov <[email protected]>Reviewed-by Phil Elwell <[email protected]>Signed-off-by Andrea della Porta <[email protected]>Patch applied!
Quoted 7 lines
drivers/pinctrl/bcm/Kconfig config PINCTRL_BCM63268 · line 111
Quoted 3 lines
drivers/pinctrl/bcm/Kconfig +3
-0+config PINCTRL_BRCMSTB + tristate "Broadcom STB product line pin controller driver" + depends on OF && (ARCH_BRCMSTB || COMPILE_TEST)I changed this to (
ARCH_BCM2835||ARCH_BRCMSTB||COMPILE_TEST) because Peter Robinson told me the Pi5 needs this driver too. See commit1d99f92f71b6b4b2eee776562c991428490f71effor details.
Good call, thanks!
Signature · 1 line
Florian
Re: [PATCH v4 2/3] pinctrl: bcm: Add STB family pin controller driver
In reply to Linus WalleijHi Linus,
Quoted 19 lines · Linus Walleij
Quoted 6 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
Quoted 7 lines
[1] https://lore.kernel.org/lkml/[email protected]/
Cc Jonathan Bell <[email protected]>Cc Phil Elwell <[email protected]>Signed-off-by Ivan T. Ivanov <[email protected]>Reviewed-by Phil Elwell <[email protected]>Signed-off-by Andrea della Porta <[email protected]>Patch applied!
Quoted 7 lines
drivers/pinctrl/bcm/Kconfig config PINCTRL_BCM63268 · line 111
Quoted 3 lines
drivers/pinctrl/bcm/Kconfig +3
-0+config PINCTRL_BRCMSTB + tristate "Broadcom STB product line pin controller driver" + depends on OF && (ARCH_BRCMSTB || COMPILE_TEST)I changed this to (
ARCH_BCM2835||ARCH_BRCMSTB||COMPILE_TEST) because Peter Robinson told me the Pi5 needs this driver too. See commit1d99f92f71b6b4b2eee776562c991428490f71effor details.
Indeed, thanks for spotting this!
Cheers,
Andrea
Quoted 3 lines
Yours,
Linus Walleij
Re: [PATCH v4 2/3] pinctrl: bcm: Add STB family pin controller driver
Hey Andrea,
Quoted 24 lines · Linus Walleij
Quoted 23 lines
Quoted 6 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
Quoted 7 lines
[1] https://lore.kernel.org/lkml/[email protected]/
Cc Jonathan Bell <[email protected]>Cc Phil Elwell <[email protected]>Signed-off-by Ivan T. Ivanov <[email protected]>Reviewed-by Phil Elwell <[email protected]>Signed-off-by Andrea della Porta <[email protected]>Patch applied!
Quoted 3 lines
drivers/pinctrl/bcm/Kconfig +3
-0+config PINCTRL_BRCMSTB + tristate "Broadcom STB product line pin controller driver" + depends on OF && (ARCH_BRCMSTB || COMPILE_TEST)
Quoted 5 lines
Quoted 3 lines
I changed this to (
ARCH_BCM2835||ARCH_BRCMSTB||COMPILE_TEST) because Peter Robinson told me the Pi5 needs this driver too. See commit1d99f92f71b6b4b2eee776562c991428490f71effor details.Indeed, thanks for spotting this!
I've been testing this, and other associated patches, with Fedora (feel free to cc: me on any patches too) and I'm seeing the following crash on the 2Gb model, someone else reported to me they see it on their 16gb, I'm assuming there's some issue/nuance in the d0 rev of the SoC that causes issues. Wondering if you've done any testing with the newer SoC rev or know of any issues there?
Peter
[ 56.289183] SError Interrupt on CPU3, code 0x00000000be000011 -- SError [ 56.289194] CPU: 3 UID: 0 PID: 341 Comm: (udev-worker) Tainted: G M ------ --- 6.17.0-0.rc4.36.pr3.fc43.aarch64 #1 PREEMPT(voluntary) [ 56.289200] Tainted: [M]=MACHINE_CHECK [ 56.289201] Hardware name: raspberrypi Raspberry Pi 5 Model B Rev 1.0/Raspberry Pi 5 Model B Rev 1.0, BIOS 2025.04 04/01/2025 [ 56.289204] pstate: 804000c9 (Nzcv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 56.289208] pc : brcmstb_pull_config_set+0x5c/0xd8 [ 56.289216] lr : brcmstb_pull_config_set+0x44/0xd8 [ 56.289220] sp : ffff800080663500 [ 56.289221] x29: ffff800080663500 x28: ffffbcba6aaab480 x27: 0000000000000370 [ 56.289227] x26: 0000ffffa9554298 x25: ffffbcbad6ad2360 x24: ffff000000776240 [ 56.289231] x23: ffff0000011352b8 x22: ffff000002a16080 x21: 0000000000000014 [ 56.289235] x20: 0000000000000118 x19: ffff000002a16080 x18: 00000000fffffffc [ 56.289239] x17: ffff0000010f1180 x16: ffffbcbad419c418 x15: 000000000000000a [ 56.289243] x14: ffffffffffffffff x13: 0000000000000001 x12: 0000000000000000 [ 56.289247] x11: 0000000000000040 x10: 0000000000000000 x9 : ffffbcbad3dda6d4 [ 56.289251] x8 : 0000000000000014 x7 : 0000000000000000 x6 : ffffbcbad3dda768 [ 56.289254] x5 : ffff00000204f480 x4 : 0000000000000020 x3 : 0000000000000000 [ 56.289258] x2 : 0000000000000001 x1 : 0000000000000000 x0 : 0000000000000000 [ 56.289262] Kernel panic - not syncing: Asynchronous SError Interrupt [ 56.422659] CPU: 3 UID: 0 PID: 341 Comm: (udev-worker) Tainted: G M ------ --- 6.17.0-0.rc4.36.pr3.fc43.aarch64 #1 PREEMPT(voluntary) [ 56.436367] Tainted: [M]=MACHINE_CHECK [ 56.440123] Hardware name: raspberrypi Raspberry Pi 5 Model B Rev 1.0/Raspberry Pi 5 Model B Rev 1.0, BIOS 2025.04 04/01/2025 [ 56.451472] Call trace: [ 56.453919] show_stack+0x30/0x90 (C) [ 56.457595] dump_stack_lvl+0x7c/0xa0 [ 56.461268] dump_stack+0x18/0x2c [ 56.464590] vpanic+0x140/0x338 [ 56.467737] panic+0x68/0x70 [ 56.470622] nmi_panic+0x90/0xa0 [ 56.473859] arm64_serror_panic+0x78/0x90 [ 56.477878] arm64_is_fatal_ras_serror+0x90/0x98 [ 56.482509] do_serror+0x38/0x60 [ 56.485742] el1h_64_error_handler+0x38/0x60 [ 56.490026] el1h_64_error+0x84/0x88 [ 56.493609] brcmstb_pull_config_set+0x5c/0xd8 (P) [ 56.498416] brcmstb_pinconf_set+0xbc/0xe8 [ 56.502523] pinconf_apply_setting+0xc4/0x148 [ 56.506893] pinctrl_commit_state+0x124/0x240 [ 56.511262] pinctrl_select_state+0x24/0x40 [ 56.515456] pinctrl_bind_pins+0x1ec/0x280 [ 56.519565] really_probe+0x60/0x3a0 [ 56.523150] __driver_probe_device+0x84/0x160 [ 56.527520] driver_probe_device+0x48/0x130 [ 56.531716] __driver_attach+0xd0/0x1f8 [ 56.535560] bus_for_each_dev+0x84/0x100 [ 56.539494] driver_attach+0x2c/0x40 [ 56.543078] bus_add_driver+0x158/0x280 [ 56.546924] driver_register+0x70/0x138 [ 56.550769] __platform_driver_register+0x28/0x40 [ 56.555487] gpio_keys_init+0x28/0xff8 [gpio_keys] [ 56.560296] do_one_initcall+0x5c/0x318 [ 56.564143] do_init_module+0x9c/0x2b8 [ 56.567903] load_module+0x7e0/0x998 [ 56.571486] init_module_from_file+0x90/0xf0 [ 56.575769] __arm64_sys_finit_module+0x270/0x380 [ 56.580488] invoke_syscall.constprop.0+0x64/0xe8 [ 56.585208] el0_svc_common.constprop.0+0xc0/0xe8 [ 56.589927] do_el0_svc+0x24/0x38 [ 56.593250] el0_svc+0x3c/0x168 [ 56.596398] el0t_64_sync_handler+0xa0/0xf0 [ 56.600593] el0t_64_sync+0x1b0/0x1b8 [ 56.604264] SMP: stopping secondary CPUs [ 56.608198] Kernel Offset: 0x3cba532a0000 from 0xffff800080000000 [ 56.614310] PHYS_OFFSET: 0x0 [ 56.617194] CPU features: 0x080000,00017000,24023140,0401720b [ 56.622958] Memory Limit: none [ 56.626147] ---[ end Kernel panic - not syncing: Asynchronous
SError Interrupt ]---
Re: [PATCH v4 2/3] pinctrl: bcm: Add STB family pin controller driver
Hi Peter,
Quoted 30 lines · Peter Robinson
Hey Andrea,
Quoted 28 lines · Linus Walleij
Quoted 26 lines
Quoted 6 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
Quoted 7 lines
[1] https://lore.kernel.org/lkml/[email protected]/
Cc Jonathan Bell <[email protected]>Cc Phil Elwell <[email protected]>Signed-off-by Ivan T. Ivanov <[email protected]>Reviewed-by Phil Elwell <[email protected]>Signed-off-by Andrea della Porta <[email protected]>Patch applied!
drivers/pinctrl/bcm/Kconfig config PINCTRL_BCM63268 · line 111
Quoted 3 lines
drivers/pinctrl/bcm/Kconfig +3
-0+config PINCTRL_BRCMSTB + tristate "Broadcom STB product line pin controller driver" + depends on OF && (ARCH_BRCMSTB || COMPILE_TEST)I changed this to (
ARCH_BCM2835||ARCH_BRCMSTB||COMPILE_TEST) because Peter Robinson told me the Pi5 needs this driver too. See commit1d99f92f71b6b4b2eee776562c991428490f71effor details.
Quoted 8 lines
Quoted 1 line
Indeed, thanks for spotting this!
I've been testing this, and other associated patches, with Fedora (feel free to cc: me on any patches too) and I'm seeing the following crash on the 2Gb model, someone else reported to me they see it on their 16gb, I'm assuming there's some issue/nuance in the d0 rev of the SoC that causes issues. Wondering if you've done any testing with the newer SoC rev or know of any issues there?
I think you have to substitute 'd0' in place of 'c0' in bcm2712.dtsi:
s/brcm,bcm2712c0-aon-pinctrl/brcm,bcm2712d0-aon-pinctrl/ s/brcm,bcm2712c0-pinctrl/brcm,bcm2712d0-pinctrl/
that is, the compatible for the two SoC pin controller.
Which reminds me that we need to add this to the DTS specific for D0 silicon, I'll work on that asap.
Many thanks,
Andrea
Quoted 77 lines
Peter
[ 56.289183] SError Interrupt on CPU3, code 0x00000000be000011 -- SError [ 56.289194] CPU: 3 UID: 0 PID: 341 Comm: (udev-worker) Tainted: G M ------ --- 6.17.0-0.rc4.36.pr3.fc43.aarch64 #1 PREEMPT(voluntary) [ 56.289200] Tainted: [M]=MACHINE_CHECK [ 56.289201] Hardware name: raspberrypi Raspberry Pi 5 Model B Rev 1.0/Raspberry Pi 5 Model B Rev 1.0, BIOS 2025.04 04/01/2025 [ 56.289204] pstate: 804000c9 (Nzcv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 56.289208] pc : brcmstb_pull_config_set+0x5c/0xd8 [ 56.289216] lr : brcmstb_pull_config_set+0x44/0xd8 [ 56.289220] sp : ffff800080663500 [ 56.289221] x29: ffff800080663500 x28: ffffbcba6aaab480 x27: 0000000000000370 [ 56.289227] x26: 0000ffffa9554298 x25: ffffbcbad6ad2360 x24: ffff000000776240 [ 56.289231] x23: ffff0000011352b8 x22: ffff000002a16080 x21: 0000000000000014 [ 56.289235] x20: 0000000000000118 x19: ffff000002a16080 x18: 00000000fffffffc [ 56.289239] x17: ffff0000010f1180 x16: ffffbcbad419c418 x15: 000000000000000a [ 56.289243] x14: ffffffffffffffff x13: 0000000000000001 x12: 0000000000000000 [ 56.289247] x11: 0000000000000040 x10: 0000000000000000 x9 : ffffbcbad3dda6d4 [ 56.289251] x8 : 0000000000000014 x7 : 0000000000000000 x6 : ffffbcbad3dda768 [ 56.289254] x5 : ffff00000204f480 x4 : 0000000000000020 x3 : 0000000000000000 [ 56.289258] x2 : 0000000000000001 x1 : 0000000000000000 x0 : 0000000000000000 [ 56.289262] Kernel panic - not syncing: Asynchronous SError Interrupt [ 56.422659] CPU: 3 UID: 0 PID: 341 Comm: (udev-worker) Tainted: G M ------ --- 6.17.0-0.rc4.36.pr3.fc43.aarch64 #1 PREEMPT(voluntary) [ 56.436367] Tainted: [M]=MACHINE_CHECK [ 56.440123] Hardware name: raspberrypi Raspberry Pi 5 Model B Rev 1.0/Raspberry Pi 5 Model B Rev 1.0, BIOS 2025.04 04/01/2025 [ 56.451472] Call trace: [ 56.453919] show_stack+0x30/0x90 (C) [ 56.457595] dump_stack_lvl+0x7c/0xa0 [ 56.461268] dump_stack+0x18/0x2c [ 56.464590] vpanic+0x140/0x338 [ 56.467737] panic+0x68/0x70 [ 56.470622] nmi_panic+0x90/0xa0 [ 56.473859] arm64_serror_panic+0x78/0x90 [ 56.477878] arm64_is_fatal_ras_serror+0x90/0x98 [ 56.482509] do_serror+0x38/0x60 [ 56.485742] el1h_64_error_handler+0x38/0x60 [ 56.490026] el1h_64_error+0x84/0x88 [ 56.493609] brcmstb_pull_config_set+0x5c/0xd8 (P) [ 56.498416] brcmstb_pinconf_set+0xbc/0xe8 [ 56.502523] pinconf_apply_setting+0xc4/0x148 [ 56.506893] pinctrl_commit_state+0x124/0x240 [ 56.511262] pinctrl_select_state+0x24/0x40 [ 56.515456] pinctrl_bind_pins+0x1ec/0x280 [ 56.519565] really_probe+0x60/0x3a0 [ 56.523150] __driver_probe_device+0x84/0x160 [ 56.527520] driver_probe_device+0x48/0x130 [ 56.531716] __driver_attach+0xd0/0x1f8 [ 56.535560] bus_for_each_dev+0x84/0x100 [ 56.539494] driver_attach+0x2c/0x40 [ 56.543078] bus_add_driver+0x158/0x280 [ 56.546924] driver_register+0x70/0x138 [ 56.550769] __platform_driver_register+0x28/0x40 [ 56.555487] gpio_keys_init+0x28/0xff8 [gpio_keys] [ 56.560296] do_one_initcall+0x5c/0x318 [ 56.564143] do_init_module+0x9c/0x2b8 [ 56.567903] load_module+0x7e0/0x998 [ 56.571486] init_module_from_file+0x90/0xf0 [ 56.575769] __arm64_sys_finit_module+0x270/0x380 [ 56.580488] invoke_syscall.constprop.0+0x64/0xe8 [ 56.585208] el0_svc_common.constprop.0+0xc0/0xe8 [ 56.589927] do_el0_svc+0x24/0x38 [ 56.593250] el0_svc+0x3c/0x168 [ 56.596398] el0t_64_sync_handler+0xa0/0xf0 [ 56.600593] el0t_64_sync+0x1b0/0x1b8 [ 56.604264] SMP: stopping secondary CPUs [ 56.608198] Kernel Offset: 0x3cba532a0000 from 0xffff800080000000 [ 56.614310] PHYS_OFFSET: 0x0 [ 56.617194] CPU features: 0x080000,00017000,24023140,0401720b [ 56.622958] Memory Limit: none [ 56.626147] ---[ end Kernel panic - not syncing: AsynchronousSError Interrupt ]---
PATCH v4 3/3 arm64: defconfig: Enable BCM2712 on-chip pin controller driver
In reply to Andrea della PortaSelect the on-chip pin controller driver for BCM2712 SoC.
On RapsberryPi 5 devices it is primarily needed to operate the bluetooth and WiFi devices, to configure the uSD interface and the power button.
--- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+)
arch/arm64/configs/defconfig +2 -0
@@ -592,6 +592,8 @@ CONFIG_SPI_TEGRA114=m CONFIG_SPI_SPIDEV=m CONFIG_SPMI=y CONFIG_SPMI_MTK_PMIF=m +CONFIG_PINCTRL_BRCMSTB=y +CONFIG_PINCTRL_BCM2712=y CONFIG_PINCTRL_DA9062=m CONFIG_PINCTRL_MAX77620=y CONFIG_PINCTRL_RK805=m
Signature · 1 line
2.35.3
Florian Fainelli
maintainerRe: [PATCH v4 3/3] arm64: defconfig: Enable BCM2712 on-chip pin controller driver
Quoted 16 lines · Andrea della Porta
Select the on-chip pin controller driver for BCM2712 SoC.
On RapsberryPi 5 devices it is primarily needed to operate the bluetooth and WiFi devices, to configure the uSD interface and the power button.
Signed-off-by Andrea della Porta <[email protected]>--- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+)arch/arm64/configs/defconfig +0
-0
arch/arm64/configs/defconfig CONFIG_SPI_TEGRA114=m · line 596
Quoted 5 lines
arch/arm64/configs/defconfig +2
-0@@ -592,6 +592,8 @@ CONFIG_SPI_TEGRA114=m CONFIG_SPI_SPIDEV=m CONFIG_SPMI=y CONFIG_SPMI_MTK_PMIF=m +CONFIG_PINCTRL_BRCMSTB=y +CONFIG_PINCTRL_BCM2712=y
Do those need to be built-in or does it work good enough if you have them as loadable modules?
Signature · 1 line
Florian
Re: [PATCH v4 3/3] arm64: defconfig: Enable BCM2712 on-chip pin controller driver
Hi Florian,
Quoted 12 lines · Florian Fainelli
Quoted 11 lines · Andrea della Porta
Select the on-chip pin controller driver for BCM2712 SoC.
On RapsberryPi 5 devices it is primarily needed to operate the bluetooth and WiFi devices, to configure the uSD interface and the power button.
Signed-off-by Andrea della Porta <[email protected]>--- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+)
Quoted 13 lines
arch/arm64/configs/defconfig CONFIG_SPI_TEGRA114=m · line 596
Quoted 10 lines
arch/arm64/configs/defconfig +2
-0@@ -592,6 +592,8 @@ CONFIG_SPI_TEGRA114=m CONFIG_SPI_SPIDEV=m CONFIG_SPMI=y CONFIG_SPMI_MTK_PMIF=m +CONFIG_PINCTRL_BRCMSTB=y +CONFIG_PINCTRL_BCM2712=yDo those need to be built-in or does it work good enough if you have them as loadable modules?
They do work reasonably well as modules too, but you need to add them to initrd, the reason being that this patch [1] is referencing the pinctrl driver from the SD card node so you need them early or you won't be able to boot from SD.
Also, since many other nodes will reference the SoC pin controller, I would expect some minor latency due to deferred probe, so keeping them as built-in could bring some performance benefit.
A minor note: skimming through defconfig it seems that most pinctrl drivers are built-ins, so I would stick to that too.
Many thanks,
Andrea
Links
Quoted 2 lines
Signature · 1 line
Florian
Re: [PATCH v4 3/3] arm64: defconfig: Enable BCM2712 on-chip pin controller driver
In reply to Andrea della PortaQuoted 7 lines · Andrea della Porta
Select the on-chip pin controller driver for BCM2712 SoC.
On RapsberryPi 5 devices it is primarily needed to operate the bluetooth and WiFi devices, to configure the uSD interface and the power button.
Signed-off-by Andrea della Porta <[email protected]>
Applied to defconfig-arm64/next, thanks Andrea.
Signature · 1 line
Florian
Quoted 1 line · Andrea della Porta
The following patches add a pin control driver for the BCM2712 SoC.
I have merged the prerequisites providing .function_is_gpio(), do you want to do any last minute changes or shall I just apply the v4 version and fix up anything minor in the process?
Yours,
Linus Walleij
Hi Linus,
Quoted 8 lines · Linus Walleij
Quoted 1 line · Andrea della Porta
The following patches add a pin control driver for the BCM2712 SoC.
I have merged the prerequisites providing .function_is_gpio(), do you want to do any last minute changes or shall I just apply the v4 version and fix up anything minor in the process?
No further changes from my side, please go ahead with V4.
Many thanks,
Andrea
Quoted 3 lines
Yours,
Linus Walleij
Linus Walleij
AppliedQuoted 11 lines · Andrea della Porta
Quoted 8 lines · Linus Walleij
Quoted 1 line · Andrea della Porta
The following patches add a pin control driver for the BCM2712 SoC.
I have merged the prerequisites providing .function_is_gpio(), do you want to do any last minute changes or shall I just apply the v4 version and fix up anything minor in the process?
No further changes from my side, please go ahead with V4.
I applied patches 1 & 2 now, please apply patch 3 to the BCM SoC tree (Florian handles this I guess?)
Yours,
Linus Walleij