Forcibly enable some MISC_ENABLE features on Intel
v2 cover Forcibly enable some MISC_ENABLE features on Intel
Intel allows BIOS or the OS to enable or disable some CPU fueatures via IA32_MISC_ENABLE. I have machines that don't enable fast strings or monitor/mwait in BIOS, so do it on bootup instead.
The Intel SDM volume 3, appendix B.1 says that the OS should not touch the monitor enable bit if SSE3 is not present, which presumably means that the OS may touch that bit if SSE3 is present. In any case, these patches seem to work.
Changes from v1:
- Display FW_WARN messages.
- Don't change the kmemcheck message.
- Improve the fast string comment.
- Improve the changelogs.
Andy Lutomirski (2):
x86: Enable fast strings on Intel if BIOS hasn't already
x86: Enable monitor/mwait on Intel if BIOS hasn't already
arch/x86/kernel/cpu/intel.c | 50 ++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 47 insertions(+), 3 deletions(-)
Signature · 1 line
1.7.6
PATCH v2 1/2 x86: Enable fast strings on Intel if BIOS hasn't already
Intel SDM volume 3A, 8.4.2 says:
Software can disable fast-string operation by clearing the fast-string-enable bit (bit 0) of IA32_MISC_ENABLE MSR. However, Intel recomments that system software always enable fast-string operation.
The Intel DQ67SW board (with latest BIOS) disables fast string operations if TXT is enabled. A Lenovo X220 disables it regardless of TXT setting. I doubt I'm the only person with a dumb BIOS like this.
--- arch/x86/kernel/cpu/intel.c | 25 ++++++++++++++++++++++--- 1 files changed, 22 insertions(+), 3 deletions(-)
arch/x86/kernel/cpu/intel.c +22 -3
@@ -30,6 +30,7 @@static void __cpuinit early_init_intel (struct cpuinfo_x86 *c) {u64 misc_enable; +bool allow_fast_string = true;/* Unmask CPUID levels if masked: */ if (c->x86 >6 || (c->x86 ==6 && c->x86_model >=0xd )) {
@@ -118,8 +119,9 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)* (model 2) with the same problem. */ if (c->x86 ==15 ) { -rdmsrl (MSR_IA32_MISC_ENABLE , misc_enable); + allow_fast_string = false; +rdmsrl (MSR_IA32_MISC_ENABLE , misc_enable);if (misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING ) {printk (KERN_INFO "kmemcheck: Disabling fast string operations\n" );
@@ -130,11 +132,28 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)#endif /* -* If fast string is not enabled in IA32_MISC_ENABLE for any reason, -* clear the fast string and enhanced fast string CPU capabilities. +* If BIOS didn't enable fast string operation, try to enable +* it ourselves. If that fails, then clear the fast string +* and enhanced fast string CPU capabilities. */ if (c->x86 >6 || (c->x86 ==6 && c->x86_model >=0xd )) {rdmsrl (MSR_IA32_MISC_ENABLE , misc_enable); + +if (allow_fast_string && + !(misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING )) { + misc_enable |=MSR_IA32_MISC_ENABLE_FAST_STRING ; +wrmsr_safe (MSR_IA32_MISC_ENABLE , (u32 )misc_enable, + (u32)(misc_enable >>32 )); + +/* Re-read to make sure it stuck. */ +rdmsrl (MSR_IA32_MISC_ENABLE , misc_enable); + +if (misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING ) + printk(KERN_WARNING FW_WARN "CPU #%d: " +"IA32_MISC_ENABLE.FAST_STRING_ENABLE " +"was not set" , c->cpu_index); + } +if (!(misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING )) {printk (KERN_INFO "Disabled fast string operations\n" );setup_clear_cpu_cap (X86_FEATURE_REP_GOOD );
Signature · 1 line
1.7.6
RE: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't already
Quoted 70 lines
-----Original Message-----
From: Andy Lutomirski [mailto:[email protected]]
Sent: Saturday, August 06, 2011 4:43 AM
To: [email protected]; [email protected]
Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux- [email protected]; Ingo Molnar; Andy Lutomirski
Subject: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyIntel SDM volume 3A, 8.4.2 says:
Software can disable fast-string operation by clearing the fast-string-enable bit (bit 0) of
IA32_MISC_ENABLEMSR. However, Intel recomments that system software always enable fast-string operation.The Intel DQ67SW board (with latest BIOS) disables fast string operations if TXT is enabled. A Lenovo X220 disables it regardless of TXT setting. I doubt I'm the only person with a dumb BIOS like this.
Signed-off-by Andy Lutomirski <[email protected]>--- arch/x86/kernel/cpu/intel.c | 25 ++++++++++++++++++++++--- 1 files changed, 22 insertions(+), 3 deletions(-)arch/x86/kernel/cpu/intel.c +3
-1@@ -30,6 +30,7 @@static void __cpuinit early_init_intel (struct cpuinfo_x86 *c) {u64 misc_enable; +bool allow_fast_string = true;/* Unmask CPUID levels if masked: */ if (c->x86 >6 || (c->x86 ==6 && c->x86_model >=0xd )) {@@ -118,8 +119,9 @@ static void __cpuinit early_init_intel(structcpuinfo_x86 *c) * (model 2) with the same problem. */ if (c->x86 == 15) { - rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + allow_fast_string = false; + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) { printk(KERN_INFO "kmemcheck: Disabling fast stringoperations\n");
arch/x86/kernel/cpu/intel.c +0
-2@@ -130,11 +132,28 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)#endif /* -* If fast string is not enabled in IA32_MISC_ENABLE for any reason, -* clear the fast string and enhanced fast string CPU capabilities.
arch/x86/kernel/cpu/intel.c +7
-0+* If BIOS didn't enable fast string operation, try to enable +* it ourselves. If that fails, then clear the fast string +* and enhanced fast string CPU capabilities. */ if (c->x86 >6 || (c->x86 ==6 && c->x86_model >=0xd )) {rdmsrl (MSR_IA32_MISC_ENABLE , misc_enable); + +if (allow_fast_string && + !(misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING )) { + misc_enable |=MSR_IA32_MISC_ENABLE_FAST_STRING ;
arch/x86/kernel/cpu/intel.c static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) · line 154
Quoted 10 lines
arch/x86/kernel/cpu/intel.c +10
-0+wrmsr_safe (MSR_IA32_MISC_ENABLE , (u32 )misc_enable, + (u32)(misc_enable >>32 )); + +/* Re-read to make sure it stuck. */ +rdmsrl (MSR_IA32_MISC_ENABLE , misc_enable); + +if (misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING ) + printk(KERN_WARNING FW_WARN "CPU #%d: " +"IA32_MISC_ENABLE.FAST_STRING_ENABLE " +"was not set" , c->cpu_index);
This printk is redundant because the same info is dumped in the below printk. Plus it's not firmware's issue if we can not set fast string bit 0 in MISC_ENABLE register. So I don't think FW_WARN is right.
I would suggest to remove this printk (and the if () statement) and change KERN_INFO to KERN_WARNING in the following printk.
Quoted 8 lines
arch/x86/kernel/cpu/intel.c +2
-0+ } + if (!(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) { printk(KERN_INFO "Disabled fast stringoperations\n");
setup_clear_cpu_cap(X86_FEATURE_REP_GOOD);
--
1.7.6
Re: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't already
Quoted 73 lines · Fenghua
Quoted 73 lines
-----Original Message-----
From: Andy Lutomirski [mailto:[email protected]]
Sent: Saturday, August 06, 2011 4:43 AM
To: [email protected]; [email protected]
Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux- [email protected]; Ingo Molnar; Andy Lutomirski
Subject: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyIntel SDM volume 3A, 8.4.2 says:
Software can disable fast-string operation by clearing the fast-string-enable bit (bit 0) of
IA32_MISC_ENABLEMSR. However, Intel recomments that system software always enable fast-string operation.The Intel DQ67SW board (with latest BIOS) disables fast string operations if TXT is enabled. A Lenovo X220 disables it regardless of TXT setting. I doubt I'm the only person with a dumb BIOS like this.
Signed-off-by Andy Lutomirski <[email protected]>---
arch/x86/kernel/cpu/intel.c | 25 ++++++++++++++++++++++---1 files changed, 22 insertions(+), 3 deletions(-)arch/x86/kernel/cpu/intel.c +3
-1@@ -30,6 +30,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) { u64 misc_enable; + bool allow_fast_string = true; /* Unmask CPUID levels if masked: */ if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {@@ -118,8 +119,9 @@ static void __cpuinit early_init_intel(structcpuinfo_x86 *c) * (model 2) with the same problem. */ if (c->x86 == 15) { - rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + allow_fast_string = false; + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) {
printk(KERN_INFO "kmemcheck: Disabling fast string operations\n");arch/x86/kernel/cpu/intel.c +0
-2@@ -130,11 +132,28 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) #endif /* -* If fast string is not enabled in IA32_MISC_ENABLE for any reason, -* clear the fast string and enhanced fast string CPU capabilities.
+ * If BIOS didn't enable fast string operation, try to enable
+ * it ourselves. If that fails, then clear the fast string
+ * and enhanced fast string CPU capabilities.
*/
if (c->x86> 6 || (c->x86== 6 &&c->x86_model>=0xd)) {rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);arch/x86/kernel/cpu/intel.c +7
-0+ + if (allow_fast_string && + !(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) { + misc_enable |= MSR_IA32_MISC_ENABLE_FAST_STRING; + wrmsr_safe(MSR_IA32_MISC_ENABLE, (u32)misc_enable, + (u32)(misc_enable >> 32)); +
Quoted 8 lines
Quoted 7 lines
+ /* Re-read to make sure it stuck. */
+rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); +
+ if (misc_enable&MSR_IA32_MISC_ENABLE_FAST_STRING)
+ printk(KERN_WARNINGFW_WARN"CPU #%d: "
+ "IA32_MISC_ENABLE.FAST_STRING_ENABLE "
+ "was not set",c->cpu_index);This printk is redundant because the same info is dumped in the below printk. Plus it's not firmware's issue if we can not set fast string bit 0 in
MISC_ENABLEregister. So I don't thinkFW_WARNis right.
Huh? This is the success path -- the patch prints the warning if flipping the bit worked...
Quoted 9 lines
I would suggest to remove this printk (and the if () statement) and change
KERN_INFOtoKERN_WARNINGin the following printk.Quoted 6 lines
+ }
+
if (!(misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING)) {printk(KERN_INFO "Disabled fast string operations\n");
setup_clear_cpu_cap(X86_FEATURE_REP_GOOD);
...and this (which could be more clear) is displayed if flipping the bit did not work, in which case the problem isn't BIOS's fault.
--Andy
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RE: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't already
Quoted 98 lines
-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf Of Andrew Lutomirski
Sent: Saturday, August 06, 2011 4:32 PM
To: Yu, Fenghua
Cc: [email protected]; [email protected]; Matthew Garrett; Len Brown; [email protected]; Ingo Molnar
Subject: Re: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyQuoted 21 lines · Fenghua
Quoted 21 lines
-----Original Message-----
From: Andy Lutomirski [mailto:[email protected]]
Sent: Saturday, August 06, 2011 4:43 AM
To: [email protected]; [email protected]
Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux- [email protected]; Ingo Molnar; Andy Lutomirski
Subject: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyIntel SDM volume 3A, 8.4.2 says:
Software can disable fast-string operation by clearing the fast-string-enable bit (bit 0) of
IA32_MISC_ENABLEMSR. However, Intel recomments that system software always enable fast-string operation.The Intel DQ67SW board (with latest BIOS) disables fast string operations if TXT is enabled. A Lenovo X220 disables it regardless of TXT setting. I doubt I'm the only person with a dumb BIOS like this.
Quoted 6 lines
Review
Quoted 6 lines
Signed-off-by Andy Lutomirski <[email protected]>---
arch/x86/kernel/cpu/intel.c | 25 ++++++++++++++++++++++---1 files changed, 22 insertions(+), 3 deletions(-)(quoted diff) +0
-0
b/arch/x86/kernel/cpu/intel.cQuoted 19 lines
Quoted 19 lines
index ed6086e..c80ab41 100644
arch/x86/kernel/cpu/intel.c +2
-1@@ -30,6 +30,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) { u64 misc_enable; + bool allow_fast_string = true; /* Unmask CPUID levels if masked: */ if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {@@ -118,8 +119,9 @@ static void __cpuinit early_init_intel(structcpuinfo_x86 *c) * (model 2) with the same problem. */ if (c->x86 == 15) { - rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + allow_fast_string = false;Quoted 3 lines
Quoted 3 lines
arch/x86/kernel/cpu/intel.c +1
-0+ rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) {printk(KERN_INFO "kmemcheck: Disabling fast
string
Quoted 6 lines
Quoted 6 lines
operations\n");
arch/x86/kernel/cpu/intel.c +0
-0@@ -130,11 +132,28 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) #endifQuoted 14 lines
Quoted 6 lines
arch/x86/kernel/cpu/intel.c +0
-2/* -* If fast string is not enabled in IA32_MISC_ENABLE for any reason, -* clear the fast string and enhanced fast string CPU capabilities.
+ * If BIOS didn't enable fast string operation, try to enableQuoted 8 lines
+ * it ourselves. If that fails, then clear the fast string
+ * and enhanced fast string CPU capabilities.
*/
if (c->x86> 6 || (c->x86== 6 &&c->x86_model>=0xd)) {rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); +
+ if (allow_fast_string&&
+ !(misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING)){
Quoted 1 line
Quoted 1 line
+
misc_enable|=
MSR_IA32_MISC_ENABLE_FAST_STRING;Quoted 1 line
Quoted 1 line
+ wrmsr_safe(MSR_IA32_MISC_ENABLE,
(u32)misc_enable,
Quoted 6 lines
arch/x86/kernel/cpu/intel.c static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
Quoted 6 lines
+ (u32)(misc_enable >> 32));
arch/x86/kernel/cpu/intel.c +5
-0+ + /* Re-read to make sure it stuck. */ + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + + if (misc_enable &
MSR_IA32_MISC_ENABLE_FAST_STRING)Quoted 1 line
Quoted 1 line
+ printk(KERN_WARNING
FW_WARN"CPU #%d:"
Quoted 1 line
Quoted 1 line
+
Quoted 8 lines
"IA32_MISC_ENABLE.FAST_STRING_ENABLE "
Quoted 2 lines
Quoted 1 line
+ "was not set",
c->cpu_index);This printk is redundant because the same info is dumped in the below
printk. Plus it's not firmware's issue if we can not set fast string bit 0 in
MISC_ENABLEregister. So I don't thinkFW_WARNis right.Huh? This is the success path -- the patch prints the warning if flipping the bit worked...
Ok. I see.
Still I would suggest to remove this printk. This info will be printed on every single CPU if BIOS doesn't enable fast string. This could flood the log buffer on big machines or many threads machines. And the info doesn't really provide useful message because we enable fast string in OS anyway. Reporting BIOS issue by this info probably will be viewed as low priority or ignored.
The following info is more important because it reports an abnormal behavior.
Thanks.
-Fenghua
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Re: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't already
Quoted 104 lines · Yu, Fenghua
Quoted 104 lines
-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf Of Andrew Lutomirski
Sent: Saturday, August 06, 2011 4:32 PM
To: Yu, Fenghua
Cc: [email protected]; [email protected]; Matthew Garrett; Len Brown; [email protected]; Ingo Molnar
Subject: Re: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyQuoted 21 lines · Fenghua
Quoted 21 lines
-----Original Message-----
From: Andy Lutomirski [mailto:[email protected]]
Sent: Saturday, August 06, 2011 4:43 AM
To: [email protected]; [email protected]
Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux- [email protected]; Ingo Molnar; Andy Lutomirski
Subject: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyIntel SDM volume 3A, 8.4.2 says:
Software can disable fast-string operation by clearing the fast-string-enable bit (bit 0) of
IA32_MISC_ENABLEMSR. However, Intel recomments that system software always enable fast-string operation.The Intel DQ67SW board (with latest BIOS) disables fast string operations if TXT is enabled. A Lenovo X220 disables it regardless of TXT setting. I doubt I'm the only person with a dumb BIOS like this.
Quoted 6 lines
Review
Quoted 6 lines
Signed-off-by Andy Lutomirski <[email protected]>---
arch/x86/kernel/cpu/intel.c | 25 ++++++++++++++++++++++---1 files changed, 22 insertions(+), 3 deletions(-)(quoted diff) +0
-0
b/arch/x86/kernel/cpu/intel.cQuoted 19 lines
Quoted 19 lines
index ed6086e..c80ab41 100644
arch/x86/kernel/cpu/intel.c +2
-1@@ -30,6 +30,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) { u64 misc_enable; + bool allow_fast_string = true; /* Unmask CPUID levels if masked: */ if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {@@ -118,8 +119,9 @@ static void __cpuinit early_init_intel(structcpuinfo_x86 *c) * (model 2) with the same problem. */ if (c->x86 == 15) { - rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + allow_fast_string = false;Quoted 3 lines
Quoted 3 lines
arch/x86/kernel/cpu/intel.c +1
-0+ rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) {printk(KERN_INFO "kmemcheck: Disabling fast
string
Quoted 6 lines
Quoted 6 lines
operations\n");
arch/x86/kernel/cpu/intel.c +0
-0@@ -130,11 +132,28 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) #endifQuoted 14 lines
Quoted 6 lines
arch/x86/kernel/cpu/intel.c +0
-2/* -* If fast string is not enabled in IA32_MISC_ENABLE for any reason, -* clear the fast string and enhanced fast string CPU capabilities.
+ * If BIOS didn't enable fast string operation, try to enableQuoted 8 lines
+ * it ourselves. If that fails, then clear the fast string
+ * and enhanced fast string CPU capabilities.
*/
if (c->x86> 6 || (c->x86== 6 &&c->x86_model>=0xd)) {rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); +
+ if (allow_fast_string&&
+ !(misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING)){
Quoted 1 line
Quoted 1 line
+
misc_enable|=
MSR_IA32_MISC_ENABLE_FAST_STRING;Quoted 1 line
Quoted 1 line
+ wrmsr_safe(MSR_IA32_MISC_ENABLE,
(u32)misc_enable,
Quoted 6 lines
arch/x86/kernel/cpu/intel.c static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
Quoted 6 lines
+ (u32)(misc_enable >> 32));
arch/x86/kernel/cpu/intel.c +5
-0+ + /* Re-read to make sure it stuck. */ + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + + if (misc_enable &
MSR_IA32_MISC_ENABLE_FAST_STRING)Quoted 1 line
Quoted 1 line
+ printk(KERN_WARNING
FW_WARN"CPU #%d:"
Quoted 1 line
Quoted 1 line
+
"IA32_MISC_ENABLE.FAST_STRING_ENABLE "
Quoted 2 lines
Quoted 1 line
+ "was not set",
c->cpu_index);This printk is redundant because the same info is dumped in the below
printk. Plus it's not firmware's issue if we can not set fast string bit 0 in
MISC_ENABLEregister. So I don't thinkFW_WARNis right.
Quoted 7 lines
Quoted 2 lines
Huh? This is the success path -- the patch prints the warning if flipping the bit worked...
Ok. I see.
Still I would suggest to remove this printk. This info will be printed on every single CPU if BIOS doesn't enable fast string.
just do printk_once(). We want to inform the user that something's going on.
Thanks,
Ingo
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Re: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't already
Quoted 110 lines · Ingo Molnar
Quoted 107 lines · Yu, Fenghua
Quoted 106 lines
-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf Of Andrew Lutomirski
Sent: Saturday, August 06, 2011 4:32 PM
To: Yu, Fenghua
Cc: [email protected]; [email protected]; Matthew Garrett; Len Brown; [email protected]; Ingo Molnar
Subject: Re: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyQuoted 21 lines · Fenghua
Quoted 21 lines
-----Original Message-----
From: Andy Lutomirski [mailto:[email protected]]
Sent: Saturday, August 06, 2011 4:43 AM
To: [email protected]; [email protected]
Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux- [email protected]; Ingo Molnar; Andy Lutomirski
Subject: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyIntel SDM volume 3A, 8.4.2 says:
Software can disable fast-string operation by clearing the fast-string-enable bit (bit 0) of
IA32_MISC_ENABLEMSR. However, Intel recomments that system software always enable fast-string operation.The Intel DQ67SW board (with latest BIOS) disables fast string operations if TXT is enabled. A Lenovo X220 disables it regardless of TXT setting. I doubt I'm the only person with a dumb BIOS like this.
Quoted 6 lines
Review
Quoted 6 lines
Signed-off-by Andy Lutomirski <[email protected]>---
arch/x86/kernel/cpu/intel.c | 25 ++++++++++++++++++++++---1 files changed, 22 insertions(+), 3 deletions(-)(quoted diff) +0
-0
b/arch/x86/kernel/cpu/intel.cQuoted 19 lines
Quoted 19 lines
index ed6086e..c80ab41 100644
arch/x86/kernel/cpu/intel.c +2
-1@@ -30,6 +30,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) { u64 misc_enable; + bool allow_fast_string = true; /* Unmask CPUID levels if masked: */ if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {@@ -118,8 +119,9 @@ static void __cpuinit early_init_intel(structcpuinfo_x86 *c) * (model 2) with the same problem. */ if (c->x86 == 15) { - rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + allow_fast_string = false;Quoted 3 lines
Quoted 3 lines
arch/x86/kernel/cpu/intel.c +1
-0+ rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) {printk(KERN_INFO "kmemcheck: Disabling fast
string
Quoted 6 lines
Quoted 6 lines
operations\n");
arch/x86/kernel/cpu/intel.c +0
-0@@ -130,11 +132,28 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) #endifQuoted 14 lines
Quoted 6 lines
arch/x86/kernel/cpu/intel.c +0
-2/* -* If fast string is not enabled in IA32_MISC_ENABLE for any reason, -* clear the fast string and enhanced fast string CPU capabilities.
+ * If BIOS didn't enable fast string operation, try to enableQuoted 8 lines
+ * it ourselves. If that fails, then clear the fast string
+ * and enhanced fast string CPU capabilities.
*/
if (c->x86> 6 || (c->x86== 6 &&c->x86_model>=0xd)) {rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); +
+ if (allow_fast_string&&
+ !(misc_enable &MSR_IA32_MISC_ENABLE_FAST_STRING)){
Quoted 1 line
Quoted 1 line
+
misc_enable|=
MSR_IA32_MISC_ENABLE_FAST_STRING;Quoted 1 line
Quoted 1 line
+ wrmsr_safe(MSR_IA32_MISC_ENABLE,
(u32)misc_enable,
Quoted 6 lines
arch/x86/kernel/cpu/intel.c static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
Quoted 6 lines
+ (u32)(misc_enable >> 32));
arch/x86/kernel/cpu/intel.c +5
-0+ + /* Re-read to make sure it stuck. */ + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + + if (misc_enable &
MSR_IA32_MISC_ENABLE_FAST_STRING)Quoted 1 line
Quoted 1 line
+ printk(KERN_WARNING
FW_WARN"CPU #%d:"
Quoted 1 line
Quoted 1 line
+
"IA32_MISC_ENABLE.FAST_STRING_ENABLE "
Quoted 2 lines
Quoted 1 line
+ "was not set",
c->cpu_index);This printk is redundant because the same info is dumped in the below
printk. Plus it's not firmware's issue if we can not set fast string bit 0 in
MISC_ENABLEregister. So I don't thinkFW_WARNis right.Huh? This is the success path -- the patch prints the warning if flipping the bit worked...
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Ok. I see.
Still I would suggest to remove this printk. This info will be printed on every single CPU if BIOS doesn't enable fast string.
just do
printk_once(). We want to inform the user that something's going on.
Already there in v3.
--Andy
Quoted 5 lines
Thanks,
Ingo
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RE: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't already
In reply to Andrew LutomirskiQuoted 121 lines
-----Original Message-----
From: Yu, Fenghua
Sent: Sunday, August 07, 2011 4:45 PM
To: 'Andrew Lutomirski'
Cc: [email protected]; [email protected]; Matthew Garrett; Len Brown; [email protected]; Ingo Molnar
Subject: RE: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyQuoted 6 lines
-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf Of Andrew Lutomirski
Sent: Saturday, August 06, 2011 4:32 PM
To: Yu, Fenghua
Cc: [email protected]; [email protected]; Matthew Garrett;Len
Quoted 4 lines
Brown; [email protected]; Ingo Molnar
Subject: Re: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyQuoted 20 lines
Quoted 18 lines · Fenghua
Quoted 18 lines
-----Original Message-----
From: Andy Lutomirski [mailto:[email protected]]
Sent: Saturday, August 06, 2011 4:43 AM
To: [email protected]; [email protected]
Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux- [email protected]; Ingo Molnar; Andy Lutomirski
Subject: [PATCH v2 1/2] x86: Enable fast strings on Intel if BIOS hasn't alreadyIntel SDM volume 3A, 8.4.2 says:
Software can disable fast-string operation by clearing the fast-string-enable bit (bit 0) of
IA32_MISC_ENABLEMSR. However, Intel recomments that system software always enable fast-string operation.The Intel DQ67SW board (with latest BIOS) disables fast string operations if TXT is enabled. A Lenovo X220 disables it
regardless
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Review
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of TXT setting. I doubt I'm the only person with a dumb BIOS like this.
Signed-off-by Andy Lutomirski <[email protected]>---
arch/x86/kernel/cpu/intel.c | 25 ++++++++++++++++++++++---1 files changed, 22 insertions(+), 3 deletions(-)(quoted diff) +0
-0
b/arch/x86/kernel/cpu/intel.cQuoted 19 lines
Quoted 19 lines
index ed6086e..c80ab41 100644
arch/x86/kernel/cpu/intel.c +2
-1@@ -30,6 +30,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) { u64 misc_enable; + bool allow_fast_string = true; /* Unmask CPUID levels if masked: */ if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {@@ -118,8 +119,9 @@ static void __cpuinit early_init_intel(structcpuinfo_x86 *c) * (model 2) with the same problem. */ if (c->x86 == 15) { - rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + allow_fast_string = false;Quoted 2 lines
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arch/x86/kernel/cpu/intel.c static void __cpuinit early_init_intel(struct · line 126
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arch/x86/kernel/cpu/intel.c +1
-0+ rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING){
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printk(KERN_INFO "kmemcheck: Disabling fast
string
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arch/x86/kernel/cpu/intel.c static void __cpuinit
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operations\n");
arch/x86/kernel/cpu/intel.c +0
-0@@ -130,11 +132,28 @@ static void __cpuinitearly_init_intel(struct
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arch/x86/kernel/cpu/intel.c +0
-2cpuinfo_x86 *c) #endif /* -* If fast string is not enabled in IA32_MISC_ENABLE for any reason, -* clear the fast string and enhanced fast string CPU capabilities.
+ * If BIOS didn't enable fast string operation, try toenable
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+ * it ourselves. If that fails, then clear the fast string
+ * and enhanced fast string CPU capabilities.
*/
if (c->x86> 6 || (c->x86== 6 &&c->x86_model>=0xd)) {rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); +
+ if (allow_fast_string&&
+ !(misc_enable &
MSR_IA32_MISC_ENABLE_FAST_STRING))Quoted 4 lines
{
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+
misc_enable|=
MSR_IA32_MISC_ENABLE_FAST_STRING;Quoted 1 line
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+ wrmsr_safe(MSR_IA32_MISC_ENABLE,
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(u32)misc_enable,
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arch/x86/kernel/cpu/intel.c static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
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+ (u32)(misc_enable >> 32));
arch/x86/kernel/cpu/intel.c +5
-0+ + /* Re-read to make sure it stuck. */ + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); + + if (misc_enable &
MSR_IA32_MISC_ENABLE_FAST_STRING)Quoted 1 line
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+ printk(KERN_WARNING
FW_WARN"CPU#%d:
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"
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+
"IA32_MISC_ENABLE.FAST_STRING_ENABLE "
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+ "was not set",
c->cpu_index);This printk is redundant because the same info is dumped in the
below
Quoted 3 lines
printk. Plus it's not firmware's issue if we can not set fast string bit 0 in
MISC_ENABLEregister. So I don't thinkFW_WARNis right.
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Quoted 2 lines
Huh? This is the success path -- the patch prints the warning if flipping the bit worked...
Ok. I see.
Still I would suggest to remove this printk. This info will be printed on every single CPU if BIOS doesn't enable fast string. This could flood the log buffer on big machines or many threads machines. And the
On the bottom line, you need to use printk_once to reduce repeated message on each CPU.
Thanks.
-Fenghua
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PATCH v2 2/2 x86: Enable monitor/mwait on Intel if BIOS hasn't already
In reply to Andy LutomirskiMy Intel DQ67SW (latest BIOS) disables monitor/mwait on the boot CPU if TXT is enabled. We're lucky that the system works at all, since the feature is still enabled on other CPUs.
The obvious fix is to just re-enable it ourselves.
--- arch/x86/kernel/cpu/intel.c | 25 +++++++++++++++++++++++++ 1 files changed, 25 insertions(+), 0 deletions(-)
arch/x86/kernel/cpu/intel.c +25 -0
@@ -493,6 +493,31 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)wrmsrl (MSR_IA32_ENERGY_PERF_BIAS , epb); } } + +/* Enable monitor/mwait if BIOS didn't do it for us. */ +if (!cpu_has (c,X86_FEATURE_MWAIT ) &&cpu_has (c,X86_FEATURE_XMM3 ) + && c->x86 >=6 && !(c->x86 ==6 && c->x86_model <0x1c ) + && !(c->x86 ==0xf && c->x86_model <3 )) { +u64 misc_enable; +rdmsrl (MSR_IA32_MISC_ENABLE , misc_enable); + misc_enable |=MSR_IA32_MISC_ENABLE_MWAIT ; + +/* +* Some non-SSE3 cpus will #GP. We check for that, +* but it can't hurt to be safe. +*/ +wrmsr_safe (MSR_IA32_MISC_ENABLE , (u32 )misc_enable, + (u32)(misc_enable >>32 )); + +/* Re-read monitor capability. */ +if (cpuid_ecx (1 ) &0x8 ) { +set_cpu_cap (c,X86_FEATURE_MWAIT ); + + printk(KERN_WARNING FW_WARN "CPU #%d: " +"IA32_MISC_ENABLE.ENABLE_MONITOR_FSM " + "was not set\n", c->cpu_index); + } + } }#ifdef CONFIG_X86_32
Signature · 1 line
1.7.6