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add support for DWC UFS Controller

PATCH Superseded Joao Pinto 3 participants 14 messages Feb 15, 2016 – Mar 3, 2016

Subsystems (3)

v8 of 16 Superseded Latest is v16 →

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Joao Pinto

author
#0 lore raw

v8 cover add support for DWC UFS Controller

The work consisted of:
- Fixed typo in ufshcd-pltfrm.c
- Tweak ufshcd.c for UFS 2.0 support
- Implement ufshcd-dwc which contains all DWC HW specific code
- Unipro attributes were added and new registers were added to the driver
- Implement a ufs-dwc glue platform driver
- Implement a ufs-dwc-pci glue pci driver
- Documentation update

Joao Pinto (3):
fixed typo in ufshcd-pltfrm
added UFS 2.0 capabilities
add support for DWC UFS Host Controller

 Documentation/devicetree/bindings/ufs/ufs-dwc.txt  |  19 +
 .../devicetree/bindings/ufs/ufshcd-pltfrm.txt      |   4 +-
 MAINTAINERS                                        |   6 +
 drivers/scsi/ufs/Kconfig                           |  51 +++
 drivers/scsi/ufs/Makefile                          |   3 +
 drivers/scsi/ufs/ufs-dwc-pci.c                     | 172 ++++++++
 drivers/scsi/ufs/ufs-dwc.c                         |  96 +++++
 drivers/scsi/ufs/ufshcd-dwc.c                      | 431 +++++++++++++++++++++
 drivers/scsi/ufs/ufshcd-dwc.h                      |  18 +
 drivers/scsi/ufs/ufshcd-pltfrm.c                   |   2 +-
 drivers/scsi/ufs/ufshcd.c                          |  29 +-
 drivers/scsi/ufs/ufshci-dwc.h                      |  42 ++
 drivers/scsi/ufs/ufshci.h                          |   1 +
 drivers/scsi/ufs/unipro.h                          |  39 ++
 14 files changed, 906 insertions(+), 7 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/ufs/ufs-dwc.txt
 create mode 100644 drivers/scsi/ufs/ufs-dwc-pci.c
 create mode 100644 drivers/scsi/ufs/ufs-dwc.c
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.c
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.h
 create mode 100644 drivers/scsi/ufs/ufshci-dwc.h
Signature · 6 lines
1.8.1.5

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author
#1 lore raw

PATCH v8 1/3 fixed typo in ufshcd-pltfrm

Fixed typo in ufshcd-pltfrm.

---
Changes v0->v8:
- Nothing changed (just to keep up with patch set version).

 drivers/scsi/ufs/ufshcd-pltfrm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/scsi/ufs/ufshcd-pltfrm.c +1 -1
index d2a7b12..0522891 100644
@@ -353,6 +353,6 @@ EXPORT_SYMBOL_GPL(ufshcd_pltfrm_init);
 
 MODULE_AUTHOR("Santosh Yaragnavi <[email protected]>");
 MODULE_AUTHOR("Vinayak Holikatti <[email protected]>");
-MODULE_DESCRIPTION("UFS host controller Pltform bus based glue driver");
+MODULE_DESCRIPTION("UFS host controller Platform bus based glue driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(UFSHCD_DRIVER_VERSION);
Signature · 1 line
1.8.1.5
author
#2 lore raw

PATCH v8 2/3 added UFS 2.0 capabilities

In reply to Joao Pinto

Adding UFS 2.0 support to the UFS core driver.

---
Changes v7->v8:
- Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings Changes v0->v7:
- Nothing changed (just to keep up with patch set version).

 .../devicetree/bindings/ufs/ufshcd-pltfrm.txt      |  4 +--
 drivers/scsi/ufs/ufshcd.c                          | 29 +++++++++++++++++++---
 drivers/scsi/ufs/ufshci.h                          |  1 +
 3 files changed, 28 insertions(+), 6 deletions(-)
Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +2 -2
index 03c0e98..8d9a9d2 100644
@@ -4,8 +4,8 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
 Each UFS controller instance should have its own node.
 
 Required properties:
-- compatible		: must contain "jedec,ufs-1.1", may also list one or more
-					  of the following:
+- compatible		: must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may
+			  also list one or more of the following:
 					  "qcom,msm8994-ufshc"
 					  "qcom,msm8996-ufshc"
 					  "qcom,ufshc"
drivers/scsi/ufs/ufshcd.c +25 -4
index 85cd256..2b5f2bf 100644
@@ -1223,6 +1223,7 @@ static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
 			ret = -EINVAL;
 		}
 		break;
+	case UTP_CMD_TYPE_UFS_STORAGE:
 	case UTP_CMD_TYPE_DEV_MANAGE:
 		ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
 		if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
@@ -1287,6 +1288,7 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 	struct ufshcd_lrb *lrbp;
 	struct ufs_hba *hba;
 	unsigned long flags;
+	u32 upiu_flags;
 	int tag;
 	int err = 0;
 
@@ -1343,10 +1345,23 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 	lrbp->task_tag = tag;
 	lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
 	lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
-	lrbp->command_type = UTP_CMD_TYPE_SCSI;
+
+	if (hba->ufs_version == UFSHCI_VERSION_20)
+		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+	else
+		lrbp->command_type = UTP_CMD_TYPE_SCSI;
 
 	/* form UPIU before issuing the command */
-	ufshcd_compose_upiu(hba, lrbp);
+	if (hba->ufs_version == UFSHCI_VERSION_20) {
+		if (likely(lrbp->cmd)) {
+			ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
+					lrbp->cmd->sc_data_direction);
+			ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
+		} else
+			err = -EINVAL;
+	} else
+		ufshcd_compose_upiu(hba, lrbp);
+
 	err = ufshcd_map_sg(lrbp);
 	if (err) {
 		lrbp->cmd = NULL;
@@ -1371,7 +1386,12 @@ static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
 	lrbp->sense_buffer = NULL;
 	lrbp->task_tag = tag;
 	lrbp->lun = 0; /* device management cmd is not specific to any LUN */
-	lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
+
+	if (hba->ufs_version == UFSHCI_VERSION_20)
+		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+	else
+		lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
+
 	lrbp->intr_cmd = true; /* No interrupt aggregation */
 	hba->dev_cmd.type = cmd_type;
 
@@ -3187,7 +3207,8 @@ static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
 			/* Do not touch lrbp after scsi done */
 			cmd->scsi_done(cmd);
 			__ufshcd_release(hba);
-		} else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
+		} else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
+			lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
 			if (hba->dev_cmd.complete)
 				complete(hba->dev_cmd.complete);
 		}
drivers/scsi/ufs/ufshci.h +1 -0
index 0ae0967..8dba0e7 100644
@@ -273,6 +273,7 @@ enum {
 	UTP_CMD_TYPE_SCSI		= 0x0,
 	UTP_CMD_TYPE_UFS		= 0x1,
 	UTP_CMD_TYPE_DEV_MANAGE		= 0x2,
+	UTP_CMD_TYPE_UFS_STORAGE	= 0x11,
 };
 
 enum {
Signature · 1 line
1.8.1.5
maintainer Acked-by on v8 2/3
#3 lore raw

Re: [PATCH v8 2/3] added UFS 2.0 capabilities

Quoted 10 lines · Joao Pinto

Adding UFS 2.0 support to the UFS core driver.

---
Changes v7->v8:
- Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings Changes v0->v7:
- Nothing changed (just to keep up with patch set version).

 .../devicetree/bindings/ufs/ufshcd-pltfrm.txt      |  4 +--
Quoted 4 lines
 drivers/scsi/ufs/ufshcd.c                          | 29 +++++++++++++++++++---
 drivers/scsi/ufs/ufshci.h                          |  1 +
 3 files changed, 28 insertions(+), 6 deletions(-)
author
#4 lore raw

PATCH v8 3/3 add support for DWC UFS Host Controller

In reply to Joao Pinto

This patch has the goal to add support for DesignWare UFS Controller specific operations and to add specific platform and pci drivers.

---
Changes v7->v8 (Akinobu Mita):
- DME sets were simplified for easier reading
- CLK DIV default values definitions names were changed to match the register's name
- New line added to dev_err and dev_info statements
Changes v6->v7 (Arnd Bergmann):
- Changed DT node name (to ufs only) and the memory address (to 0xd000000)
- Removed CONFIG_PM from the PCI glue driver (pm.h already does this)
- No other changes are necessary in ufshcd.c because of the link up notify function usage (it is simpler now)
- Removed the PHY mentioning since the Test Chip is not a real PHY for real world usage, since it is a test chip for prototyping with a very specific usage
- Added again the Test Chip 20-bit option
Changes v5->v6:
- Patch bad format fixed
Changes v4->v5 (Akinobu Mita):
- All functions used only locally in ufshcd-dwc are now declared as static
- ufshcd_dwc_configuration() was removed in ufshcd-dwc and a notify function (ufshcd_dwc_link_startup_notify) was created to deal with the DWC specific init routines
- 20-bit RMMI option was removed from Kconfig. Now if MPHY TC is selected and 40-bit is not then it assumes a 20-bit config
Changes v3->v4 (Arnd Bergmann and Mark Rutland):
- SCSI_UFS_DWC_HOOKS is now silent and selected by the SCSI_UFS_DWC_PLAT or SCSI_UFS_DWC_PCI
- Compatibility string has the ufs core version for info purposes since the driver is capable of getting the controller version from its registers
- Created ufs-dwc-pci glue driver with specific DWC data
- MPHY configuration remains in the ufshcd-dwc since it is unipro attribute writting only not following the a linux phy framework logic
Changes v2->v3 (Julian Calaby):
- Implement a common DWC code to be used by the platform and pci glue drivers
- Synopsys ID & Class added to the existing pci driver and specific DWC was also added to the pci driver
Changes v1->v2 (Akinobu Mita):
- Implement a platform driver that uses the existing UFS core driver
- Add DWC specific code to the existing UFS core driver

 Documentation/devicetree/bindings/ufs/ufs-dwc.txt |  19 +
 MAINTAINERS                                       |   6 +
 drivers/scsi/ufs/Kconfig                          |  51 +++
 drivers/scsi/ufs/Makefile                         |   3 +
 drivers/scsi/ufs/ufs-dwc-pci.c                    | 172 +++++++++
 drivers/scsi/ufs/ufs-dwc.c                        |  96 +++++
 drivers/scsi/ufs/ufshcd-dwc.c                     | 431 ++++++++++++++++++++++
 drivers/scsi/ufs/ufshcd-dwc.h                     |  18 +
 drivers/scsi/ufs/ufshci-dwc.h                     |  42 +++
 drivers/scsi/ufs/unipro.h                         |  39 ++
 10 files changed, 877 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ufs/ufs-dwc.txt
 create mode 100644 drivers/scsi/ufs/ufs-dwc-pci.c
 create mode 100644 drivers/scsi/ufs/ufs-dwc.c
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.c
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.h
 create mode 100644 drivers/scsi/ufs/ufshci-dwc.h
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +19 -0
new file mode 100644
index 0000000..59e9822
@@ -0,0 +1,19 @@
+* Universal Flash Storage (UFS) DesignWare Host Controller
+
+DWC_UFSHC nodes are defined to describe on-chip UFS host controllers.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible        : compatible list must contain "snps,ufshcd-dwc" and should
+		      also contain the JEDEC version of the controller:
+			"jedec,ufs-1.1"
+			"jedec,ufs-2.0"
+- reg               : <registers mapping>
+- interrupts        : <interrupt mapping for UFS host controller IRQ>
+
+Example:
+	ufs@0xd0000000 {
+		compatible = "jedec,ufs-2.0", "snps,dwc-ufshcd";
+		reg = < 0xd0000000 0x10000 >;
+		interrupts = < 24 >;
+	};
MAINTAINERS +6 -0
index d2f94e2..3db3c4c 100644
@@ -11006,6 +11006,12 @@ S:	Supported
 F:	Documentation/scsi/ufs.txt
 F:	drivers/scsi/ufs/
 
+UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER DWC HOOKS
+M:	Joao Pinto <[email protected]>
+L:	[email protected]
+S:	Supported
+F:	drivers/scsi/ufs/*dwc*
+
 UNSORTED BLOCK IMAGES (UBI)
 M:	Artem Bityutskiy <[email protected]>
 M:	Richard Weinberger <[email protected]>
drivers/scsi/ufs/Kconfig +51 -0

54 lines not on this page · raw message

drivers/scsi/ufs/Makefile +3 -0
index 8303bcc..bab8c05 100644
@@ -1,4 +1,7 @@
 # UFSHCD makefile
+obj-$(CONFIG_SCSI_UFS_DWC_HOOKS) += ufshcd-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_PLAT) += ufs-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_PCI) += ufs-dwc-pci.o
 obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
 obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
 obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
drivers/scsi/ufs/ufs-dwc-pci.c new file +172 -0

172 lines not on this page · raw message

drivers/scsi/ufs/ufs-dwc.c new file +96 -0

96 lines not on this page · raw message

drivers/scsi/ufs/ufshcd-dwc.c new file +431 -0

431 lines not on this page · raw message

drivers/scsi/ufs/ufshcd-dwc.h new file +18 -0
new file mode 100644
index 0000000..ca65ee1
@@ -0,0 +1,18 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _UFSHCD_DWC_H
+#define _UFSHCD_DWC_H
+
+int ufshcd_dwc_link_startup_notify(struct ufs_hba *hba,
+					enum ufs_notify_change_status status);
+#endif /* End of Header */
drivers/scsi/ufs/ufshci-dwc.h new file +42 -0

42 lines not on this page · raw message

drivers/scsi/ufs/unipro.h +39 -0
index 816a8a4..da16254 100644
@@ -35,6 +35,10 @@
 #define TX_LCC_SEQUENCER			0x0032
 #define TX_MIN_ACTIVATETIME			0x0033
 #define TX_PWM_G6_G7_SYNC_LENGTH		0x0034
+#define TX_REFCLKFREQ				0x00EB
+#define TX_CFGCLKFREQVAL			0x00EC
+#define	CFGEXTRATTR				0x00F0
+#define DITHERCTRL2				0x00F1
 
 /*
  * M-RX Configuration Attributes
@@ -48,8 +52,38 @@
 #define RX_ENTER_HIBERN8			0x00A7
 #define RX_BYPASS_8B10B_ENABLE			0x00A8
 #define RX_TERMINATION_FORCE_ENABLE		0x0089
+#define RX_REFCLKFREQ				0x00EB
+#define	RX_CFGCLKFREQVAL			0x00EC
+#define CFGWIDEINLN				0x00F0
+#define CFGRXCDR8				0x00BA
+#define ENARXDIRECTCFG4				0x00F2
+#define CFGRXOVR8				0x00BD
+#define RXDIRECTCTRL2				0x00C7
+#define ENARXDIRECTCFG3				0x00F3
+#define RXCALCTRL				0x00B4
+#define ENARXDIRECTCFG2				0x00F4
+#define CFGRXOVR4				0x00E9
+#define RXSQCTRL				0x00B5
+#define CFGRXOVR6				0x00BF
 
 #define is_mphy_tx_attr(attr)			(attr < RX_MODE)
+
+/*
+ * Common Block Attributes
+ */
+#define TX_GLOBALHIBERNATE			UNIPRO_CB_OFFSET(0x002B)
+#define REFCLKMODE				UNIPRO_CB_OFFSET(0x00BF)
+#define DIRECTCTRL19				UNIPRO_CB_OFFSET(0x00CD)
+#define DIRECTCTRL10				UNIPRO_CB_OFFSET(0x00E6)
+#define CDIRECTCTRL6				UNIPRO_CB_OFFSET(0x00EA)
+#define RTOBSERVESELECT				UNIPRO_CB_OFFSET(0x00F0)
+#define CBDIVFACTOR				UNIPRO_CB_OFFSET(0x00F1)
+#define CBDCOCTRL5				UNIPRO_CB_OFFSET(0x00F3)
+#define CBPRGPLL2				UNIPRO_CB_OFFSET(0x00F8)
+#define CBPRGTUNING				UNIPRO_CB_OFFSET(0x00FB)
+
+#define UNIPRO_CB_OFFSET(x)			(0x8000 | x)
+
 /*
  * PHY Adpater attributes
  */
@@ -110,6 +144,11 @@
 #define PA_STALLNOCONFIGTIME	0x15A3
 #define PA_SAVECONFIGTIME	0x15A4
 
+/*Other attributes*/
+#define VS_MPHYCFGUPDT		0xD085
+#define VS_DEBUGOMC		0xD09E
+#define VS_POWERSTATE		0xD083
+
 /* PA power modes */
 enum {
 	FAST_MODE	= 1,
Signature · 1 line
1.8.1.5
maintainer
#5 lore raw

Re: [PATCH v8 3/3] add support for DWC UFS Host Controller

Quoted 70 lines · Joao Pinto

This patch has the goal to add support for DesignWare UFS Controller specific operations and to add specific platform and pci drivers.

---
Changes v7->v8 (Akinobu Mita):
- DME sets were simplified for easier reading
- CLK DIV default values definitions names were changed to match the register's name
- New line added to dev_err and dev_info statements
Changes v6->v7 (Arnd Bergmann):
- Changed DT node name (to ufs only) and the memory address (to 0xd000000)
- Removed CONFIG_PM from the PCI glue driver (pm.h already does this)
- No other changes are necessary in ufshcd.c because of the link up notify function usage (it is simpler now)
- Removed the PHY mentioning since the Test Chip is not a real PHY for real world usage, since it is a test chip for prototyping with a very specific usage
- Added again the Test Chip 20-bit option
Changes v5->v6:
- Patch bad format fixed
Changes v4->v5 (Akinobu Mita):
- All functions used only locally in ufshcd-dwc are now declared as static
- ufshcd_dwc_configuration() was removed in ufshcd-dwc and a notify function (ufshcd_dwc_link_startup_notify) was created to deal with the DWC specific init routines
- 20-bit RMMI option was removed from Kconfig. Now if MPHY TC is selected and 40-bit is not then it assumes a 20-bit config
Changes v3->v4 (Arnd Bergmann and Mark Rutland):
- SCSI_UFS_DWC_HOOKS is now silent and selected by the SCSI_UFS_DWC_PLAT or SCSI_UFS_DWC_PCI
- Compatibility string has the ufs core version for info purposes since the driver is capable of getting the controller version from its registers
- Created ufs-dwc-pci glue driver with specific DWC data
- MPHY configuration remains in the ufshcd-dwc since it is unipro attribute writting only not following the a linux phy framework logic
Changes v2->v3 (Julian Calaby):
- Implement a common DWC code to be used by the platform and pci glue drivers
- Synopsys ID & Class added to the existing pci driver and specific DWC was also added to the pci driver
Changes v1->v2 (Akinobu Mita):
- Implement a platform driver that uses the existing UFS core driver
- Add DWC specific code to the existing UFS core driver

 Documentation/devicetree/bindings/ufs/ufs-dwc.txt |  19 +
 MAINTAINERS                                       |   6 +
 drivers/scsi/ufs/Kconfig                          |  51 +++
 drivers/scsi/ufs/Makefile                         |   3 +
 drivers/scsi/ufs/ufs-dwc-pci.c                    | 172 +++++++++
 drivers/scsi/ufs/ufs-dwc.c                        |  96 +++++
 drivers/scsi/ufs/ufshcd-dwc.c                     | 431 ++++++++++++++++++++++
 drivers/scsi/ufs/ufshcd-dwc.h                     |  18 +
 drivers/scsi/ufs/ufshci-dwc.h                     |  42 +++
 drivers/scsi/ufs/unipro.h                         |  39 ++
 10 files changed, 877 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ufs/ufs-dwc.txt
 create mode 100644 drivers/scsi/ufs/ufs-dwc-pci.c
 create mode 100644 drivers/scsi/ufs/ufs-dwc.c
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.c
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.h
 create mode 100644 drivers/scsi/ufs/ufshci-dwc.h
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +0 -0
new file mode 100644
index 0000000..59e9822

Documentation/devicetree/bindings/ufs/ufs-dwc.txt line 10

Quoted 10 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +10 -0
@@ -0,0 +1,19 @@
+* Universal Flash Storage (UFS) DesignWare Host Controller
+
+DWC_UFSHC nodes are defined to describe on-chip UFS host controllers.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible        : compatible list must contain "snps,ufshcd-dwc" and should
+		      also contain the JEDEC version of the controller:
+			"jedec,ufs-1.1"
+			"jedec,ufs-2.0"

As I said before, this needs to mention also requiring an SoC specific compatible.

Documentation/devicetree/bindings/ufs/ufs-dwc.txt line 15

Quoted 5 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +5 -0
+- reg               : <registers mapping>
+- interrupts        : <interrupt mapping for UFS host controller IRQ>
+
+Example:
+	ufs@0xd0000000 {

Drop '0x'

Documentation/devicetree/bindings/ufs/ufs-dwc.txt line 16

Quoted 1 line
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +1 -0
+		compatible = "jedec,ufs-2.0", "snps,dwc-ufshcd";

This should be reversed. Most specific first.

Quoted 3 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +3 -0
+		reg = < 0xd0000000 0x10000 >;
+		interrupts = < 24 >;
+	};
#6 lore raw

Re: [PATCH v9 3/3] add support for DWC UFS Host Controller

In reply to Joao Pinto
Quoted 11 lines · On Thursday 18 February 2016 17:20:27 Joao Pinto wrote:
 Documentation/devicetree/bindings/ufs/ufs-dwc.txt |  19 +
 MAINTAINERS                                       |   6 +
 drivers/scsi/ufs/Kconfig                          |  51 +++
 drivers/scsi/ufs/Makefile                         |   3 +
 drivers/scsi/ufs/ufs-dwc-pci.c                    | 172 +++++++++
 drivers/scsi/ufs/ufs-dwc.c                        |  96 +++++
 drivers/scsi/ufs/ufshcd-dwc.c                     | 431 ++++++++++++++++++++++
 drivers/scsi/ufs/ufshcd-dwc.h                     |  18 +
 drivers/scsi/ufs/ufshci-dwc.h                     |  42 +++
 drivers/scsi/ufs/unipro.h                         |  39 ++

I still think this can be split up further. From your previous explanation, I understand that there is a specific test chip that uses the "snps,ufshcd-dwc" implementation along with some other glue logic.

Please split this out so you have anything related to the test chips separate from the patch that implements core logic.

Quoted 8 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +2 -0
new file mode 100644
index 0000000..59e9822
@@ -0,0 +1,19 @@
+* Universal Flash Storage (UFS) DesignWare Host Controller
+

Documentation/devicetree/bindings/ufs/ufs-dwc.txt line 12

Quoted 10 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +10 -0
+DWC_UFSHC nodes are defined to describe on-chip UFS host controllers.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible        : compatible list must contain "snps,ufshcd-dwc" and should
+		      also contain the JEDEC version of the controller:
+			"jedec,ufs-1.1"
+			"jedec,ufs-2.0"
+- reg               : <registers mapping>
+- interrupts        : <interrupt mapping for UFS host controller IRQ>

Based on your last reply to me (sorry for coming back to this so late), I think having just "snps,ufshcd-dwc" as the compatible string is not appropriate: This assumes that all "snps,ufshcd-dwc" instances are 100% compatible, but your code makes it very clear that this is not the case.

Please for the last time (!) add a proper version number of the specific IP block to the compatible strings so you can identify what hardware you are talking to.

You earlier confused the version number of the UFS standard with the version number of the controller, and that has been clarified now, but you really still need to use a version for the hardware as well.

Quoted 17 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +17 -0
+config SCSI_UFS_DWC_TC
+	bool "Support for the Synopsys Test Chip"
+	depends on SCSI_UFS_DWC_HOOKS && (SCSI_UFSHCD_PCI || SCSI_UFS_DWC_PLAT)
+	---help---
+	  Synopsys Test Chip is a Phy for prototyping purposes.
+	  This selects the support for the Synopsys Test Chip.
+
+	  Select this if you have a Synopsys Test Chip.
+	  If unsure, say N.
+
+config SCSI_UFS_DWC_20BIT_RMMI
+	bool "20-bit RMMI support"
+	depends on SCSI_UFS_DWC_TC
+	---help---
+	  This specifies that the Synopsys Test Chip supports 20-bit RMMI.
+
+	  Select this if you are using a 20-bit RMMI Synopsys Test Chip.

Documentation/devicetree/bindings/ufs/ufs-dwc.txt

Quoted 10 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +10 -0
+	  If unsure, say N.
+
+config SCSI_UFS_DWC_40BIT_RMMI
+	bool "40-bit RMMI support"
+	depends on SCSI_UFS_DWC_TC
+	---help---
+	  Synopsys Test Chip is a Phy for prototyping purposes.
+
+	  Select this if you are using a 40-bit RMMI Synopsys Test Chip.
+	  If unsure, say N.

I think it would be better to remove the SCSI_UFS_DWC_20BIT_RMMI and SCSI_UFS_DWC_40BIT_RMMI configuration options now, and always support both. There is not really much need for the options as this is just a test chip, and nobody is going to care much about saving a few bytes of object code.

drivers/scsi/ufs/Makefile line 7

Quoted 12 lines
drivers/scsi/ufs/Makefile +3 -0
index 8303bcc..bab8c05 100644
@@ -1,4 +1,7 @@
 # UFSHCD makefile
+obj-$(CONFIG_SCSI_UFS_DWC_HOOKS) += ufshcd-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_PLAT) += ufs-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_PCI) += ufs-dwc-pci.o
 obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
 obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
 obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o

However, please split out the SCSI_UFS_DWC_TC specific bits into a separate file, and put the module_platform_driver() bits into that file, to get the right abstraction where the most specific driver calls into the next driver, like

dwc-test-chip -> dwc-platform -> dwc -> ufs

It's possible you can leave out the dwc-platform level here, as there are no other users for now, we can add others later as needed.

Quoted 19 lines
drivers/scsi/ufs/Makefile +19 -0
+/**
+ * ufshcd_dwc_setup_tc()
+ * This function configures Local (host) Synopsys TC specific attributes
+ *
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success non-zero value on failure
+ */
+static int ufshcd_dwc_setup_tc(struct ufs_hba *hba)
+{
+	int ret = 0;
+
+#ifdef CONFIG_SCSI_UFS_DWC_40BIT_RMMI
+	dev_info(hba->dev, "Configuring Test Chip 40-bit RMMI\n");
+	ret = ufshcd_dwc_setup_40bit_rmmi(hba);
+	if (ret) {
+		dev_err(hba->dev, "Configuration failed\n");
+		goto out;
+	}

drivers/scsi/ufs/Makefile

Quoted 10 lines
drivers/scsi/ufs/Makefile +10 -0
+#endif
+
+#ifdef CONFIG_SCSI_UFS_DWC_20BIT_RMMI
+	dev_info(hba->dev, "Configuring Test Chip 20-bit RMMI\n");
+	ret = ufshcd_dwc_setup_20bit_rmmi(hba);
+	if (ret) {
+		dev_err(hba->dev, "Configuration failed\n");
+		goto out;
+	}
+#endif

You have changed the #if/#else into two #if sections, but this still seems broken when both are enabled, it just cannot work unless you have some runtime detection in place.

Depending on whether this is actually the same hardware with different settings, or different variants of the test chip, please use either a boolean DT property to determine which one you need, or use a separate "compatible" string in DT for each version of the test chip.

Quoted 14 lines
drivers/scsi/ufs/Makefile +14 -0
+/**
+ * ufshcd_dwc_link_startup_notify()
+ * UFS Host DWC specific link startup sequence
+ * @hba: private structure poitner
+ * @status: Callback notify status
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+int ufshcd_dwc_link_startup_notify(struct ufs_hba *hba,
+					enum ufs_notify_change_status status)
+{
+	int err = 0;
+
+	if (status == PRE_CHANGE) {

drivers/scsi/ufs/Makefile

Quoted 10 lines
drivers/scsi/ufs/Makefile +10 -0
+		ufshcd_dwc_program_clk_div(hba, DWC_UFS_REG_HCLKDIV_DIV_125);
+#ifdef CONFIG_SCSI_UFS_DWC_TC
+		err = ufshcd_dwc_setup_tc(hba);
+		if (err) {
+			dev_err(hba->dev, "Configuration failed (%d)\n",
+									err);
+			goto out;
+		}
+#endif
+	} else { /* POST_CHANGE */

Similar, this #ifdef should almost certainly be rewritten so that only a DT that identifies as the test chip will call that.

Arnd
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author
#7 lore raw

Re: [PATCH v9 3/3] add support for DWC UFS Host Controller

Hi Arnd,

Quoted 13 lines · Arnd Bergmann
Quoted 11 lines · On Thursday 18 February 2016 17:20:27 Joao Pinto wrote:
 Documentation/devicetree/bindings/ufs/ufs-dwc.txt |  19 +
 MAINTAINERS                                       |   6 +
 drivers/scsi/ufs/Kconfig                          |  51 +++
 drivers/scsi/ufs/Makefile                         |   3 +
 drivers/scsi/ufs/ufs-dwc-pci.c                    | 172 +++++++++
 drivers/scsi/ufs/ufs-dwc.c                        |  96 +++++
 drivers/scsi/ufs/ufshcd-dwc.c                     | 431 ++++++++++++++++++++++
 drivers/scsi/ufs/ufshcd-dwc.h                     |  18 +
 drivers/scsi/ufs/ufshci-dwc.h                     |  42 +++
 drivers/scsi/ufs/unipro.h                         |  39 ++
Quoted 7 lines

I still think this can be split up further. From your previous explanation, I understand that there is a specific test chip that uses the "snps,ufshcd-dwc" implementation along with some other glue logic.

Please split this out so you have anything related to the test chips separate from the patch that implements core logic.

Ok, I will split more the patches.

Quoted 27 lines
Quoted 9 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +2 -0
new file mode 100644
index 0000000..59e9822
@@ -0,0 +1,19 @@
+* Universal Flash Storage (UFS) DesignWare Host Controller
+

Documentation/devicetree/bindings/ufs/ufs-dwc.txt line 12

Quoted 10 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +10 -0
+DWC_UFSHC nodes are defined to describe on-chip UFS host controllers.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible        : compatible list must contain "snps,ufshcd-dwc" and should
+		      also contain the JEDEC version of the controller:
+			"jedec,ufs-1.1"
+			"jedec,ufs-2.0"
+- reg               : <registers mapping>
+- interrupts        : <interrupt mapping for UFS host controller IRQ>

Based on your last reply to me (sorry for coming back to this so late), I think having just "snps,ufshcd-dwc" as the compatible string is not appropriate: This assumes that all "snps,ufshcd-dwc" instances are 100% compatible, but your code makes it very clear that this is not the case.

Quoted 8 lines

Please for the last time (!) add a proper version number of the specific IP block to the compatible strings so you can identify what hardware you are talking to.

You earlier confused the version number of the UFS standard with the version number of the controller, and that has been clarified now, but you really still need to use a version for the hardware as well.

Ok, we can have a "snps,ufshcd-dwc-1.1" and a "snps,ufshcd-dwc-2.0". Agree?

Quoted 26 lines
Quoted 26 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +25 -0
+config SCSI_UFS_DWC_TC
+	bool "Support for the Synopsys Test Chip"
+	depends on SCSI_UFS_DWC_HOOKS && (SCSI_UFSHCD_PCI || SCSI_UFS_DWC_PLAT)
+	---help---
+	  Synopsys Test Chip is a Phy for prototyping purposes.
+	  This selects the support for the Synopsys Test Chip.
+
+	  Select this if you have a Synopsys Test Chip.
+	  If unsure, say N.
+
+config SCSI_UFS_DWC_20BIT_RMMI
+	bool "20-bit RMMI support"
+	depends on SCSI_UFS_DWC_TC
+	---help---
+	  This specifies that the Synopsys Test Chip supports 20-bit RMMI.
+
+	  Select this if you are using a 20-bit RMMI Synopsys Test Chip.
+	  If unsure, say N.
+
+config SCSI_UFS_DWC_40BIT_RMMI
+	bool "40-bit RMMI support"
+	depends on SCSI_UFS_DWC_TC
+	---help---
+	  Synopsys Test Chip is a Phy for prototyping purposes.
+
Quoted 8 lines

Documentation/devicetree/bindings/ufs/ufs-dwc.txt

Quoted 2 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt new file +2 -0
+	  Select this if you are using a 40-bit RMMI Synopsys Test Chip.
+	  If unsure, say N.

I think it would be better to remove the SCSI_UFS_DWC_20BIT_RMMI and SCSI_UFS_DWC_40BIT_RMMI configuration options now, and always support both. There is not really much need for the options as this is just a test chip, and nobody is going to care much about saving a few bytes of object code.

We need to know if we are dealing with a 20-bit test chip or a 40-bit test chip because the initialization is different. That can be made in the device tree as you say bellow, but we can also use a setup in which the host is a PC (so no device tree) connected by pci bus to an fpga containing the UFS controller. Having this, I think that the only way is to choose the 20/40bit stuff in the menuconfig.

Quoted 19 lines

drivers/scsi/ufs/Makefile line 7

Quoted 13 lines
drivers/scsi/ufs/Makefile +3 -0
index 8303bcc..bab8c05 100644
@@ -1,4 +1,7 @@
 # UFSHCD makefile
+obj-$(CONFIG_SCSI_UFS_DWC_HOOKS) += ufshcd-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_PLAT) += ufs-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_PCI) += ufs-dwc-pci.o
 obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
 obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
 obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o

However, please split out the SCSI_UFS_DWC_TC specific bits into a separate file, and put the module_platform_driver() bits into that file, to get the right abstraction where the most specific driver calls into the next driver, like

Quoted 1 line

dwc-test-chip -> dwc-platform -> dwc -> ufs

I think that it is a good idea and we isolate the test chip logic. If in the future anyone uses DWC core with a real PHY then they can have a phy driver calling dwc-platform. Agree?

Quoted 29 lines

It's possible you can leave out the dwc-platform level here, as there are no other users for now, we can add others later as needed.

Quoted 25 lines
drivers/scsi/ufs/Makefile +25 -0
+/**
+ * ufshcd_dwc_setup_tc()
+ * This function configures Local (host) Synopsys TC specific attributes
+ *
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success non-zero value on failure
+ */
+static int ufshcd_dwc_setup_tc(struct ufs_hba *hba)
+{
+	int ret = 0;
+
+#ifdef CONFIG_SCSI_UFS_DWC_40BIT_RMMI
+	dev_info(hba->dev, "Configuring Test Chip 40-bit RMMI\n");
+	ret = ufshcd_dwc_setup_40bit_rmmi(hba);
+	if (ret) {
+		dev_err(hba->dev, "Configuration failed\n");
+		goto out;
+	}
+#endif
+
+#ifdef CONFIG_SCSI_UFS_DWC_20BIT_RMMI
+	dev_info(hba->dev, "Configuring Test Chip 20-bit RMMI\n");
+	ret = ufshcd_dwc_setup_20bit_rmmi(hba);
+	if (ret) {
Quoted 9 lines

drivers/scsi/ufs/Makefile

Quoted 4 lines
drivers/scsi/ufs/Makefile +4 -0
+		dev_err(hba->dev, "Configuration failed\n");
+		goto out;
+	}
+#endif

You have changed the #if/#else into two #if sections, but this still seems broken when both are enabled, it just cannot work unless you have some runtime detection in place.

Please check my comments upstream.

Quoted 5 lines

Depending on whether this is actually the same hardware with different settings, or different variants of the test chip, please use either a boolean DT property to determine which one you need, or use a separate "compatible" string in DT for each version of the test chip.

As I say upstream, we can have a setup with the kernel running in a PC connected to the UFS controller by PCI, so the DT scenario is no good.

Quoted 20 lines
Quoted 20 lines
drivers/scsi/ufs/Makefile +19 -0
+/**
+ * ufshcd_dwc_link_startup_notify()
+ * UFS Host DWC specific link startup sequence
+ * @hba: private structure poitner
+ * @status: Callback notify status
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+int ufshcd_dwc_link_startup_notify(struct ufs_hba *hba,
+					enum ufs_notify_change_status status)
+{
+	int err = 0;
+
+	if (status == PRE_CHANGE) {
+		ufshcd_dwc_program_clk_div(hba, DWC_UFS_REG_HCLKDIV_DIV_125);
+#ifdef CONFIG_SCSI_UFS_DWC_TC
+		err = ufshcd_dwc_setup_tc(hba);
+		if (err) {
+			dev_err(hba->dev, "Configuration failed (%d)\n",
Quoted 8 lines

drivers/scsi/ufs/Makefile

Quoted 5 lines
drivers/scsi/ufs/Makefile +5 -0
+									err);
+			goto out;
+		}
+#endif
+	} else { /* POST_CHANGE */

Similar, this #ifdef should almost certainly be rewritten so that only a DT that identifies as the test chip will call that.

The same.

Quoted 3 lines

Arnd

Joao

#8 lore raw

Re: [PATCH v9 3/3] add support for DWC UFS Host Controller

Quoted 8 lines · On Wednesday 02 March 2016 16:46:47 Joao Pinto wrote:
Quoted 7 lines · Arnd Bergmann

Documentation/devicetree/bindings/ufs/ufs-dwc.txt

Quoted 1 line · On Thursday 18 February 2016 17:20:27 Joao Pinto wrote:
Documentation/devicetree/bindings/ufs/ufs-dwc.txt +0 -0

Please for the last time (!) add a proper version number of the specific IP block to the compatible strings so you can identify what hardware you are talking to.

Quoted 6 lines
Quoted 4 lines

You earlier confused the version number of the UFS standard with the version number of the controller, and that has been clarified now, but you really still need to use a version for the hardware as well.

Ok, we can have a "snps,ufshcd-dwc-1.1" and a "snps,ufshcd-dwc-2.0". Agree?

I have no idea what versions of the dwc hardware block exist, but I find it highly suspicious that the numbers happen to be the same as the UFS protocol numbers, so I'd say that is probably not the version of the IP block.

There are a few things you could try to find out the actual version:

* If you are able to contact the team that worked on the test chip, please ask them what hardware revision you have.

* if you have some form of documentation of the hardware, look on the first few pages of the manual that describes the registers to see if the document has a revision history.

* If you have access to the hardware design files, look at the file names.

On https://www.synopsys.com/dw/ipdir.php?ds=ufs, I see a version "1.30a" listed, which follows the typical numbering scheme that your employer uses, a single digit followed by a dot and a two-digit number and then a letter.

There is also a test chip with version 1.10a listed on the same page, and that follows the same numbering system.

See if you can find a version number that fits into that scheme in the documents you have available.

Quoted 34 lines
Quoted 25 lines
Quoted 25 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt +25 -0
+config SCSI_UFS_DWC_TC
+	bool "Support for the Synopsys Test Chip"
+	depends on SCSI_UFS_DWC_HOOKS && (SCSI_UFSHCD_PCI || SCSI_UFS_DWC_PLAT)
+	---help---
+	  Synopsys Test Chip is a Phy for prototyping purposes.
+	  This selects the support for the Synopsys Test Chip.
+
+	  Select this if you have a Synopsys Test Chip.
+	  If unsure, say N.
+
+config SCSI_UFS_DWC_20BIT_RMMI
+	bool "20-bit RMMI support"
+	depends on SCSI_UFS_DWC_TC
+	---help---
+	  This specifies that the Synopsys Test Chip supports 20-bit RMMI.
+
+	  Select this if you are using a 20-bit RMMI Synopsys Test Chip.
+	  If unsure, say N.
+
+config SCSI_UFS_DWC_40BIT_RMMI
+	bool "40-bit RMMI support"
+	depends on SCSI_UFS_DWC_TC
+	---help---
+	  Synopsys Test Chip is a Phy for prototyping purposes.
+
Quoted 8 lines

Documentation/devicetree/bindings/ufs/ufs-dwc.txt

Quoted 2 lines
Documentation/devicetree/bindings/ufs/ufs-dwc.txt +2 -0
+	  Select this if you are using a 40-bit RMMI Synopsys Test Chip.
+	  If unsure, say N.

I think it would be better to remove the SCSI_UFS_DWC_20BIT_RMMI and SCSI_UFS_DWC_40BIT_RMMI configuration options now, and always support both. There is not really much need for the options as this is just a test chip, and nobody is going to care much about saving a few bytes of object code.

Quoted 6 lines

We need to know if we are dealing with a 20-bit test chip or a 40-bit test chip because the initialization is different. That can be made in the device tree as you say bellow, but we can also use a setup in which the host is a PC (so no device tree) connected by pci bus to an fpga containing the UFS controller. Having this, I think that the only way is to choose the 20/40bit stuff in the menuconfig.

NAK.

Mutually exclusive compile-time configuration options are always wrong.

If the PCI hosts both have the same PCI device ID and there is no other identification register that lets you find out which one you have, maybe you can use a module parameter that defaults to invalid and that has to be set explicitly when loading the PCI driver?

Are both test chips the same way? I see that the driver supports two distinct PCI device IDs, so please check of they both come in variations for the two PHYs, or if at least one of them always uses the same PHY so you don't need the module parameter for that.

Quoted 18 lines
Quoted 18 lines

drivers/scsi/ufs/Makefile line 7

Quoted 12 lines
drivers/scsi/ufs/Makefile +3 -0
index 8303bcc..bab8c05 100644
@@ -1,4 +1,7 @@
 # UFSHCD makefile
+obj-$(CONFIG_SCSI_UFS_DWC_HOOKS) += ufshcd-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_PLAT) += ufs-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_PCI) += ufs-dwc-pci.o
 obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
 obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
 obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o

However, please split out the SCSI_UFS_DWC_TC specific bits into a separate file, and put the module_platform_driver() bits into that file, to get the right abstraction where the most specific driver calls into the next driver, like

Quoted 5 lines
Quoted 1 line

dwc-test-chip -> dwc-platform -> dwc -> ufs

I think that it is a good idea and we isolate the test chip logic. If in the future anyone uses DWC core with a real PHY then they can have a phy driver calling dwc-platform. Agree?

Yes, that would be good. It's likely that such a system would use some licensed IP block for the PHY, which can then have a separate PHY driver.

Quoted 40 lines
Quoted 28 lines

It's possible you can leave out the dwc-platform level here, as there are no other users for now, we can add others later as needed.

Quoted 25 lines
drivers/scsi/ufs/Makefile +25 -0
+/**
+ * ufshcd_dwc_setup_tc()
+ * This function configures Local (host) Synopsys TC specific attributes
+ *
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success non-zero value on failure
+ */
+static int ufshcd_dwc_setup_tc(struct ufs_hba *hba)
+{
+	int ret = 0;
+
+#ifdef CONFIG_SCSI_UFS_DWC_40BIT_RMMI
+	dev_info(hba->dev, "Configuring Test Chip 40-bit RMMI\n");
+	ret = ufshcd_dwc_setup_40bit_rmmi(hba);
+	if (ret) {
+		dev_err(hba->dev, "Configuration failed\n");
+		goto out;
+	}
+#endif
+
+#ifdef CONFIG_SCSI_UFS_DWC_20BIT_RMMI
+	dev_info(hba->dev, "Configuring Test Chip 20-bit RMMI\n");
+	ret = ufshcd_dwc_setup_20bit_rmmi(hba);
+	if (ret) {
Quoted 9 lines

drivers/scsi/ufs/Makefile

Quoted 4 lines
drivers/scsi/ufs/Makefile +4 -0
+		dev_err(hba->dev, "Configuration failed\n");
+		goto out;
+	}
+#endif

You have changed the #if/#else into two #if sections, but this still seems broken when both are enabled, it just cannot work unless you have some runtime detection in place.

Please check my comments upstream.

Quoted 8 lines
Quoted 5 lines

Depending on whether this is actually the same hardware with different settings, or different variants of the test chip, please use either a boolean DT property to determine which one you need, or use a separate "compatible" string in DT for each version of the test chip.

As I say upstream, we can have a setup with the kernel running in a PC connected to the UFS controller by PCI, so the DT scenario is no good.

The DT scenario can work out of the box, that is fine, you just need a hack in the PCI driver to work around the lack of identification there.

Arnd

author
#9 lore raw

Re: [PATCH v9 3/3] add support for DWC UFS Host Controller

Hi Arnd,

Quoted 3 lines · Arnd Bergmann
Quoted 2 lines · On Wednesday 02 March 2016 16:46:47 Joao Pinto wrote:
Quoted 1 line · Arnd Bergmann

On Thursday 18 February 2016 17:20:27 Joao Pinto wrote:

Facts:

- Test Chip type are currently not detectable in runtime through the controller
- In the future the Test Chip version will be available in the controller
- Test Chip initialization is different for each type
- The IP Core version is 1.40a
- Test Chip version is 6.00
- Teh UFS version is 2.0

Suggested driver architecture:

Platform setup:
tc-dwc-g210-pltfrm --> tc-dwc-g210 --> ufshcd-dwc-pltfrm --> ufshcd-dwc --> ufs

The test chip platform driver could be called through 2 compatibility strings. indicating the chip's version and bit type:
"snps, g210-tc-6.00-20bit"
"snps, g210-tc-6.00-40bit"

The device tree node would have additional info compatibility strings as the DWC IP core version and UFS version:
"snps, dwc-ufshcd-1.40a"
"jedec, ufs-2.0"

PCI based setup:
tc-dwc-g210-pci --> tc-dwc-g210 --> ufshcd-dwc-pci --> ufshcd-dwc --> ufs

The test chip type would be configured by a parameter to be passed in the kernel boot args: tc_type = 20 (20-bit) or tc_type = 40 (40-bit)

Having this in mind the KConfig would be:

"config SCSI_UFS_DWC_HOOKS
bool

config SCSI_UFS_DWC_PLAT
tristate "DesignWare UFS controller platform glue driver" depends on SCSI_UFSHCD_PLATFORM
select SCSI_UFS_DWC_HOOKS
help
This selects the DesignWare UFS host controller platform glue driver.

Select this if you have a DesignWare UFS controller on Platform bus. If unsure, say N.

config SCSI_UFS_DWC_PCI
tristate "DesignWare UFS controller pci glue driver" depends on SCSI_UFSHCD_PCI
select SCSI_UFS_DWC_HOOKS
help
This selects the DesignWare UFS host controller pci glue driver.

Select this if you have a DesignWare UFS controller on pci bus. If unsure, say N.

config SCSI_UFS_DWC_TC
bool "Support for the Synopsys Test Chip"
depends on SCSI_UFS_DWC_HOOKS && (SCSI_UFSHCD_PCI || SCSI_UFS_DWC_PLAT) ---help---
Synopsys Test Chip is a Phy for prototyping purposes. This selects the support for the Synopsys Test Chip.

Select this if you have a Synopsys Test Chip. If unsure, say N."

Agree with the approach?

Thanks for the help.

Joao

#10 lore raw

Re: [PATCH v9 3/3] add support for DWC UFS Host Controller

Quoted 7 lines · On Thursday 03 March 2016 11:39:05 Joao Pinto wrote:

Hi Arnd,

Quoted 3 lines · Arnd Bergmann
Quoted 2 lines · On Wednesday 02 March 2016 16:46:47 Joao Pinto wrote:
Quoted 1 line · Arnd Bergmann

On Thursday 18 February 2016 17:20:27 Joao Pinto wrote:

Quoted 8 lines

Facts:

- Test Chip type are currently not detectable in runtime through the controller
- In the future the Test Chip version will be available in the controller
- Test Chip initialization is different for each type
- The IP Core version is 1.40a
- Test Chip version is 6.00
- Teh UFS version is 2.0

Ok.

Quoted 9 lines

Suggested driver architecture:

Platform setup:
tc-dwc-g210-pltfrm --> tc-dwc-g210 --> ufshcd-dwc-pltfrm --> ufshcd-dwc --> ufs

The test chip platform driver could be called through 2 compatibility strings. indicating the chip's version and bit type:
"snps, g210-tc-6.00-20bit"
"snps, g210-tc-6.00-40bit"

Yes, this sounds good. We can probably skip one of the middle layers, but basically that is what I was looking for.

Quoted 7 lines

The device tree node would have additional info compatibility strings as the DWC IP core version and UFS version:
"snps, dwc-ufshcd-1.40a"
"jedec, ufs-2.0"

PCI based setup:
tc-dwc-g210-pci --> tc-dwc-g210 --> ufshcd-dwc-pci --> ufshcd-dwc --> ufs

The tc-dwc-g210 portion probably shouldn't depend on both ufshcd-dwc-pltfrm and ufshcd-dwc-pci here, so how about leaving those two out?

Then it becomes

tc-dwc-g210-pci ---> tc-dwc-g210 --> ufshcd-dwc --> ufs
tc-dwc-g210-pltfrm --/

Quoted 2 lines

The test chip type would be configured by a parameter to be passed in the kernel boot args: tc_type = 20 (20-bit) or tc_type = 40 (40-bit)

Right. With module_param() helper, this will be either a boot command line option, or a module load option, depending on whether the driver is built-on or not.

modprobe tc-dwc-g210-pci tc_type=20

command line: tc-dwc-g210-pci.tc_type=20

Quoted 4 lines

Having this in mind the KConfig would be:

"config SCSI_UFS_DWC_HOOKS
bool

I think we can now remove the config option for the hooks as well.

Quoted 27 lines

config SCSI_UFS_DWC_PLAT
tristate "DesignWare UFS controller platform glue driver" depends on SCSI_UFSHCD_PLATFORM
select SCSI_UFS_DWC_HOOKS
help
This selects the DesignWare UFS host controller platform glue driver.

Select this if you have a DesignWare UFS controller on Platform bus. If unsure, say N.

config SCSI_UFS_DWC_PCI
tristate "DesignWare UFS controller pci glue driver" depends on SCSI_UFSHCD_PCI
select SCSI_UFS_DWC_HOOKS
help
This selects the DesignWare UFS host controller pci glue driver.

Select this if you have a DesignWare UFS controller on pci bus. If unsure, say N.

config SCSI_UFS_DWC_TC
bool "Support for the Synopsys Test Chip"
depends on SCSI_UFS_DWC_HOOKS && (SCSI_UFSHCD_PCI || SCSI_UFS_DWC_PLAT) ---help---
Synopsys Test Chip is a Phy for prototyping purposes. This selects the support for the Synopsys Test Chip.

Quoted 4 lines

Select this if you have a Synopsys Test Chip. If unsure, say N."

Agree with the approach?

This would work, but I think it's better to define the options in terms of the top-level drivers, i.e. SCSI_UFS_DWC_TC_PCI and SCSI_UFS_DWC_TC_PLATFORM, and then make the other options hidden and implicitly turned out by them.

Arnd
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author
#11 lore raw

Re: [PATCH v9 3/3] add support for DWC UFS Host Controller

Hi,

Quoted 45 lines · Arnd Bergmann
Quoted 7 lines · On Thursday 03 March 2016 11:39:05 Joao Pinto wrote:

Hi Arnd,

Quoted 3 lines · Arnd Bergmann
Quoted 2 lines · On Wednesday 02 March 2016 16:46:47 Joao Pinto wrote:
Quoted 1 line · Arnd Bergmann

On Thursday 18 February 2016 17:20:27 Joao Pinto wrote:

Quoted 8 lines

Facts:

- Test Chip type are currently not detectable in runtime through the controller
- In the future the Test Chip version will be available in the controller
- Test Chip initialization is different for each type
- The IP Core version is 1.40a
- Test Chip version is 6.00
- Teh UFS version is 2.0

Ok.

Quoted 9 lines

Suggested driver architecture:

Platform setup:
tc-dwc-g210-pltfrm --> tc-dwc-g210 --> ufshcd-dwc-pltfrm --> ufshcd-dwc --> ufs

The test chip platform driver could be called through 2 compatibility strings. indicating the chip's version and bit type:
"snps, g210-tc-6.00-20bit"
"snps, g210-tc-6.00-40bit"

Yes, this sounds good. We can probably skip one of the middle layers, but basically that is what I was looking for.

Quoted 7 lines

The device tree node would have additional info compatibility strings as the DWC IP core version and UFS version:
"snps, dwc-ufshcd-1.40a"
"jedec, ufs-2.0"

PCI based setup:
tc-dwc-g210-pci --> tc-dwc-g210 --> ufshcd-dwc-pci --> ufshcd-dwc --> ufs

The tc-dwc-g210 portion probably shouldn't depend on both ufshcd-dwc-pltfrm and ufshcd-dwc-pci here, so how about leaving those two out?

Quoted 4 lines

Then it becomes

   tc-dwc-g210-pci ---> tc-dwc-g210 --> ufshcd-dwc --> ufs

tc-dwc-g210-pltfrm --/

Ok, understood. It becomes simpler without the pltfm and pci "middle layer".

Quoted 4 lines
Quoted 3 lines

The test chip type would be configured by a parameter to be passed in the kernel boot args: tc_type = 20 (20-bit) or tc_type = 40 (40-bit)

Quoted 8 lines

Right. With module_param() helper, this will be either a boot command line option, or a module load option, depending on whether the driver is built-on or not.

modprobe tc-dwc-g210-pci tc_type=20

command line: tc-dwc-g210-pci.tc_type=20

Right, that was the idea.

Quoted 34 lines
Quoted 4 lines

Having this in mind the KConfig would be:

"config SCSI_UFS_DWC_HOOKS
bool

I think we can now remove the config option for the hooks as well.

Quoted 27 lines

config SCSI_UFS_DWC_PLAT
tristate "DesignWare UFS controller platform glue driver" depends on SCSI_UFSHCD_PLATFORM
select SCSI_UFS_DWC_HOOKS
help
This selects the DesignWare UFS host controller platform glue driver.

Select this if you have a DesignWare UFS controller on Platform bus. If unsure, say N.

config SCSI_UFS_DWC_PCI
tristate "DesignWare UFS controller pci glue driver" depends on SCSI_UFSHCD_PCI
select SCSI_UFS_DWC_HOOKS
help
This selects the DesignWare UFS host controller pci glue driver.

Select this if you have a DesignWare UFS controller on pci bus. If unsure, say N.

config SCSI_UFS_DWC_TC
bool "Support for the Synopsys Test Chip"
depends on SCSI_UFS_DWC_HOOKS && (SCSI_UFSHCD_PCI || SCSI_UFS_DWC_PLAT) ---help---
Synopsys Test Chip is a Phy for prototyping purposes. This selects the support for the Synopsys Test Chip.

Quoted 9 lines
Quoted 4 lines

Select this if you have a Synopsys Test Chip. If unsure, say N."

Agree with the approach?

This would work, but I think it's better to define the options in terms of the top-level drivers, i.e. SCSI_UFS_DWC_TC_PCI and SCSI_UFS_DWC_TC_PLATFORM, and then make the other options hidden and implicitly turned out by them.

config SCSI_UFS_DWC
bool

config SCSI_UFS_DWC_TC_PLATFORM
tristate "DesignWare platform support using a G210 Test Chip" depends on SCSI_UFSHCD_PLATFORM
select SCSI_UFS_DWC
---help---
Synopsys Test Chip is a PHY for prototyping purposes.

If unsure, say N."

config SCSI_UFS_DWC_TC_PCI
tristate "DesignWare pci support using a G210 Test Chip" depends on SCSI_UFSHCD_PCI
select SCSI_UFS_DWC
---help---
Synopsys Test Chip is a PHY for prototyping purposes.

If unsure, say N."

I would keep SCSI_UFS_DWC to avoid building DWC specific source everytime.

Agree?

Quoted 2 lines

Arnd

Joao
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#12 lore raw

Re: [PATCH v9 3/3] add support for DWC UFS Host Controller

Quoted 20 lines · On Thursday 03 March 2016 13:52:39 Joao Pinto wrote:

config SCSI_UFS_DWC
bool

config SCSI_UFS_DWC_TC_PLATFORM
tristate "DesignWare platform support using a G210 Test Chip" depends on SCSI_UFSHCD_PLATFORM
select SCSI_UFS_DWC
---help---
Synopsys Test Chip is a PHY for prototyping purposes.

If unsure, say N."

config SCSI_UFS_DWC_TC_PCI
tristate "DesignWare pci support using a G210 Test Chip" depends on SCSI_UFSHCD_PCI
select SCSI_UFS_DWC
---help---
Synopsys Test Chip is a PHY for prototyping purposes.

Quoted 6 lines

If unsure, say N."

I would keep SCSI_UFS_DWC to avoid building DWC specific source everytime.

Agree?

Yes, looks good to me.

Arnd

author
#13 lore raw

Re: [PATCH v9 3/3] add support for DWC UFS Host Controller

Quoted 23 lines · Arnd Bergmann
Quoted 22 lines · On Thursday 03 March 2016 13:52:39 Joao Pinto wrote:

config SCSI_UFS_DWC
bool

config SCSI_UFS_DWC_TC_PLATFORM
tristate "DesignWare platform support using a G210 Test Chip" depends on SCSI_UFSHCD_PLATFORM
select SCSI_UFS_DWC
---help---
Synopsys Test Chip is a PHY for prototyping purposes.

If unsure, say N."

config SCSI_UFS_DWC_TC_PCI
tristate "DesignWare pci support using a G210 Test Chip" depends on SCSI_UFSHCD_PCI
select SCSI_UFS_DWC
---help---
Synopsys Test Chip is a PHY for prototyping purposes.

If unsure, say N."

Quoted 9 lines
Quoted 4 lines

I would keep SCSI_UFS_DWC to avoid building DWC specific source everytime.

Agree?

Yes, looks good to me.

Arnd

Nice! Thanks for the inputs. I'm going to implement the changes and send a v10 soon.

Joao
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