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timer: Add High Precision Event Timers (HPET) support

PATCH Superseded Ivan Gorinov 2 participants 3 messages Apr 6, 2018 x86

v4 of 6 Superseded Latest is v6 →

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#0 lore raw

PATCH v4 1/1 timer: Add High Precision Event Timers (HPET) support

Add HPET driver as an alternative timer for x86 (default is TSC). HPET counter has constant frequency and does not need calibration. This change also makes TSC timer driver optional on x86. New HPET driver can also be selected as the early timer on x86.

v4:
Using 64-bit pointer for main counter access.

v3:
Added early timer choice in x86-specific configuration.

v2:
Moved duplicated code to static functions.

Ivan Gorinov (1):
timer: Add High Precision Event Timers (HPET) support

 arch/Kconfig               |   2 +-
 arch/x86/Kconfig           |  21 ++++++
 arch/x86/dts/hpet.dtsi     |   7 ++
 drivers/timer/Kconfig      |   9 +++
 drivers/timer/Makefile     |   1 +
 drivers/timer/hpet_timer.c | 181 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/timer/tsc_timer.c  |   8 ++
 7 files changed, 228 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/dts/hpet.dtsi
 create mode 100644 drivers/timer/hpet_timer.c
Signature · 1 line
2.7.4
#1 lore raw

PATCH v4 1/1 timer: Add High Precision Event Timers (HPET) support

Add HPET driver as an alternative timer for x86 (default is TSC). HPET counter has constant frequency and does not need calibration. This change also makes TSC timer driver optional on x86. New HPET driver can also be selected as the early timer on x86.

HPET can be selected as the tick timer in the Device Tree "chosen" node:

/include/ "hpet.dtsi"

...

    chosen {
        tick-timer = "/hpet";
    };
---
 arch/Kconfig               |   2 +-
 arch/x86/Kconfig           |  21 ++++++
 arch/x86/dts/hpet.dtsi     |   7 ++
 drivers/timer/Kconfig      |   9 +++
 drivers/timer/Makefile     |   1 +
 drivers/timer/hpet_timer.c | 181 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/timer/tsc_timer.c  |   8 ++
 7 files changed, 228 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/dts/hpet.dtsi
 create mode 100644 drivers/timer/hpet_timer.c
arch/Kconfig +1 -1
index e599e7a..37dabae 100644
@@ -104,7 +104,7 @@ config X86
 	select DM_PCI
 	select PCI
 	select TIMER
-	select X86_TSC_TIMER
+	imply X86_TSC_TIMER
 	imply BLK
 	imply DM_ETH
 	imply DM_GPIO
arch/x86/Kconfig +21 -0
index 5c23b2c..2fe5b6a 100644
@@ -119,6 +119,27 @@ source "arch/x86/cpu/tangier/Kconfig"
 
 # architecture-specific options below
 
+choice
+	prompt "Select which timer to use early on x86"
+	depends on X86
+	default X86_EARLY_TIMER_TSC
+
+config X86_EARLY_TIMER_TSC
+	bool "TSC"
+	depends on X86_TSC_TIMER
+	help
+	  This selects x86 Time Stamp Counter (TSC) as the early timer.
+	  See CONFIG_TIMER_EARLY for the early timer description.
+
+config X86_EARLY_TIMER_HPET
+	bool "HPET"
+	depends on HPET_TIMER
+	help
+	  This selects High Precision Event Timers as the early timer.
+	  Early HPET base address is specified by CONFIG_HPET_ADDRESS.
+
+endchoice
+
 config AHCI
 	default y
 
arch/x86/dts/hpet.dtsi new file +7 -0
new file mode 100644
index 0000000..a74f739
@@ -0,0 +1,7 @@
+/ {
+	hpet: hpet at fed00000 {
+		compatible = "hpet-x86";
+		u-boot,dm-pre-reloc;
+		reg = <0xfed00000 0x1000>;
+	};
+};
drivers/timer/Kconfig +9 -0
index 2c96896..26743b7 100644
@@ -65,6 +65,15 @@ config X86_TSC_TIMER
 	help
 	  Select this to enable Time-Stamp Counter (TSC) timer for x86.
 
+config HPET_TIMER
+	bool "High Precision Event Timers (HPET) support"
+	depends on TIMER
+	default y if X86
+	help
+	  Select this to enable High Precision Event Timers (HPET) on x86.
+	  HPET main counter increments at constant rate and does not need
+	  calibration.
+
 config OMAP_TIMER
 	bool "Omap timer support"
 	depends on TIMER
drivers/timer/Makefile +1 -0
index a6e7832..557fecc 100644
@@ -8,6 +8,7 @@ obj-y += timer-uclass.o
 obj-$(CONFIG_ALTERA_TIMER)	+= altera_timer.o
 obj-$(CONFIG_SANDBOX_TIMER)	+= sandbox_timer.o
 obj-$(CONFIG_X86_TSC_TIMER)	+= tsc_timer.o
+obj-$(CONFIG_HPET_TIMER)	+= hpet_timer.o
 obj-$(CONFIG_OMAP_TIMER)	+= omap-timer.o
 obj-$(CONFIG_AST_TIMER)	+= ast_timer.o
 obj-$(CONFIG_STI_TIMER)		+= sti-timer.o
drivers/timer/hpet_timer.c new file +181 -0

181 lines not on this page · raw message

drivers/timer/tsc_timer.c +8 -0
index 9296de6..bd0e75c 100644
@@ -277,6 +277,8 @@ success:
 	return delta / 1000;
 }
 
+#ifdef CONFIG_X86_EARLY_TIMER_TSC
+
 /* Get the speed of the TSC timer in MHz */
 unsigned notrace long get_tbclk_mhz(void)
 {
@@ -322,6 +324,8 @@ void __udelay(unsigned long usec)
 #endif
 }
 
+#endif /* CONFIG_X86_EARLY_TIMER_TSC */
+
 static int tsc_timer_get_count(struct udevice *dev, u64 *count)
 {
 	u64 now_tick = rdtsc();
@@ -365,6 +369,8 @@ static int tsc_timer_probe(struct udevice *dev)
 	return 0;
 }
 
+#ifdef CONFIG_X86_EARLY_TIMER_TSC
+
 unsigned long notrace timer_early_get_rate(void)
 {
 	tsc_timer_ensure_setup();
@@ -377,6 +383,8 @@ u64 notrace timer_early_get_count(void)
 	return rdtsc() - gd->arch.tsc_base;
 }
 
+#endif
+
 static const struct timer_ops tsc_timer_ops = {
 	.get_count = tsc_timer_get_count,
 };
Signature · 1 line
2.7.4
#2 lore raw

PATCH v4 1/1 timer: Add High Precision Event Timers (HPET) support

Quoted 6 lines · Ivan Gorinov

Add HPET driver as an alternative timer for x86 (default is TSC). HPET counter has constant frequency and does not need calibration. This change also makes TSC timer driver optional on x86. New HPET driver can also be selected as the early timer on x86.

drivers/timer/hpet_timer.c new file +1 -0
+/* Reset and start the main counter. */

drivers/timer/hpet_timer.c line 57

Quoted 10 lines
drivers/timer/hpet_timer.c new file +9 -0
+static void start_main_counter(void *regs)
+{
+	volatile u64 *main_counter = regs + HPET_MAIN_COUNT;
+	u32 config;
+
+	config = readl(regs + HPET_CONFIG_REG);
+	config &= ~ENABLE_CNF;
+	writel(config, regs + HPET_CONFIG_REG);
 
+	*main_counter = 0;

It needs to be done as writeq() / readq().

Please, define them first in arch/x86/include/asm/io.h (as an example you can use arch/arm/include/asm/io.h).

Quoted 5 lines
drivers/timer/hpet_timer.c new file +5 -0
+	config |= ENABLE_CNF;
+	writel(config, regs + HPET_CONFIG_REG);
+}
+
+/* Read the main counter, repeat if 32-bit rollover happens. */

drivers/timer/hpet_timer.c line 71

Quoted 10 lines
drivers/timer/hpet_timer.c new file +9 -0
+static u64 read_main_counter(void *regs)
+{
+	volatile u64 *main_counter = regs + HPET_MAIN_COUNT;
+	u64 t, t0;
+
+	t = *main_counter;
+	do {
+		t0 = t;
 
+		t = *main_counter;

Ditto.

Quoted 4 lines
drivers/timer/hpet_timer.c new file +4 -0
+	} while ((t >> 32) != (t0 >> 32));
+
+	return t;
+}
Signature · 2 lines
Andy Shevchenko <[email protected]>
Intel Finland Oy