thermal: tsens: Add support for QCS404 platform
Subsystems (5)
v2 cover thermal: tsens: Add support for QCS404 platform
Add support for the Qualcomm QCS404 platform that contains v1 of the TSENS IP. Introduce a fallback binding to handle "v1" functionality.
These patches have been tested on top of 4.20-rc3 + various qcs404-related DT patches now in Andy's ci-next branch[1].
Changes since v1:
- Change p1 and p2 to be fixed-size arrays
- Refactor DT entries to be sorted by address, Thanks Vinod
- Added Acks
[1] https://git.kernel.org/pub/scm/linux/kernel/git/agross/linux.git/log/?h=ci-next
Amit Kucheria (4):
dt: thermal: tsens: Add bindings for qcs404
drivers: thermal: tsens: Add generic support for TSENS v1 IP
arm64: dts: qcom: qcs404: Add tsens controller
arm64: dts: qcom: qcs404: Add thermal zones for each sensor
.../bindings/thermal/qcom-tsens.txt | 3 + arch/arm64/boot/dts/qcom/qcs404.dtsi | 226 ++++++++++++++++++ drivers/thermal/qcom/Makefile | 2 +- drivers/thermal/qcom/tsens-v1.c | 196 +++++++++++++++ drivers/thermal/qcom/tsens.c | 3 + drivers/thermal/qcom/tsens.h | 2 +- 6 files changed, 430 insertions(+), 2 deletions(-) create mode 100644 drivers/thermal/qcom/tsens-v1.c
Signature · 1 line
2.17.1
PATCH v2 1/4 dt: thermal: tsens: Add bindings for qcs404
qcs404 uses v1 of the TSENS IP block. Create a fallback DT property "qcom,tsens-v1" to gather common code.
Signed-off-by Amit Kucheria <[email protected]>
Reviewed-by Vinod Koul <[email protected]>
Tested-by Vinod Koul <[email protected]>
--- Documentation/devicetree/bindings/thermal/qcom-tsens.txt | 3 +++ 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/thermal/qcom-tsens.txt +3 -0
@@ -8,9 +8,12 @@ Required properties: - "qcom,msm8996-tsens" (MSM8996) - "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998) - "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845) + - "qcom,qcs404-tsens", "qcom,tsens-v1" (QCS404) The generic "qcom,tsens-v2" property must be used as a fallback for any SoC with version 2 of the TSENS IP. MSM8996 is the only exception because the generic property did not exist when support was added. + Similarly, the generic "qcom,tsens-v1" property must be used as a fallback for + any SoC with version 1 of the TSENS IP. - reg: Address range of the thermal registers. New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM
Signature · 1 line
2.17.1
PATCH v2 2/4 drivers: thermal: tsens: Add generic support for TSENS v1 IP
In reply to Amit Kucheriaqcs404 has a single TSENS IP block with 10 sensors. It uses version 1.4 of the TSENS IP, functionality for which is encapsulated inside qcom,tsens-v1 compatible.
Signed-off-by Amit Kucheria <[email protected]>
Reviewed-by Vinod Koul <[email protected]>
Tested-by Vinod Koul <[email protected]>
--- drivers/thermal/qcom/Makefile | 2 +- drivers/thermal/qcom/tsens-v1.c | 196 ++++++++++++++++++++++++++++++++ drivers/thermal/qcom/tsens.c | 3 + drivers/thermal/qcom/tsens.h | 2 +- 4 files changed, 201 insertions(+), 2 deletions(-) create mode 100644 drivers/thermal/qcom/tsens-v1.c
drivers/thermal/qcom/Makefile +1 -1
@@ -1,2 +1,2 @@ obj-$(CONFIG_QCOM_TSENS) += qcom_tsens.o -qcom_tsens-y += tsens.o tsens-common.o tsens-8916.o tsens-8974.o tsens-8960.o tsens-v2.o +qcom_tsens-y += tsens.o tsens-common.o tsens-8916.o tsens-8974.o tsens-8960.o tsens-v2.o tsens-v1.o
drivers/thermal/qcom/tsens-v1.c new file +196 -0
196 lines not on this page · raw message
drivers/thermal/qcom/tsens.c +3 -0
@@ -63,6 +63,9 @@ static const struct of_device_id tsens_table[] = { }, { .compatible = "qcom,msm8996-tsens", .data = &data_8996, + }, { + .compatible = "qcom,tsens-v1", + .data = &data_tsens_v1, }, { .compatible = "qcom,tsens-v2", .data = &data_tsens_v2,
drivers/thermal/qcom/tsens.h +1 -1
@@ -92,7 +92,7 @@ int init_common(struct tsens_device *);int get_temp_common (struct tsens_device *,int ,int *);/* TSENS v1 targets */ -extern const struct tsens_data data_8916, data_8974, data_8960; +extern const struct tsens_data data_8916, data_8974, data_8960, data_tsens_v1;/* TSENS v2 targets */ extern const struct tsens_data data_8996, data_tsens_v2;
Signature · 1 line
2.17.1
PATCH v2 3/4 arm64: dts: qcom: qcs404: Add tsens controller
In reply to Amit Kucheriaqcs404 has a single TSENS IP block with 10 sensors. The calibration data is stored in an eeprom (qfprom) that is accessed through the nvmem framework. We add the qfprom node to allow the tsens sensors to be calibrated correctly.
Signed-off-by Amit Kucheria <[email protected]>
Reviewed-by Vinod Koul <[email protected]>
Tested-by Vinod Koul <[email protected]>
--- arch/arm64/boot/dts/qcom/qcs404.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
arch/arm64/boot/dts/qcom/qcs404.dtsi +20 -0
@@ -253,6 +253,16 @@ reg = <0x00060000 0x6000>; }; + qfprom: qfprom@a4000 { + compatible = "qcom,qfprom"; + reg = <0x000a4000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + tsens_caldata: caldata@d0 { + reg = <0x1f8 0x14>; + }; + }; + rng: rng@e3000 { compatible = "qcom,prng-ee"; reg = <0x000e3000 0x1000>;
@@ -260,6 +270,16 @@ clock-names = "core"; }; + tsens: thermal-sensor@4a9000 { + compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; + reg = <0x004a9000 0x1000>, /* TM */ + <0x004a8000 0x1000>; /* SROT */ + nvmem-cells = <&tsens_caldata>; + nvmem-cell-names = "calib"; + #qcom,sensors = <10>; + #thermal-sensor-cells = <1>; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,qcs404-pinctrl"; reg = <0x01000000 0x200000>,
Signature · 1 line
2.17.1
PATCH v2 4/4 arm64: dts: qcom: qcs404: Add thermal zones for each sensor
In reply to Amit Kucheriaqcs404 has 10 sensors connected to the single TSENS IP. Define a thermal zone for each of those sensors to expose the temperature of each zone.
Signed-off-by Amit Kucheria <[email protected]>
Reviewed-by Vinod Koul <[email protected]>
Tested-by Vinod Koul <[email protected]>
--- arch/arm64/boot/dts/qcom/qcs404.dtsi | 206 +++++++++++++++++++++++++++ 1 file changed, 206 insertions(+)
arch/arm64/boot/dts/qcom/qcs404.dtsi +206 -0
@@ -30,6 +30,7 @@ reg = <0x100>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; CPU1: cpu@101 {
@@ -38,6 +39,7 @@ reg = <0x101>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; CPU2: cpu@102 {
@@ -46,6 +48,7 @@ reg = <0x102>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; CPU3: cpu@103 {
@@ -54,6 +57,7 @@ reg = <0x103>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; L2_0: l2-cache {
@@ -507,4 +511,206 @@ #interrupt-cells = <2>; }; }; + + thermal-zones { + aoss-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 0>; + + trips { + aoss_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + aoss_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + dsp-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 1>; + + trips { + dsp_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + dsp_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + lpass-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 2>; + + trips { + lpass_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + lpass_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + wlan-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 3>; + + trips { + wlan_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + wlan_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cluster-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 4>; + + trips { + cluster_alert: cluster_alert { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cluster_crit: cluster_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 5>; + + trips { + cpu_alert0: cpu_alert0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit0: cpu_crit0 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal1 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 6>; + + trips { + cpu_alert1: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit1: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal2 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 7>; + + trips { + cpu_alert2: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit2: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal3 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 8>; + + trips { + cpu_alert3: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit3: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + gpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 9>; + + trips { + gpu_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + gpu_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; };
Signature · 1 line
2.17.1