pwm: intel: Add PWM driver for a new SoC
Subsystems (2)
v8 cover pwm: intel: Add PWM driver for a new SoC
Patch 1 adds dt binding document in YAML format. Patch 2 add PWM fan controller driver for LGM SoC.
v8:
- Remove fan related optional properties usage, keep them as default. If needed, change pwm-fan driver separately in future to add them as generic properties.
v7:
- Address code quality related review concerns.
- Rename fan related property to pwm-*.
- Fix one make dt_binding_check reported error.
v6:
- Readjust .apply op as per review feedback.
- Add back pwm-cells property to resolve make dt_binding_check error. pwm-cells is a required property for PWM driver.
- Add back fan related optional properties.
v5:
- Address below review concerns from Uwe Kleine-K�nig.
* Improve comments about Limitations.
* Use return value of regmap_update_bits if container function returns error code.
* Modify .apply op to have strict checking for fixed period supported by PWM HW.
* Use u64 as type when use min_t for duty_cycle.
* Add reset_control_assert() in failure case in probe where it was missing earlier.
- Remove fan specific optional properties from pwm dt binding document (Rob Herring)
v4:
- Address below review concerns from Uwe Kleine-K�nig.
* Improve notes and limitations comments.
* Add common prefixes for all #defines.
* Modify/Improve logic in .apply & .get_state ops as advised.
* Skip error messages in probe when error is -EPROBE_DEFER.
* Add dependencies in Kconfig (OF & HAS_IOMEM) and add select REGMAP_MMIO.
* Address other code quality related review concerns.
- Fix make dt_binding_check reported error in YAML file.
v3:
- Address below review concerns from Uwe Kleine-K�nig.
* Remove fan rpm calibration task from the driver.
* Modify apply op as per the review feedback.
* Add roundup & round down where necessary.
* Address other misc code quality related review concerns.
* Use devm_reset_control_get_exclusive(). (Philipp Zabel)
* Improve dt binding document.
v2:
- Address below review concerns from Uwe Kleine-K�nig.
* Add notes and limitations about PWM HW.
* Rename all functions and structure to lgm_pwm_*
* Readjust space aligninment in structure fields to single space.
* Switch to using apply instead of config/enable/disable.
* Address other code quality related concerns.
* Rebase to 5.8-rc1.
- Address review concerns in dt binding YAML from Rob Herring.
v1:
- Initial version.
Rahul Tanwar (2):
Add DT bindings YAML schema for PWM fan controller of LGM SoC Add PWM fan controller driver for LGM SoC
.../devicetree/bindings/pwm/intel,lgm-pwm.yaml | 44 ++++ drivers/pwm/Kconfig | 11 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-intel-lgm.c | 244 +++++++++++++++++++++ 4 files changed, 300 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml create mode 100644 drivers/pwm/pwm-intel-lgm.c
Signature · 1 line
2.11.0
PATCH v8 1/2 Add DT bindings YAML schema for PWM fan controller of LGM SoC
Intel's LGM(Lightning Mountain) SoC contains a PWM fan controller which is only used to control the fan attached to the system. This PWM controller does not have any other consumer other than fan. Add DT bindings documentation for this PWM fan controller.
--- .../devicetree/bindings/pwm/intel,lgm-pwm.yaml | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml
Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml new file +44 -0
@@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/intel,lgm-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LGM SoC PWM fan controller + +maintainers: + - Rahul Tanwar <[email protected]> + +properties: + compatible: + const: intel,lgm-pwm + + reg: + maxItems: 1 + + "#pwm-cells": + const: 2 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - resets + +additionalProperties: false + +examples: + - | + pwm: pwm@e0d00000 { + compatible = "intel,lgm-pwm"; + reg = <0xe0d00000 0x30>; + #pwm-cells = <2>; + clocks = <&cgu0 126>; + resets = <&rcu0 0x30 21>; + };
Signature · 1 line
2.11.0
PATCH v8 2/2 Add PWM fan controller driver for LGM SoC
In reply to Rahul TanwarIntel Lightning Mountain(LGM) SoC contains a PWM fan controller. This PWM controller does not have any other consumer, it is a dedicated PWM controller for fan attached to the system. Add driver for this PWM fan controller.
--- drivers/pwm/Kconfig | 11 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-intel-lgm.c | 244 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 256 insertions(+) create mode 100644 drivers/pwm/pwm-intel-lgm.c
drivers/pwm/Kconfig +11 -0
@@ -232,6 +232,17 @@ config PWM_IMX_TPM To compile this driver as a module, choose M here: the module will be called pwm-imx-tpm. +config PWM_INTEL_LGM + tristate "Intel LGM PWM support" + depends on OF && HAS_IOMEM + depends on X86 || COMPILE_TEST + select REGMAP_MMIO + help + Generic PWM fan controller driver for LGM SoC. + + To compile this driver as a module, choose M here: the module + will be called pwm-intel-lgm. + config PWM_IQS620A tristate "Azoteq IQS620A PWM support" depends on MFD_IQS62X || COMPILE_TEST
drivers/pwm/Makefile +1 -0
@@ -20,6 +20,7 @@ obj-$(CONFIG_PWM_IMG) += pwm-img.o obj-$(CONFIG_PWM_IMX1) += pwm-imx1.o obj-$(CONFIG_PWM_IMX27) += pwm-imx27.o obj-$(CONFIG_PWM_IMX_TPM) += pwm-imx-tpm.o +obj-$(CONFIG_PWM_INTEL_LGM) += pwm-intel-lgm.o obj-$(CONFIG_PWM_IQS620A) += pwm-iqs620a.o obj-$(CONFIG_PWM_JZ4740) += pwm-jz4740.o obj-$(CONFIG_PWM_LP3943) += pwm-lp3943.o
drivers/pwm/pwm-intel-lgm.c new file +244 -0
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Signature · 1 line
2.11.0
Re: [PATCH v8 2/2] Add PWM fan controller driver for LGM SoC
Quoted 4 lines · Rahul Tanwar
Intel Lightning Mountain(LGM) SoC contains a PWM fan controller. This PWM controller does not have any other consumer, it is a dedicated PWM controller for fan attached to the system. Add driver for this PWM fan controller.
...
drivers/pwm/Kconfig config PWM_IMX_TPM · line 238
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drivers/pwm/Kconfig +4
-0+config PWM_INTEL_LGM + tristate "Intel LGM PWM support" + depends on OF && HAS_IOMEM + depends on X86 || COMPILE_TEST
For better test coverage you may rewrite this
depends on HAS_IOMEM depends on (OF && X86) || COMPILE_TEST
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drivers/pwm/Kconfig +6
-0+ select REGMAP_MMIO + help + Generic PWM fan controller driver for LGM SoC. + + To compile this driver as a module, choose M here: the module + will be called pwm-intel-lgm.
...
drivers/pwm/pwm-intel-lgm.c line 20
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drivers/pwm/pwm-intel-lgm.c new file +4
-0+#include <linux/bitfield.h> +#include <linux/clk.h> +#include <linux/module.h> +#include <linux/of_device.h>
This should be mod_devicetable.h.
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drivers/pwm/pwm-intel-lgm.c new file +3
-0+#include <linux/pwm.h> +#include <linux/regmap.h> +#include <linux/reset.h>
...
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+#define
LGM_PWM_PERIOD_2WIRE_NSECS40000000
NSECS -> NS
40000000 -> (40 * NSEC_PER_MSEC)
...
drivers/pwm/pwm-intel-lgm.c line 78
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+if (state->polarity !=PWM_POLARITY_NORMAL || + state->period < pc->period)
It can be one line.
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drivers/pwm/pwm-intel-lgm.c new file +1
-0+return -EINVAL ;
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drivers/pwm/pwm-intel-lgm.c line 83
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drivers/pwm/pwm-intel-lgm.c new file +3
-0+if (!state->enabled) { + ret =lgm_pwm_enable (chip,0 ); +return ret;
What is the point?
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-0+ }
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drivers/pwm/pwm-intel-lgm.c line 96
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drivers/pwm/pwm-intel-lgm.c new file +3
-0+ ret =lgm_pwm_enable (chip,1 ); + +return ret;
Ditto.
...
drivers/pwm/pwm-intel-lgm.c line 113
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+ state->duty_cycle =DIV_ROUND_UP (duty * pc->period, +LGM_PWM_MAX_DUTY_CYCLE );
One line?
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drivers/pwm/pwm-intel-lgm.c line 144
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+struct lgm_pwm_chip *pc; +struct device *dev = &pdev->dev;
Use reversed xmas tree order.
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+void __iomem *io_base; +int ret;
...
drivers/pwm/pwm-intel-lgm.c line 162
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drivers/pwm/pwm-intel-lgm.c new file +7
-0+ pc->regmap =devm_regmap_init_mmio (dev, io_base, &lgm_pwm_regmap_config); +if (IS_ERR (pc->regmap)) { + ret =PTR_ERR (pc->regmap); +if (ret != -EPROBE_DEFER ) +dev_err (dev,"failed to init register map: %pe\n" , + pc->regmap); +return ret;
dev_err_probe()
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-0+ }
...
drivers/pwm/pwm-intel-lgm.c line 170
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drivers/pwm/pwm-intel-lgm.c new file +6
-0+ pc->clk =devm_clk_get (dev,NULL ); +if (IS_ERR (pc->clk)) { + ret =PTR_ERR (pc->clk); +if (ret != -EPROBE_DEFER ) +dev_err (dev,"failed to get clock: %pe\n" , pc->clk); +return ret;
Ditto.
drivers/pwm/pwm-intel-lgm.c line 179
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drivers/pwm/pwm-intel-lgm.c new file +9
-0+ } + + pc->rst =devm_reset_control_get_exclusive (dev,NULL ); +if (IS_ERR (pc->rst)) { + ret =PTR_ERR (pc->rst); +if (ret != -EPROBE_DEFER ) +dev_err (dev,"failed to get reset control: %pe\n" , + pc->rst); +return ret;
Ditto.
drivers/pwm/pwm-intel-lgm.c line 187
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drivers/pwm/pwm-intel-lgm.c new file +8
-0+ } + + ret =reset_control_deassert (pc->rst); +if (ret) { +if (ret != -EPROBE_DEFER ) +dev_err (dev,"cannot deassert reset control: %pe\n" , +ERR_PTR (ret)); +return ret;
Ditto.
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-0+ }
...
drivers/pwm/pwm-intel-lgm.c line 190
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drivers/pwm/pwm-intel-lgm.c new file +1
-0+ ret =clk_prepare_enable (pc->clk);
Wrap it with devm_add_action_or_reset(). Same for reset_control_deassert(). You probably can even put them under one function.
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drivers/pwm/pwm-intel-lgm.c new file +5
-0+if (ret) { +dev_err (dev,"failed to enable clock\n" ); +reset_control_assert (pc->rst); +return ret; + }
...
drivers/pwm/pwm-intel-lgm.c line 204
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+ ret =pwmchip_add (&pc->chip); +if (ret <0 ) {
Does ' < 0' have any meaning?
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drivers/pwm/pwm-intel-lgm.c new file +5
-0+dev_err (dev,"failed to add PWM chip: %pe\n" ,ERR_PTR (ret)); +clk_disable_unprepare (pc->clk); +reset_control_assert (pc->rst); +return ret; + }
...
drivers/pwm/pwm-intel-lgm.c line 221
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+ ret =pwmchip_remove (&pc->chip); +if (ret <0 )
Ditto.
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-0+ return ret;
Signature · 2 lines
With Best Regards, Andy Shevchenko
Re: [PATCH v8 2/2] Add PWM fan controller driver for LGM SoC
Hi Andy,
Quoted 7 lines · Andy Shevchenko
Quoted 4 lines · Rahul Tanwar
Intel Lightning Mountain(LGM) SoC contains a PWM fan controller. This PWM controller does not have any other consumer, it is a dedicated PWM controller for fan attached to the system. Add driver for this PWM fan controller.
...
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drivers/pwm/Kconfig config PWM_IMX_TPM · line 238
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drivers/pwm/Kconfig +4
-0+config PWM_INTEL_LGM + tristate "Intel LGM PWM support" + depends on OF && HAS_IOMEM + depends on X86 || COMPILE_TESTFor better test coverage you may rewrite this
depends on HAS_IOMEM depends on (OF && X86) || COMPILE_TEST
Sure, will update.
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drivers/pwm/Kconfig +6
-0+ select REGMAP_MMIO + help + Generic PWM fan controller driver for LGM SoC. + + To compile this driver as a module, choose M here: the module + will be called pwm-intel-lgm....
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drivers/pwm/pwm-intel-lgm.c line 20
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drivers/pwm/pwm-intel-lgm.c new file +4
-0+#include <linux/bitfield.h> +#include <linux/clk.h> +#include <linux/module.h> +#include <linux/of_device.h> This should be
mod_devicetable.h.
Well noted.
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drivers/pwm/pwm-intel-lgm.c new file +3
-0+#include <linux/pwm.h> +#include <linux/regmap.h> +#include <linux/reset.h> ...
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+#define
LGM_PWM_PERIOD_2WIRE_NSECS40000000NSECS -> NS
40000000 -> (40 *NSEC_PER_MSEC)
Well noted.
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...
drivers/pwm/pwm-intel-lgm.c line 78
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+if (state->polarity !=PWM_POLARITY_NORMAL || + state->period < pc->period)It can be one line.
Ok.
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drivers/pwm/pwm-intel-lgm.c new file +1
-0+return -EINVAL ;...
drivers/pwm/pwm-intel-lgm.c line 83
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drivers/pwm/pwm-intel-lgm.c new file +3
-0+if (!state->enabled) { + ret =lgm_pwm_enable (chip,0 ); +return ret;What is the point?
I guess you mean to change it to return lgm_pwm_enable(chip, 0); Will do, thanks.
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-0+ }...
drivers/pwm/pwm-intel-lgm.c line 96
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drivers/pwm/pwm-intel-lgm.c new file +3
-0+ ret =lgm_pwm_enable (chip,1 ); + +return ret;Ditto.
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...
drivers/pwm/pwm-intel-lgm.c line 113
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+ state->duty_cycle =DIV_ROUND_UP (duty * pc->period, +LGM_PWM_MAX_DUTY_CYCLE );One line?
Ok.
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...
drivers/pwm/pwm-intel-lgm.c line 144
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+struct lgm_pwm_chip *pc; +struct device *dev = &pdev->dev;Use reversed xmas tree order.
Sure, will update.
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+void __iomem *io_base; +int ret;...
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drivers/pwm/pwm-intel-lgm.c line 162
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drivers/pwm/pwm-intel-lgm.c new file +7
-0+ pc->regmap =devm_regmap_init_mmio (dev, io_base, &lgm_pwm_regmap_config); +if (IS_ERR (pc->regmap)) { + ret =PTR_ERR (pc->regmap); +if (ret != -EPROBE_DEFER ) +dev_err (dev,"failed to init register map: %pe\n" , + pc->regmap); +return ret;
dev_err_probe()
Will update. Thanks.
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-0+ }...
drivers/pwm/pwm-intel-lgm.c line 170
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drivers/pwm/pwm-intel-lgm.c new file +6
-0+ pc->clk =devm_clk_get (dev,NULL ); +if (IS_ERR (pc->clk)) { + ret =PTR_ERR (pc->clk); +if (ret != -EPROBE_DEFER ) +dev_err (dev,"failed to get clock: %pe\n" , pc->clk); +return ret;Ditto.
drivers/pwm/pwm-intel-lgm.c line 179
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drivers/pwm/pwm-intel-lgm.c new file +9
-0+ } + + pc->rst =devm_reset_control_get_exclusive (dev,NULL ); +if (IS_ERR (pc->rst)) { + ret =PTR_ERR (pc->rst); +if (ret != -EPROBE_DEFER ) +dev_err (dev,"failed to get reset control: %pe\n" , + pc->rst); +return ret;Ditto.
drivers/pwm/pwm-intel-lgm.c line 187
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drivers/pwm/pwm-intel-lgm.c new file +8
-0+ } + + ret =reset_control_deassert (pc->rst); +if (ret) { +if (ret != -EPROBE_DEFER ) +dev_err (dev,"cannot deassert reset control: %pe\n" , +ERR_PTR (ret)); +return ret;Ditto.
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-0+ }...
drivers/pwm/pwm-intel-lgm.c line 190
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drivers/pwm/pwm-intel-lgm.c new file +1
-0+ ret =clk_prepare_enable (pc->clk);Wrap it with
devm_add_action_or_reset(). Same forreset_control_deassert(). You probably can even put them under one function.
I did some study and research for using devm_add_action_or_reset(). But still i have some doubts. Below steps is what i intend to do in order to switch to using this API. Please do review and let me know it is ok and i am not missing anything else. Thanks.
1. Call reset_control_assert()
2. Call clk_prepare_enable()
3. Call pwmchip_add()
4. Call devm_add_action_or_reset(dev, my_action, pc)
5. Remove explicit calls to unprepare/reset_control_assert from probe in failure cases.
6. static void my_action(void *pc)
{
pwmchip_remove(&pc->chip); clk_disable_upprepare(pc->clk); reset_control_assert(pc->rst);
}
7. Remove platform_driver.remove() entirely.
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drivers/pwm/pwm-intel-lgm.c new file +5
-0+if (ret) { +dev_err (dev,"failed to enable clock\n" ); +reset_control_assert (pc->rst); +return ret; + }...
drivers/pwm/pwm-intel-lgm.c line 204
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+ ret =pwmchip_add (&pc->chip); +if (ret <0 ) {Does ' < 0' have any meaning?
I use < 0 because this API's return code is mentioned as below:
Returns: 0 on success or a negative error code on failure. Also, all other PWM drivers check for <0 for this call.
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drivers/pwm/pwm-intel-lgm.c new file +5
-0+dev_err (dev,"failed to add PWM chip: %pe\n" ,ERR_PTR (ret)); +clk_disable_unprepare (pc->clk); +reset_control_assert (pc->rst); +return ret; + }...
drivers/pwm/pwm-intel-lgm.c line 221
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drivers/pwm/pwm-intel-lgm.c new file +2
-0+ ret =pwmchip_remove (&pc->chip); +if (ret <0 )Ditto.
Same as above.
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Review
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(quoted diff) +1
-0+ return ret;
Thanks.
Regards,
Rahul
Re: [PATCH v8 2/2] Add PWM fan controller driver for LGM SoC
Quoted 2 lines · Rahul
Quoted 1 line · Andy Shevchenko
On Thu, Aug 20, 2020 at 12:50:46PM +0800, Rahul Tanwar wrote:
...
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drivers/pwm/pwm-intel-lgm.c line 190
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drivers/pwm/pwm-intel-lgm.c new file +1
-0+ ret =clk_prepare_enable (pc->clk);Wrap it with
devm_add_action_or_reset(). Same forreset_control_deassert(). You probably can even put them under one function.I did some study and research for using
devm_add_action_or_reset(). But still i have some doubts. Below steps is what i intend to do in order to switch to using this API. Please do review and let me know it is ok and i am not missing anything else. Thanks.
Quoted 4 lines
1. Call
reset_control_assert()
2. Callclk_prepare_enable()3. Call
pwmchip_add()
First of all, I haven't told anything about this.
Quoted 10 lines
4. Call
devm_add_action_or_reset(dev, my_action, pc)
5. Remove explicit calls to unprepare/reset_control_assert from probe in failure cases.
6. static voidmy_action(void *pc)
{
pwmchip_remove(&pc->chip);clk_disable_upprepare(pc->clk);reset_control_assert(pc->rst);
}
7. Removeplatform_driver.remove()entirely.
Nope, pwmchip_add() and pwmchip_remove() stay as is now.
Only wrap clock and reset resources.
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drivers/pwm/pwm-intel-lgm.c new file +5
-0+if (ret) { +dev_err (dev,"failed to enable clock\n" ); +reset_control_assert (pc->rst); +return ret; + }
Signature · 2 lines
With Best Regards, Andy Shevchenko
Re: [PATCH v8 2/2] Add PWM fan controller driver for LGM SoC
In reply to Andy ShevchenkoQuoted 11 lines · Andy Shevchenko
Quoted 4 lines · Rahul Tanwar
Intel Lightning Mountain(LGM) SoC contains a PWM fan controller. This PWM controller does not have any other consumer, it is a dedicated PWM controller for fan attached to the system. Add driver for this PWM fan controller.
...
drivers/pwm/pwm-intel-lgm.c new file +3
-0+#include <linux/bitfield.h> +#include <linux/clk.h> +#include <linux/module.h> Quoted 1 line
+#include <
linux/of_device.h>This should be
mod_devicetable.h.
Inlcuding mod_devicetable.h instead of of_device.h results in build failure related to all platform calls. Build is ok if i remove it. Just FYI..
Regards,
Rahul
Re: [PATCH v8 2/2] Add PWM fan controller driver for LGM SoC
Quoted 10 lines · Rahul
Quoted 9 lines · Andy Shevchenko
Quoted 4 lines · Rahul Tanwar
Intel Lightning Mountain(LGM) SoC contains a PWM fan controller. This PWM controller does not have any other consumer, it is a dedicated PWM controller for fan attached to the system. Add driver for this PWM fan controller.
...
drivers/pwm/pwm-intel-lgm.c new file +3
-0+#include <linux/bitfield.h> +#include <linux/clk.h> +#include <linux/module.h>
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+#include <
linux/of_device.h>This should be
mod_devicetable.h.Inlcuding
mod_devicetable.hinstead ofof_device.hresults in build failure related to all platform calls. Build is ok if i remove it. Just FYI..
I didn't get what the change you performed, by there is no users of of_device.h in your code. If build fails it means you need to figure out proper list of what has to be included.
Signature · 2 lines
With Best Regards, Andy Shevchenko