Loongson: irqchip: Add loongson-eiointc DT init support
Subsystems (5)
v2 cover Loongson: irqchip: Add loongson-eiointc DT init support
Hi all:
Add EIOINTC irqchip DT support, which is needed for Loongson chips that are DT-based and support EIOINTC, such as the Loongson-2K0500 SOC.
We need to handle the "parent_irq" and "eio-num-vecs" parameters passed from DTS.
Thanks.
---
V2:
- Add the dt-bindings file (1/2);
- patch(2/2)
- Remove forgotten debugging messages;
- Rename properties name: "vec_count"->"loongson,eio-num-vecs";
- Change compatible string name to "loongson,eiointc-1.0".
Binbin Zhou (2):
dt-bindings: interrupt-controller: Add Loongson EIOINTC irqchip/loongson-eiointc: Add DT init support
.../loongson,eiointc.yaml | 80 ++++++++++++ drivers/irqchip/irq-loongson-eiointc.c | 119 +++++++++++++----- 2 files changed, 165 insertions(+), 34 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml
Signature · 1 line
2.39.0
PATCH v2 1/2 dt-bindings: interrupt-controller: Add Loongson EIOINTC
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +80 -0
@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0 + + reg: + minItems: 1 + maxItems: 3 + + interrupt-controller: true + + interrupts: + description: + Interrupt source of the CPU interrupts. + + interrupt-names: + description: + List of names for the parent interrupts. + items: + - const: int0 + + '#interrupt-cells': + const: 1 + + 'loongson,eio-num-vecs': + description: + The number of devices supported by the extended I/O interrupt vector. + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 1 + maximum: 256 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - 'loongson,eio-num-vecs' + +unevaluatedProperties: false + +examples: + - | + eiointc: interrupt-controller@1fe11600 { + compatible = "loongson,eiointc-1.0"; + reg = <0x1fe11600 0x8 + 0x1fe11700 0x8 + 0x1fe11800 0x8>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <3>; + interrupt-names = "int0"; + + loongson,eio-num-vecs = <128>; + + }; + +...
Signature · 1 line
2.39.0
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Quoted 15 lines · Binbin Zhou
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yamlDocumentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +0
-0
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 5
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +5
-0@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
Drop quotes from bopth.
Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +8
-0+ +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 23
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +10
-0+ Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0
Why not using SoC based compatible? It is preferred.
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 27
Quoted 4 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +4
-0+ + reg: + minItems: 1 + maxItems: 3
You need to describe the items.
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 33
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ + interrupt-controller: true + + interrupts: + description: + Interrupt source of the CPU interrupts.
You need to describe the items.
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 37
Quoted 4 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +4
-0+ + interrupt-names: + description: + List of names for the parent interrupts.
Drop description.
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 44
Quoted 7 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +7
-0+ items: + - const: int0 + + '#interrupt-cells': + const: 1 + + 'loongson,eio-num-vecs':
Drop quotes.
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 46
Quoted 2 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +2
-0+ description: + The number of devices supported by the extended I/O interrupt vector.
Why this cannot be inferred from the compatible? Different boards with the same SoC support different devices?
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 47
Quoted 1 line
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +1
-0+ $ref: "/schemas/types.yaml#/definitions/uint32"
Drop quotes.
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +10
-0+ minimum: 1 + maximum: 256 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - 'loongson,eio-num-vecs'
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 67
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +10
-0+ +unevaluatedProperties: false + +examples: + - | + eiointc: interrupt-controller@1fe11600 { + compatible = "loongson,eiointc-1.0"; + reg = <0x1fe11600 0x8 + 0x1fe11700 0x8 + 0x1fe11800 0x8>;
That's not correct syntax. <>, <>, <>
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 77
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +10
-0+ + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <3>; + interrupt-names = "int0"; + + loongson,eio-num-vecs = <128>; +
Drop stray blank line.
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 80
Quoted 3 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +3
-0+ }; + +...
Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Quoted 37 lines · Krzysztof Kozlowski
Quoted 15 lines · Binbin Zhou
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yamlDocumentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +0
-0Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 5
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +5
-0@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"Drop quotes from bopth.
Quoted 12 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +12
-0+ +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf:
Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 23
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0Why not using SoC based compatible? It is preferred.
Hi Krzysztof:
So far, from the datasheet, I know that only the EXIOINTC of the Loongson-2K0500 is different from the other chips, and that is the "loongson,eio-num-vecs" below, which is 128, while all the others are 256.
My original idea was to add this property to make compatible consistent, and also to make it easier to add new chips if they have different eio-num-vecs.
Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 27
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +4
-0+ + reg: + minItems: 1 + maxItems: 3You need to describe the items.
Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 33
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ + interrupt-controller: true + + interrupts: + description: + Interrupt source of the CPU interrupts.You need to describe the items.
Do you mean a more detailed description?
Quoted 18 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 37
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +4
-0+ + interrupt-names: + description: + List of names for the parent interrupts.Drop description.
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 44
Quoted 7 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +7
-0+ items: + - const: int0 + + '#interrupt-cells': + const: 1 + + 'loongson,eio-num-vecs':Drop quotes.
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 46
Quoted 2 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +2
-0+ description: + The number of devices supported by the extended I/O interrupt vector.Why this cannot be inferred from the compatible? Different boards with the same SoC support different devices?
See above.
Thanks.
Binbin
Quoted 49 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 47
Quoted 2 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +1
-0+ $ref: "/schemas/types.yaml#/definitions/uint32"Drop quotes.
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +10
-0+ minimum: 1 + maximum: 256 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - 'loongson,eio-num-vecs'Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 67
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +10
-0+ +unevaluatedProperties: false + +examples: + - | + eiointc: interrupt-controller@1fe11600 { + compatible = "loongson,eiointc-1.0"; + reg = <0x1fe11600 0x8 + 0x1fe11700 0x8 + 0x1fe11800 0x8>;That's not correct syntax. <>, <>, <>
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 77
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +10
-0+ + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <3>; + interrupt-names = "int0"; + + loongson,eio-num-vecs = <128>; +Drop stray blank line.
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 80
Quoted 3 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +3
-0+ }; + +...Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Quoted 50 lines · Binbin Zhou
Quoted 37 lines · Krzysztof Kozlowski
Quoted 15 lines · Binbin Zhou
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yamlDocumentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +0
-0Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 5
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +5
-0@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"Drop quotes from bopth.
Quoted 12 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +12
-0+ +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf:Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 23
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0Why not using SoC based compatible? It is preferred.
Hi Krzysztof:
Quoted 7 lines
So far, from the datasheet, I know that only the EXIOINTC of the Loongson-2K0500 is different from the other chips, and that is the "loongson,eio-num-vecs" below, which is 128, while all the others are 256.
My original idea was to add this property to make compatible consistent, and also to make it easier to add new chips if they have different eio-num-vecs.
We talk about different things. SoC based compatibles are preferred over version ones. This was on the lists expressed many times. Please provide a reason why you deviate from general recommendation. Flexibility and genericness of bindings is not a reason - it's the opposite of the argument, thus this will be a: NAK. :(
Quoted 18 lines
Quoted 9 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 27
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +4
-0+ + reg: + minItems: 1 + maxItems: 3You need to describe the items.
Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 33
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ + interrupt-controller: true + + interrupts: + description: + Interrupt source of the CPU interrupts.You need to describe the items.
Quoted 1 line
Do you mean a more detailed description?
I mean constraints on interrupts and/or description if they are not obvious.
Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Quoted 17 lines · Krzysztof Kozlowski
Quoted 17 lines
Quoted 16 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 27
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +4
-0+ + reg: + minItems: 1 + maxItems: 3You need to describe the items.>>>
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 33
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ + interrupt-controller: true + + interrupts: + description: + Interrupt source of the CPU interrupts.You need to describe the items.
Quoted 3 lines
Quoted 1 line
Do you mean a more detailed description?
I mean constraints on interrupts and/or description if they are not obvious.
Actually I noticed that for interrupts you provided the name, so it is description and you just need maxItems:1.
The reg however need list of items which clearly documents what is there.
Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
In reply to Krzysztof KozlowskiQuoted 60 lines · Krzysztof Kozlowski
Quoted 50 lines · Binbin Zhou
Quoted 37 lines · Krzysztof Kozlowski
Quoted 15 lines · Binbin Zhou
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yamlDocumentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +0
-0Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 5
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +5
-0@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"Drop quotes from bopth.
Quoted 12 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +12
-0+ +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf:Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 23
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0Why not using SoC based compatible? It is preferred.
Hi Krzysztof:
Quoted 7 lines
So far, from the datasheet, I know that only the EXIOINTC of the Loongson-2K0500 is different from the other chips, and that is the "loongson,eio-num-vecs" below, which is 128, while all the others are 256.
My original idea was to add this property to make compatible consistent, and also to make it easier to add new chips if they have different eio-num-vecs.
Quoted 7 lines
We talk about different things. SoC based compatibles are preferred over version ones. This was on the lists expressed many times. Please provide a reason why you deviate from general recommendation. Flexibility and genericness of bindings is not a reason - it's the opposite of the argument, thus this will be a: NAK. :(
Hi Krzysztof:
Allow me to give a brief overview of the current status of eiointc (DT-based):
Loongson-3A series supports eiointc;
Loongson-2K1000 does not support eiointc now;
Loongson-2K0500 supports eiointc, with differences fromLoongson-3, e.g. only up to 128 devices are supported;
Loongson-2K2000 supports eiointc, similar to Loongson-3.
....
As can be seen, there is now a bit of confusion in the chip's design of eiointc.
The design of eiointc is probably refined step by step with the chip. The same version of eiointc can be used for multiple chips, and the same chip series may also use different versions of eiointc. Low-end chips may use eiointc-2.0, and high-end chips may use eiointc-1.0, depending on the time it's produced.
So in the Loongson-2K series I have defined the current state as eiointc-1.0, using the dts property to indicate the maximum number of devices supported by eiointc that can be used directly in the driver.
If there are new changes to the design later on, such as the definition of registers, we can call it eiointc-2.0, which can also cover more than one chip.
Thanks.
Binbin
Quoted 25 lines
Quoted 18 lines
Quoted 9 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 27
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +4
-0+ + reg: + minItems: 1 + maxItems: 3You need to describe the items.
Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 33
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ + interrupt-controller: true + + interrupts: + description: + Interrupt source of the CPU interrupts.You need to describe the items.
Quoted 1 line
Do you mean a more detailed description?
I mean constraints on interrupts and/or description if they are not obvious.
Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Quoted 87 lines · Binbin Zhou
Quoted 60 lines · Krzysztof Kozlowski
Quoted 50 lines · Binbin Zhou
Quoted 37 lines · Krzysztof Kozlowski
Quoted 15 lines · Binbin Zhou
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yamlDocumentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +0
-0Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 5
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +5
-0@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"Drop quotes from bopth.
Quoted 12 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +12
-0+ +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf:Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 23
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0Why not using SoC based compatible? It is preferred.
Hi Krzysztof:
Quoted 7 lines
So far, from the datasheet, I know that only the EXIOINTC of the Loongson-2K0500 is different from the other chips, and that is the "loongson,eio-num-vecs" below, which is 128, while all the others are 256.
My original idea was to add this property to make compatible consistent, and also to make it easier to add new chips if they have different eio-num-vecs.Quoted 7 lines
We talk about different things. SoC based compatibles are preferred over version ones. This was on the lists expressed many times. Please provide a reason why you deviate from general recommendation. Flexibility and genericness of bindings is not a reason - it's the opposite of the argument, thus this will be a: NAK. :(
Hi Krzysztof:
Allow me to give a brief overview of the current status of eiointc (DT-based):
Loongson-3A series supports eiointc; Loongson-2K1000 does not support eiointc now; Loongson-2K0500 supports eiointc, with differences fromLoongson-3, e.g. only up to 128 devices are supported;
Loongson-2K2000 supports eiointc, similar to Loongson-3.
....As can be seen, there is now a bit of confusion in the chip's design of eiointc.
The design of eiointc is probably refined step by step with the chip. The same version of eiointc can be used for multiple chips, and the same chip series may also use different versions of eiointc. Low-end chips may use eiointc-2.0, and high-end chips may use eiointc-1.0, depending on the time it's produced.
Quoted 7 lines
So in the Loongson-2K series I have defined the current state as eiointc-1.0, using the dts property to indicate the maximum number of devices supported by eiointc that can be used directly in the driver.
If there are new changes to the design later on, such as the definition of registers, we can call it eiointc-2.0, which can also cover more than one chip.
Just go with SoC-based compatibles. If your version is not specific enough, then it is not a good way to represent the hardware.
Best regards,
Krzysztof
Huacai Chen
maintainerRe: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Hi, Krzysztof,
Quoted 93 lines · Krzysztof Kozlowski
Quoted 91 lines · Binbin Zhou
Quoted 60 lines · Krzysztof Kozlowski
Quoted 50 lines · Binbin Zhou
Quoted 37 lines · Krzysztof Kozlowski
Quoted 15 lines · Binbin Zhou
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yamlDocumentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +0
-0Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 5
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +5
-0@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"Drop quotes from bopth.
Quoted 12 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +12
-0+ +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf:Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 23
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0Why not using SoC based compatible? It is preferred.
Hi Krzysztof:
Quoted 7 lines
So far, from the datasheet, I know that only the EXIOINTC of the Loongson-2K0500 is different from the other chips, and that is the "loongson,eio-num-vecs" below, which is 128, while all the others are 256.
My original idea was to add this property to make compatible consistent, and also to make it easier to add new chips if they have different eio-num-vecs.Quoted 7 lines
We talk about different things. SoC based compatibles are preferred over version ones. This was on the lists expressed many times. Please provide a reason why you deviate from general recommendation. Flexibility and genericness of bindings is not a reason - it's the opposite of the argument, thus this will be a: NAK. :(
Hi Krzysztof:
Allow me to give a brief overview of the current status of eiointc (DT-based):
Loongson-3A series supports eiointc; Loongson-2K1000 does not support eiointc now; Loongson-2K0500 supports eiointc, with differences fromLoongson-3, e.g. only up to 128 devices are supported;
Loongson-2K2000 supports eiointc, similar to Loongson-3.
....As can be seen, there is now a bit of confusion in the chip's design of eiointc.
The design of eiointc is probably refined step by step with the chip. The same version of eiointc can be used for multiple chips, and the same chip series may also use different versions of eiointc. Low-end chips may use eiointc-2.0, and high-end chips may use eiointc-1.0, depending on the time it's produced.
So in the Loongson-2K series I have defined the current state as eiointc-1.0, using the dts property to indicate the maximum number of devices supported by eiointc that can be used directly in the driver.
Quoted 6 lines
Quoted 3 lines
If there are new changes to the design later on, such as the definition of registers, we can call it eiointc-2.0, which can also cover more than one chip.
Just go with SoC-based compatibles. If your version is not specific enough, then it is not a good way to represent the hardware.
EIOINTC is a bit like the existing LIOINTC which is already use version to represent hardware.
Huacai
Quoted 4 lines
Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Quoted 97 lines · Huacai Chen
Hi, Krzysztof,
Quoted 93 lines · Krzysztof Kozlowski
Quoted 91 lines · Binbin Zhou
Quoted 60 lines · Krzysztof Kozlowski
Quoted 50 lines · Binbin Zhou
Quoted 37 lines · Krzysztof Kozlowski
Quoted 15 lines · Binbin Zhou
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yamlDocumentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +0
-0Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 5
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +5
-0@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"Drop quotes from bopth.
Quoted 12 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +12
-0+ +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf:Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 23
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0Why not using SoC based compatible? It is preferred.
Hi Krzysztof:
Quoted 7 lines
So far, from the datasheet, I know that only the EXIOINTC of the Loongson-2K0500 is different from the other chips, and that is the "loongson,eio-num-vecs" below, which is 128, while all the others are 256.
My original idea was to add this property to make compatible consistent, and also to make it easier to add new chips if they have different eio-num-vecs.Quoted 7 lines
We talk about different things. SoC based compatibles are preferred over version ones. This was on the lists expressed many times. Please provide a reason why you deviate from general recommendation. Flexibility and genericness of bindings is not a reason - it's the opposite of the argument, thus this will be a: NAK. :(
Hi Krzysztof:
Allow me to give a brief overview of the current status of eiointc (DT-based):
Loongson-3A series supports eiointc; Loongson-2K1000 does not support eiointc now; Loongson-2K0500 supports eiointc, with differences fromLoongson-3, e.g. only up to 128 devices are supported;
Loongson-2K2000 supports eiointc, similar to Loongson-3.
....As can be seen, there is now a bit of confusion in the chip's design of eiointc.
The design of eiointc is probably refined step by step with the chip. The same version of eiointc can be used for multiple chips, and the same chip series may also use different versions of eiointc. Low-end chips may use eiointc-2.0, and high-end chips may use eiointc-1.0, depending on the time it's produced.
So in the Loongson-2K series I have defined the current state as eiointc-1.0, using the dts property to indicate the maximum number of devices supported by eiointc that can be used directly in the driver.
Quoted 8 lines
Quoted 6 lines
Quoted 3 lines
If there are new changes to the design later on, such as the definition of registers, we can call it eiointc-2.0, which can also cover more than one chip.
Just go with SoC-based compatibles. If your version is not specific enough, then it is not a good way to represent the hardware.
EIOINTC is a bit like the existing LIOINTC which is already use version to represent hardware.
Heh, so why did you go with version in compatible for liointc if it also does not match it correctly?
Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
In reply to Krzysztof KozlowskiQuoted 93 lines · Krzysztof Kozlowski
Quoted 91 lines · Binbin Zhou
Quoted 60 lines · Krzysztof Kozlowski
Quoted 50 lines · Binbin Zhou
Quoted 37 lines · Krzysztof Kozlowski
Quoted 15 lines · Binbin Zhou
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yamlDocumentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +0
-0Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 5
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +5
-0@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"Drop quotes from bopth.
Quoted 12 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +12
-0+ +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf:Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 23
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +6
-0+ - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0Why not using SoC based compatible? It is preferred.
Hi Krzysztof:
Quoted 7 lines
So far, from the datasheet, I know that only the EXIOINTC of the Loongson-2K0500 is different from the other chips, and that is the "loongson,eio-num-vecs" below, which is 128, while all the others are 256.
My original idea was to add this property to make compatible consistent, and also to make it easier to add new chips if they have different eio-num-vecs.Quoted 7 lines
We talk about different things. SoC based compatibles are preferred over version ones. This was on the lists expressed many times. Please provide a reason why you deviate from general recommendation. Flexibility and genericness of bindings is not a reason - it's the opposite of the argument, thus this will be a: NAK. :(
Hi Krzysztof:
Allow me to give a brief overview of the current status of eiointc (DT-based):
Loongson-3A series supports eiointc; Loongson-2K1000 does not support eiointc now; Loongson-2K0500 supports eiointc, with differences fromLoongson-3, e.g. only up to 128 devices are supported;
Loongson-2K2000 supports eiointc, similar to Loongson-3.
....As can be seen, there is now a bit of confusion in the chip's design of eiointc.
The design of eiointc is probably refined step by step with the chip. The same version of eiointc can be used for multiple chips, and the same chip series may also use different versions of eiointc. Low-end chips may use eiointc-2.0, and high-end chips may use eiointc-1.0, depending on the time it's produced.
So in the Loongson-2K series I have defined the current state as eiointc-1.0, using the dts property to indicate the maximum number of devices supported by eiointc that can be used directly in the driver.
Quoted 7 lines
Quoted 3 lines
If there are new changes to the design later on, such as the definition of registers, we can call it eiointc-2.0, which can also cover more than one chip.
Just go with SoC-based compatibles. If your version is not specific enough, then it is not a good way to represent the hardware.
Hi Krzysztof:
I have tried to write the following SoC-based compatibles, is it fine?
compatible:
enum:
- loongson,ls3a-eiointc # For MIPS Loongson-3A if necessary.
- loongson,ls2k0500-eiointc
- loongson,ls2k200-eiointc
....
Also remove the 'loongson,eio-num-vecs' property.
Thanks.
Binbin
Quoted 3 lines
Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Quoted 32 lines · Binbin Zhou
Quoted 22 lines
Quoted 22 lines
Hi Krzysztof:
Allow me to give a brief overview of the current status of eiointc (DT-based):
Loongson-3A series supports eiointc; Loongson-2K1000 does not support eiointc now; Loongson-2K0500 supports eiointc, with differences fromLoongson-3, e.g. only up to 128 devices are supported;
Loongson-2K2000 supports eiointc, similar to Loongson-3.
....As can be seen, there is now a bit of confusion in the chip's design of eiointc.
The design of eiointc is probably refined step by step with the chip. The same version of eiointc can be used for multiple chips, and the same chip series may also use different versions of eiointc. Low-end chips may use eiointc-2.0, and high-end chips may use eiointc-1.0, depending on the time it's produced.
So in the Loongson-2K series I have defined the current state as eiointc-1.0, using the dts property to indicate the maximum number of devices supported by eiointc that can be used directly in the driver.
Quoted 7 lines
Quoted 3 lines
If there are new changes to the design later on, such as the definition of registers, we can call it eiointc-2.0, which can also cover more than one chip.
Just go with SoC-based compatibles. If your version is not specific enough, then it is not a good way to represent the hardware.
Hi Krzysztof:
Quoted 7 lines
I have tried to write the following SoC-based compatibles, is it fine?
compatible:
enum:
- loongson,ls3a-eiointc # For MIPS Loongson-3A if necessary.
- loongson,ls2k0500-eiointc
- loongson,ls2k200-eiointc
Looks good, but didn't you state these are compatible between each other? I have impression there is a common set, so maybe one compatible work on other device with reduced number of devices?
Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Quoted 43 lines · Krzysztof Kozlowski
Quoted 32 lines · Binbin Zhou
Quoted 22 lines
Quoted 22 lines
Hi Krzysztof:
Allow me to give a brief overview of the current status of eiointc (DT-based):
Loongson-3A series supports eiointc; Loongson-2K1000 does not support eiointc now; Loongson-2K0500 supports eiointc, with differences fromLoongson-3, e.g. only up to 128 devices are supported;
Loongson-2K2000 supports eiointc, similar to Loongson-3.
....As can be seen, there is now a bit of confusion in the chip's design of eiointc.
The design of eiointc is probably refined step by step with the chip. The same version of eiointc can be used for multiple chips, and the same chip series may also use different versions of eiointc. Low-end chips may use eiointc-2.0, and high-end chips may use eiointc-1.0, depending on the time it's produced.
So in the Loongson-2K series I have defined the current state as eiointc-1.0, using the dts property to indicate the maximum number of devices supported by eiointc that can be used directly in the driver.
Quoted 7 lines
Quoted 3 lines
If there are new changes to the design later on, such as the definition of registers, we can call it eiointc-2.0, which can also cover more than one chip.
Just go with SoC-based compatibles. If your version is not specific enough, then it is not a good way to represent the hardware.
Hi Krzysztof:
Quoted 7 lines
I have tried to write the following SoC-based compatibles, is it fine?
compatible:
enum:
- loongson,ls3a-eiointc # For MIPS Loongson-3A if necessary.
- loongson,ls2k0500-eiointc
- loongson,ls2k200-eiointc
Quoted 4 lines
Looks good, but didn't you state these are compatible between each other? I have impression there is a common set, so maybe one compatible work on other device with reduced number of devices?
So far, the difference between ls2k SOCs is the number of devices supported by eiointc.
Do you mean use unified compatible and reuse loongson,eio-num-vecs?
Would this be possible, e.g.
compatible:
const: loongson,ls2k-eiointc
loongson,eio-num-vecs:
description:
The number of devices supported by the extended I/O interrupt vector.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 256
Thanks.
Binbin
Quoted 3 lines
Best regards,
Krzysztof
Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
Quoted 50 lines · Binbin Zhou
Quoted 43 lines · Krzysztof Kozlowski
Quoted 32 lines · Binbin Zhou
Quoted 22 lines
Quoted 22 lines
Hi Krzysztof:
Allow me to give a brief overview of the current status of eiointc (DT-based):
Loongson-3A series supports eiointc; Loongson-2K1000 does not support eiointc now; Loongson-2K0500 supports eiointc, with differences fromLoongson-3, e.g. only up to 128 devices are supported;
Loongson-2K2000 supports eiointc, similar to Loongson-3.
....As can be seen, there is now a bit of confusion in the chip's design of eiointc.
The design of eiointc is probably refined step by step with the chip. The same version of eiointc can be used for multiple chips, and the same chip series may also use different versions of eiointc. Low-end chips may use eiointc-2.0, and high-end chips may use eiointc-1.0, depending on the time it's produced.
So in the Loongson-2K series I have defined the current state as eiointc-1.0, using the dts property to indicate the maximum number of devices supported by eiointc that can be used directly in the driver.
Quoted 7 lines
Quoted 3 lines
If there are new changes to the design later on, such as the definition of registers, we can call it eiointc-2.0, which can also cover more than one chip.
Just go with SoC-based compatibles. If your version is not specific enough, then it is not a good way to represent the hardware.
Hi Krzysztof:
Quoted 7 lines
I have tried to write the following SoC-based compatibles, is it fine?
compatible:
enum:
- loongson,ls3a-eiointc # For MIPS Loongson-3A if necessary.
- loongson,ls2k0500-eiointc
- loongson,ls2k200-eiointcQuoted 4 lines
Looks good, but didn't you state these are compatible between each other? I have impression there is a common set, so maybe one compatible work on other device with reduced number of devices?
Quoted 6 lines
So far, the difference between ls2k SOCs is the number of devices supported by eiointc.
Do you mean use unified compatible and reuse loongson,eio-num-vecs?
Would this be possible, e.g.
No. I meant that maybe all these three should have been made compatible.
Best regards,
Krzysztof
Rob Herring
maintainerRe: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC
In reply to Binbin ZhouQuoted 44 lines · Binbin Zhou
Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yamlDocumentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +29
-0@@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <[email protected]> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0 + + reg: + minItems: 1 + maxItems: 3 + + interrupt-controller: true
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml line 39
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file +10
-0+ + interrupts: + description: + Interrupt source of the CPU interrupts. + + interrupt-names: + description: + List of names for the parent interrupts. + items: + - const: int0
Why do you need this if there is only 1 interrupt?
Rob
PATCH v2 2/2 irqchip/loongson-eiointc: Add DT init support
In reply to Binbin ZhouAdd EIOINTC irqchip DT support, which is needed for Loongson chips that are DT-based and support EIOINTC, such as Loongson-2K0500 SOC.
--- drivers/irqchip/irq-loongson-eiointc.c | 119 ++++++++++++++++++------- 1 file changed, 85 insertions(+), 34 deletions(-)
drivers/irqchip/irq-loongson-eiointc.c +85 -34
@@ -39,6 +39,7 @@ static int nr_pics;struct eiointc_priv {u32 node; +u32 vec_count;nodemask_t node_map;cpumask_t cpuspan_map;struct fwnode_handle *domain_handle;
@@ -156,18 +157,18 @@ static int eiointc_router_init(unsigned int cpu)if ((cpu_logical_map (cpu) %CORES_PER_EIO_NODE ) ==0 ) {eiointc_enable (); -for (i =0 ; i <VEC_COUNT /32 ; i++) { +for (i =0 ; i < eiointc_priv[0 ]->vec_count /32 ; i++) { data = (((1 << (i *2 +1 )) <<16 ) | (1 << (i *2 )));iocsr_write32 (data,EIOINTC_REG_NODEMAP + i *4 ); } -for (i =0 ; i <VEC_COUNT /32 /4 ; i++) { +for (i =0 ; i < eiointc_priv[0 ]->vec_count /32 /4 ; i++) { bit =BIT (1 + index);/* Route to IP[1 + index] */ data = bit | (bit <<8 ) | (bit <<16 ) | (bit <<24 );iocsr_write32 (data,EIOINTC_REG_IPMAP + i *4 ); } -for (i =0 ; i <VEC_COUNT /4 ; i++) { +for (i =0 ; i < eiointc_priv[0 ]->vec_count /4 ; i++) {/* Route to Node-0 Core-0 */ if (index ==0 ) bit =BIT (cpu_logical_map (0 ));
@@ -178,7 +179,7 @@ static int eiointc_router_init(unsigned int cpu)iocsr_write32 (data,EIOINTC_REG_ROUTE + i *4 ); } -for (i =0 ; i <VEC_COUNT /32 ; i++) { +for (i =0 ; i < eiointc_priv[0 ]->vec_count /32 ; i++) { data =0xffffffff ;iocsr_write32 (data,EIOINTC_REG_ENABLE + i *4 );iocsr_write32 (data,EIOINTC_REG_BOUNCE + i *4 );
@@ -198,7 +199,7 @@ static void eiointc_irq_dispatch(struct irq_desc *desc)chained_irq_enter (chip, desc); -for (i =0 ; i <VEC_REG_COUNT ; i++) { +for (i =0 ; i < eiointc_priv[0 ]->vec_count /VEC_COUNT_PER_REG ; i++) { pending =iocsr_read64 (EIOINTC_REG_ISR + (i <<3 ));iocsr_write64 (pending,EIOINTC_REG_ISR + (i <<3 ));while (pending) {
@@ -316,7 +317,7 @@ static void eiointc_resume(void)eiointc_router_init (0 );for (i =0 ; i < nr_pics; i++) { -for (j =0 ; j <VEC_COUNT ; j++) { +for (j =0 ; j < eiointc_priv[0 ]->vec_count; j++) { desc =irq_resolve_mapping (eiointc_priv[i]->eiointc_domain, j);if (desc && desc->handle_irq && desc->handle_irq != handle_bad_irq) {raw_spin_lock (&desc->lock);
@@ -373,11 +374,44 @@ static int __init acpi_cascade_irqdomain_init(void)return 0 ; } +static int __init eiointc_init (struct eiointc_priv *priv,int parent_irq, +u64 node_map) +{ +int i; + + node_map = node_map ? node_map :-1ULL ; +for_each_possible_cpu (i) { +if (node_map & (1ULL << (cpu_to_eio_node (i)))) { +node_set (cpu_to_eio_node (i), priv->node_map); +cpumask_or (&priv->cpuspan_map, &priv->cpuspan_map, +cpumask_of (i)); + } + } + + priv->eiointc_domain =irq_domain_create_linear (priv->domain_handle, + priv->vec_count, + &eiointc_domain_ops, + priv); +if (!priv->eiointc_domain) { +pr_err ("loongson-extioi: cannot add IRQ domain\n" ); +return -ENOMEM ; + } + + eiointc_priv[nr_pics++] = priv; +eiointc_router_init (0 ); +irq_set_chained_handler_and_data (parent_irq, eiointc_irq_dispatch, priv); +register_syscore_ops (&eiointc_syscore_ops); +cpuhp_setup_state_nocalls (CPUHP_AP_IRQ_LOONGARCH_STARTING , +"irqchip/loongarch/intc:starting" , + eiointc_router_init,NULL ); + +return 0 ; +} +int __init eiointc_acpi_init (struct irq_domain *parent,struct acpi_madt_eio_pic *acpi_eiointc) { -int i, ret, parent_irq; -unsigned long node_map; +int parent_irq, ret;struct eiointc_priv *priv; priv =kzalloc (sizeof (*priv),GFP_KERNEL );
@@ -391,39 +425,20 @@ int __init eiointc_acpi_init(struct irq_domain *parent, goto out_free_priv; } + priv->vec_count =VEC_COUNT ; priv->node = acpi_eiointc->node; - node_map = acpi_eiointc->node_map ? :-1ULL ; - -for_each_possible_cpu (i) { -if (node_map & (1ULL <<cpu_to_eio_node (i))) { -node_set (cpu_to_eio_node (i), priv->node_map); -cpumask_or (&priv->cpuspan_map, &priv->cpuspan_map,cpumask_of (i)); - } - } - -/* Setup IRQ domain */ - priv->eiointc_domain =irq_domain_create_linear (priv->domain_handle,VEC_COUNT , - &eiointc_domain_ops, priv); -if (!priv->eiointc_domain) { -pr_err ("loongson-eiointc: cannot add IRQ domain\n" ); - goto out_free_handle; - } - - eiointc_priv[nr_pics++] = priv; - -eiointc_router_init (0 ); - parent_irq =irq_create_mapping (parent, acpi_eiointc->cascade); -irq_set_chained_handler_and_data (parent_irq, eiointc_irq_dispatch, priv); -register_syscore_ops (&eiointc_syscore_ops); -cpuhp_setup_state_nocalls (CPUHP_AP_IRQ_LOONGARCH_STARTING , -"irqchip/loongarch/intc:starting" , - eiointc_router_init,NULL ); + ret =eiointc_init (priv, parent_irq, acpi_eiointc->node_map); +if (ret <0 ) + goto out_free_handle;acpi_set_vec_parent (acpi_eiointc->node, priv->eiointc_domain, pch_group);acpi_set_vec_parent (acpi_eiointc->node, priv->eiointc_domain, msi_group); + ret =acpi_cascade_irqdomain_init (); +if (ret <0 ) + goto out_free_handle;return ret;
@@ -435,3 +450,39 @@ int __init eiointc_acpi_init(struct irq_domain *parent,return -ENOMEM ; } + +static int __init eiointc_of_init (struct device_node *of_node, +struct device_node *parent) +{ +int parent_irq, ret; +struct eiointc_priv *priv; + + priv =kzalloc (sizeof (*priv),GFP_KERNEL ); +if (!priv) +return -ENOMEM ; + + parent_irq =of_irq_get_byname (of_node,"int0" ); +if (parent_irq <=0 ) { + ret = -ENODEV ; + goto out_free_priv; + } + + ret =of_property_read_u32 (of_node,"loongson,eio-num-vecs" , &priv->vec_count); +if (ret <0 ) + goto out_free_priv; + + priv->node =0 ; + priv->domain_handle =of_node_to_fwnode (of_node); + + ret =eiointc_init (priv, parent_irq,0 ); +if (ret <0 ) + goto out_free_priv; + +return 0 ; + +out_free_priv: +kfree (priv); +return ret; +} + +IRQCHIP_DECLARE (loongson_eiointc,"loongson,eiointc-1.0" , eiointc_of_init);
Signature · 1 line
2.39.0
Quoted 32 lines · Binbin Zhou
Hi all:
Add EIOINTC irqchip DT support, which is needed for Loongson chips that are DT-based and support EIOINTC, such as the Loongson-2K0500 SOC.
We need to handle the "
parent_irq" and "eio-num-vecs" parameters passed from DTS.Thanks.
---
V2:
- Add the dt-bindings file (1/2);
- patch(2/2)
- Remove forgotten debugging messages;
- Rename properties name: "vec_count"->"loongson,eio-num-vecs";
- Change compatible string name to "loongson,eiointc-1.0".Binbin Zhou (2):
dt-bindings: interrupt-controller: Add Loongson EIOINTC irqchip/loongson-eiointc: Add DT init support.../loongson,eiointc.yaml | 80 ++++++++++++ drivers/irqchip/irq-loongson-eiointc.c | 119 +++++++++++++----- 2 files changed, 165 insertions(+), 34 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml--
2.39.0