LoongArch: Add built-in dtb support
Subsystems (2)
cover LoongArch: Add built-in dtb support
Hi all:
This patchset introduces LoongArch's built-in dtb support.
As we know, the Loongson-2K family supports DT. Inevitably, some systems do not provide a useful device tree to the kernel at boot time. Chasing around bootloaders for these systems is a headache, so we just keep a device tree table in the kernel, keyed by the dts filename, that contains the relevant DTBs.
Thanks.
Binbin Zhou (6):
dt-bindings: loongarch: Add CPU bindings for LoongArch
dt-bindings: loongarch: Add Loongson SoC boards compatibles
LoongArch: Allow device trees to be built into the kernel
LoongArch: DeviceTree for Loongson-2K0500
LoongArch: DeviceTree for Loongson-2K1000
LoongArch: DeviceTree for Loongson-2K2000
.../devicetree/bindings/loongarch/boards.yaml | 31 + .../devicetree/bindings/loongarch/cpus.yaml | 65 ++ arch/loongarch/Kconfig | 16 + arch/loongarch/Makefile | 10 +- arch/loongarch/boot/dts/Makefile | 7 +- arch/loongarch/boot/dts/loongson_2k0500.dts | 311 ++++++++++ arch/loongarch/boot/dts/loongson_2k1000.dts | 565 ++++++++++++++++++ arch/loongarch/boot/dts/loongson_2k2000.dts | 417 +++++++++++++ arch/loongarch/kernel/setup.c | 9 +- 9 files changed, 1425 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yaml create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yaml create mode 100644 arch/loongarch/boot/dts/loongson_2k0500.dts create mode 100644 arch/loongarch/boot/dts/loongson_2k1000.dts create mode 100644 arch/loongarch/boot/dts/loongson_2k2000.dts
Signature · 1 line
2.39.3
PATCH 1/6 dt-bindings: loongarch: Add CPU bindings for LoongArch
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
--- .../devicetree/bindings/loongarch/cpus.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yaml
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +65 -0
@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every CPU. + +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + device_type: true + + clock-frequency: + description: The frequency of cpu in Hz. + + model: + $ref: /schemas/types.yaml#/definitions/string + description: User-visible cpu name in /proc/cpuinfo. + +required: + - compatible + - reg + - clock-frequency + +additionalProperties: false + +examples: + - | + cpus { + #size-cells = <0>; + #address-cells = <1>; + + model = "Loongson-2K1000"; + + cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0>; + clock-frequency = <1000000000>; + }; + + cpu@1 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <1>; + clock-frequency = <1000000000>; + }; + }; + +...
Signature · 1 line
2.39.3
Re: [PATCH 1/6] dt-bindings: loongarch: Add CPU bindings for LoongArch
Quoted 34 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +19
-0@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every CPU. + +properties: + compatible: + enum:
Documentation/devicetree/bindings/loongarch/cpus.yaml line 29
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +10
-0+ - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + device_type: true + + clock-frequency: + description: The frequency of cpu in Hz.
Why don't you just add a ref to the common cpu schema and use the standard properties for communicating clock frequencies? You then get the standard properties for l1 caches, power management, frequency scaling etc as a side effect.
Cheers,
Conor.
Re: [PATCH 1/6] dt-bindings: loongarch: Add CPU bindings for LoongArch
Quoted 42 lines · Conor Dooley
Quoted 41 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +26
-0@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every CPU. + +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + device_type: true
Quoted 9 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml line 29
Quoted 3 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +3
-0+ + clock-frequency: + description: The frequency of cpu in Hz.Why don't you just add a ref to the common cpu schema and use the standard properties for communicating clock frequencies? You then get the standard properties for l1 caches, power management, frequency scaling etc as a side effect.
And operating-points-v2... unless all Loongson CPUs work with only one frequency and do not allow dynamic scaling?
Best regards,
Krzysztof
Re: [PATCH 1/6] dt-bindings: loongarch: Add CPU bindings for LoongArch
In reply to Conor DooleyQuoted 43 lines · Conor Dooley
Quoted 41 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +26
-0@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every CPU. + +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + device_type: true
Quoted 8 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml line 29
Quoted 3 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +3
-0+ + clock-frequency: + description: The frequency of cpu in Hz.Why don't you just add a ref to the common cpu schema and use the standard properties for communicating clock frequencies? You then get the standard properties for l1 caches, power management, frequency scaling etc as a side effect.
Hi Conor:
Sorry, not sure if I understand correctly. Do the standard attributes refer to the following:
power-domains = <>
clocks = <>
i-cache-size = <>
d-cache-size = <>
next-level-cache = <>
Thanks.
Binbin
Quoted 3 lines
Cheers,
Conor.
Re: [PATCH 1/6] dt-bindings: loongarch: Add CPU bindings for LoongArch
Quoted 55 lines · Binbin Zhou
Quoted 43 lines · Conor Dooley
Quoted 41 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +26
-0@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every CPU. + +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + device_type: trueQuoted 8 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml line 29
Quoted 3 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +3
-0+ + clock-frequency: + description: The frequency of cpu in Hz.Why don't you just add a ref to the common cpu schema and use the standard properties for communicating clock frequencies? You then get the standard properties for l1 caches, power management, frequency scaling etc as a side effect.
Hi Conor:
Quoted 8 lines
Sorry, not sure if I understand correctly. Do the standard attributes refer to the following:
power-domains = <>
clocks = <>
i-cache-size = <>
d-cache-size = <>
next-level-cache = <>
Yes, those are the sort of things I meant.
Cheers,
Conor.
Re: [PATCH 1/6] dt-bindings: loongarch: Add CPU bindings for LoongArch
In reply to Binbin ZhouQuoted 20 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +5
-0@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
Documentation/devicetree/bindings/loongarch/cpus.yaml line 15
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +10
-0+ +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every CPU.
I understand you copied it from ARM, but I would prefer to have here something meaningful. Bindings description does not explain what is DTS, but explains what the hardware is.
Quoted 8 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +8
-0+ +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg:
Documentation/devicetree/bindings/loongarch/cpus.yaml line 33
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +10
-0+ maxItems: 1 + + device_type: true + + clock-frequency: + description: The frequency of cpu in Hz. + + model: + $ref: /schemas/types.yaml#/definitions/string + description: User-visible cpu name in /proc/cpuinfo.
First, aren't you mixing nodes?
Second, it is derived from compatible, so no need for such property.
Quoted 5 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +5
-0+ +required: + - compatible + - reg + - clock-frequency
Documentation/devicetree/bindings/loongarch/cpus.yaml line 48
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +10
-0+ +additionalProperties: false + +examples: + - | + cpus { + #size-cells = <0>; + #address-cells = <1>; + + model = "Loongson-2K1000";
Drop, not related.
Best regards,
Krzysztof
Re: [PATCH 1/6] dt-bindings: loongarch: Add CPU bindings for LoongArch
Quoted 28 lines · Krzysztof Kozlowski
Quoted 26 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +11
-0@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> +
Quoted 8 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml line 15
Quoted 4 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +4
-0+description: + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every CPU.I understand you copied it from ARM, but I would prefer to have here something meaningful. Bindings description does not explain what is DTS, but explains what the hardware is.
Hi Krzysztof:
I am very sorry, this is my problem and I will rewrite this part.
Quoted 14 lines
Quoted 14 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +13
-0+ +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + device_type: true + + clock-frequency:
Quoted 8 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml line 33
Quoted 5 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +5
-0+ description: The frequency of cpu in Hz. + + model: + $ref: /schemas/types.yaml#/definitions/string + description: User-visible cpu name in /proc/cpuinfo.First, aren't you mixing nodes?
Second, it is derived from compatible, so no need for such property.
Well, this attribute is an attempt to tweak it.
As the description says, this attribute was added to show the model name in /proc/cpuinfo. here, we will show the custom name instead of using the cpu core name directly.
For example, on a Loongson-3A5000 machine, although its cpu core is la464, we can see:
[root@fedora ~]# cat /proc/cpuinfo
system type : generic-loongson-machine
..............
Model Name : Loongson-3A5000-HV
............
CPU MHz : 2500.00
...........
Unfortunately, some Loongson-2K chips are not designed with corresponding CPUNAME registers, so we expect to add them in the DTS.
At first, we considered writing it directly into cpu compatible, but it seems that dts compatible is all lower case, while our desired model name contains upper case letters.
What do you think if we repositioned this attribute under cpu?
cpu0: cpu@0 {
compatible = "loongson,la264".
model = "Loongson-2K1000".
device_type = "cpu".
reg= <0x0>.
.....
}.Quoted 22 lines
Quoted 6 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +5
-0+ +required: + - compatible + - reg + - clock-frequencyDocumentation/devicetree/bindings/loongarch/cpus.yaml line 48
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +10
-0+ +additionalProperties: false + +examples: + - | + cpus { + #size-cells = <0>; + #address-cells = <1>; + + model = "Loongson-2K1000";Drop, not related.
Best regards,
Krzysztof
Re: [PATCH 1/6] dt-bindings: loongarch: Add CPU bindings for LoongArch
Quoted 66 lines · Binbin Zhou
Quoted 28 lines · Krzysztof Kozlowski
Quoted 26 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +11
-0@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> +Quoted 8 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml line 15
Quoted 4 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +4
-0+description: + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every CPU.I understand you copied it from ARM, but I would prefer to have here something meaningful. Bindings description does not explain what is DTS, but explains what the hardware is.
Hi Krzysztof:
I am very sorry, this is my problem and I will rewrite this part.
Quoted 14 lines
Quoted 14 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +13
-0+ +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + device_type: true + + clock-frequency:Quoted 8 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml line 33
Quoted 5 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +5
-0+ description: The frequency of cpu in Hz. + + model: + $ref: /schemas/types.yaml#/definitions/string + description: User-visible cpu name in /proc/cpuinfo.First, aren't you mixing nodes?
Second, it is derived from compatible, so no need for such property.
Quoted 5 lines
Well, this attribute is an attempt to tweak it.
As the description says, this attribute was added to show the model name in
/proc/cpuinfo. here, we will show the custom name instead of using the cpu core name directly.
DTS is not some translation layer. You can decode compatible and put into /proc/cpuinfo whatever you wish.
Quoted 11 lines
For example, on a Loongson-3A5000 machine, although its cpu core is la464, we can see:
[root@fedora ~]# cat/proc/cpuinfo
system type : generic-loongson-machine
..............
Model Name : Loongson-3A5000-HV
............
CPU MHz : 2500.00
...........
Quoted 8 lines
Unfortunately, some Loongson-2K chips are not designed with corresponding CPUNAME registers, so we expect to add them in the DTS.
At first, we considered writing it directly into cpu compatible, but it seems that dts compatible is all lower case, while our desired model name contains upper case letters.
What do you think if we repositioned this attribute under cpu?
You already did it, so about which solution we talk about?
Anyway, I am against store translation of compatibles in DTS.
Best regards,
Krzysztof
PATCH 2/6 dt-bindings: loongarch: Add Loongson SoC boards compatibles
In reply to Binbin ZhouAdd Loongson SoC boards binding with DT schema format using json-schema
--- .../devicetree/bindings/loongarch/boards.yaml | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yaml
Documentation/devicetree/bindings/loongarch/boards.yaml new file +31 -0
@@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SoC-based boards + +maintainers: + - Binbin Zhou <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Loongson-2K0500 processor based boards + items: + - const: loongson,ls2k0500 + + - description: Loongson-2K1000 processor based boards + items: + - const: loongson,ls2k1000 + + - description: Loongson-2K2000 processor based boards + items: + - const: loongson,ls2k2000 + +additionalProperties: true + +...
Signature · 1 line
2.39.3
Re: [PATCH 2/6] dt-bindings: loongarch: Add Loongson SoC boards compatibles
Quoted 31 lines · Binbin Zhou
Add Loongson SoC boards binding with DT schema format using json-schema
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/boards.yaml | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yamlDocumentation/devicetree/bindings/loongarch/boards.yaml new file +17
-0@@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SoC-based boards + +maintainers: + - Binbin Zhou <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Loongson-2K0500 processor based boards
Documentation/devicetree/bindings/loongarch/boards.yaml line 27
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/boards.yaml new file +10
-0+ items: + - const: loongson,ls2k0500 + + - description: Loongson-2K1000 processor based boards + items: + - const: loongson,ls2k1000 + + - description: Loongson-2K2000 processor based boards + items: + - const: loongson,ls2k2000
From what I do know of loongarch stuff, these are all compatibles for SoCs, not boards. The usual model would be to do something like items:
- const: loongsoon,ls2k1000-dev-kit
- const: loongsoon,ls2k1000
Where you have a compatible for the SoC and one for the board.
Cheers,
Conor.
PATCH 3/6 LoongArch: Allow device trees to be built into the kernel
In reply to Binbin ZhouSome systems do not provide a useful device tree to the kernel at boot time. Let's keep a device tree table in the kernel, keyed by the dts filename, containing the relevant DTBs.
--- arch/loongarch/Kconfig | 16 ++++++++++++++++ arch/loongarch/Makefile | 10 ++++++++-- arch/loongarch/boot/dts/Makefile | 3 +-- arch/loongarch/kernel/setup.c | 9 +++++++-- 4 files changed, 32 insertions(+), 6 deletions(-)
arch/loongarch/Kconfig +16 -0
@@ -308,6 +308,22 @@ config 64KB_3LEVEL endchoice +config BUILTIN_DTB + bool "Enable builtin dtb in kernel" + depends on OF + help + Some systems do not provide a useful device tree to the kernel at boot + time. Let's keep a device tree table in the kernel, keyed by the dts + filename, containing the relevant DTBs. + +config BUILTIN_DTB_NAME + string "Source file for LoongArch builtin dtb" + depends on BUILTIN_DTB + help + Base name (without suffix, relative to arch/loongarch/boot/dts/) + for the DTS file that will be used to produce the DTB linked into the + kernel. + config CMDLINE string "Built-in kernel command line" help
arch/loongarch/Makefile +8 -2
@@ -5,7 +5,8 @@ boot := arch/loongarch/boot -KBUILD_DEFCONFIG := loongson3_defconfig +KBUILD_DEFCONFIG := loongson3_defconfig +KBUILD_DTBS := dtbs image-name-y := vmlinux image-name-$(CONFIG_EFI_ZBOOT) := vmlinuz
@@ -130,11 +131,14 @@ PHONY += vdso_install vdso_install: $(Q)$(MAKE) $(build)=arch/loongarch/vdso $@ -all: $(notdir $(KBUILD_IMAGE)) +all: $(notdir $(KBUILD_IMAGE)) $(KBUILD_DTBS) vmlinux.elf vmlinux.efi vmlinuz.efi: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(bootvars-y) $(boot)/$@ +# device-trees +core-y += arch/loongarch/boot/dts/ + install: $(Q)install -D -m 755 $(KBUILD_IMAGE) $(INSTALL_PATH)/$(image-name-y)-$(KERNELRELEASE) $(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE)
@@ -142,5 +146,7 @@ install: define archhelp echo ' install - install kernel into $(INSTALL_PATH)' + echo ' dtbs - Device-tree blobs for enabled boards' + echo ' dtbs_install - Install dtbs to $(INSTALL_DTBS_PATH)' echo endef
arch/loongarch/boot/dts/Makefile +1 -2
@@ -1,4 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -dtstree := $(srctree)/$(src) -dtb-y := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) +obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/kernel/setup.c +7 -2
@@ -296,8 +296,13 @@ static void __init fdt_setup(void)if (acpi_os_get_root_pointer ())return ; -/* Look for a device tree configuration table entry */ - fdt_pointer =efi_fdt_pointer (); +/* We prefer to try to use built-in dtb, checking its legality first. */ +if (!fdt_check_header (__dtb_start)) + fdt_pointer = __dtb_start; +else +/* Fallback to efi dtb, when built-in dtb is not available. */ + fdt_pointer =efi_fdt_pointer (); +if (!fdt_pointer ||fdt_check_header (fdt_pointer))return ;
Signature · 1 line
2.39.3
PATCH 4/6 LoongArch: DeviceTree for Loongson-2K0500
In reply to Binbin ZhouAdd DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.
--- arch/loongarch/boot/dts/Makefile | 2 + arch/loongarch/boot/dts/loongson_2k0500.dts | 311 ++++++++++++++++++++ 2 files changed, 313 insertions(+) create mode 100644 arch/loongarch/boot/dts/loongson_2k0500.dts
arch/loongarch/boot/dts/Makefile +2 -0
@@ -1,3 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only +dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb + obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson_2k0500.dts new file +311 -0
311 lines not on this page · raw message
Signature · 1 line
2.39.3
Re: [PATCH 4/6] LoongArch: DeviceTree for Loongson-2K0500
Quoted 4 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.
Signed-off-by Binbin Zhou <[email protected]>
Keep subject prefixes with existing style, so: "loongarch: dts:"
Quoted 22 lines
--- arch/loongarch/boot/dts/Makefile | 2 + arch/loongarch/boot/dts/loongson_2k0500.dts | 311 ++++++++++++++++++++ 2 files changed, 313 insertions(+) create mode 100644 arch/loongarch/boot/dts/loongson_2k0500.dtsarch/loongarch/boot/dts/Makefile +2
-0@@ -1,3 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only +dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb + obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson_2k0500.dts new file +0
-0
arch/loongarch/boot/dts/loongson_2k0500.dts line 9
Quoted 9 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +9
-0@@ -0,0 +1,311 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "LS2K0500 Reference Board"; + compatible = "loongson,ls2k0500";
Incorrect compatible. This is board, not SoC.
arch/loongarch/boot/dts/loongson_2k0500.dts line 22
Quoted 13 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +13
-0+ + #address-cells = <2>; + #size-cells = <2>; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + serial0 = &cpu_uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon";
Drop bootargs. Not relevant to mainline.
arch/loongarch/boot/dts/loongson_2k0500.dts line 29
Quoted 7 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +7
-0+ }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + model = "Loongson-2K0500";
Does not match your bindings.
It does not look like you tested the DTS against bindings. Please run make dtbs_check (see Documentation/devicetree/bindings/writing-schema.rst for instructions).
Quoted 37 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +37
-0+ + cpu0: cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0x0>; + clock-frequency = <500000000>; /* 500MHz */ + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + }; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */ + <0x00000000 0x90000000 0x00000000 0x60000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x00000000 0x02000000>; + linux,cma-default; + }; + }; + + ref_100m: clock-ref-100m {
arch/loongarch/boot/dts/loongson_2k0500.dts line 76
Quoted 10 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +10
-0+ compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "ref_100m"; + }; + + cpuintc: interrupt-controller { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "loongson,cpu-interrupt-controller";
compatible is always the first property.
arch/loongarch/boot/dts/loongson_2k0500.dts line 78
Quoted 2 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +2
-0+ }; +
Missing soc node.
Quoted 32 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +32
-0+ liointc0: interrupt-controller@1fe11400 { + compatible = "loongson,liointc-2.0"; + reg = <0 0x1fe11400 0 0x40>, + <0 0x1fe11040 0 0x8>; + reg-names = "main", "isr0"; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <2>; + interrupt-names = "int0"; + loongson,parent_int_map = <0xffffffff>, /* int0 */ + <0x00000000>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + liointc1: interrupt-controller@1fe11440 { + compatible = "loongson,liointc-2.0"; + reg = <0 0x1fe11440 0 0x40>, + <0 0x1fe11048 0 0x8>; + reg-names = "main", "isr0"; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <4>; + interrupt-names = "int2"; + + loongson,parent_int_map = <0x00000000>, /* int0 */ + <0x00000000>, /* int1 */ + <0xffffffff>, /* int2 */ + <0x00000000>; /* int3 */ + };
arch/loongarch/boot/dts/loongson_2k0500.dts line 120
Quoted 10 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +10
-0+ + eiointc: interrupt-controller@1fe11600 { + compatible = "loongson,ls2k0500-eiointc"; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&cpuintc>; + interrupts = <3>; + }; + + soc {
Oh, here it is. All MMIO nodes are part of SoC node, not top-level. You did not check for warnings, right?
Be sure you do not introduce any new W=1 warnings (make dtbs).
Anyway, this is SoC, right? So it should be in DTSI. Don't mix boards (DTS) and SoCs (DTSI).
arch/loongarch/boot/dts/loongson_2k0500.dts line 131
Quoted 11 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +11
-0+ compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0 0x10000000 0 0x10000000 0 0x10000000>, + <0 0x2000000 0 0x2000000 0 0x2000000>, + <0 0x20000000 0 0x20000000 0 0x10000000>, + <0 0x40000000 0 0x40000000 0 0x40000000>, + <0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>; + + reboot {
And this is not part of SoC. You don't have here reg.
arch/loongarch/boot/dts/loongson_2k0500.dts line 135
Quoted 4 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +4
-0+ compatible = "syscon-reboot"; + regmap = <&pmc>; + offset = <0x30>; + mask = <0x1>;
How does it even work? offset of what? Did you even test it?
Quoted 7 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +7
-0+ }; + + poweroff { + compatible = "syscon-poweroff"; + regmap = <&pmc>; + offset = <0x14>; + mask = <0x3c00>;
arch/loongarch/boot/dts/loongson_2k0500.dts line 152
Quoted 10 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +10
-0+ value = <0x3c00>; + }; + + gmac0: ethernet@1f020000 { + compatible = "snps,dwmac-3.70a"; + reg = <0 0x1f020000 0 0x10000>; + interrupt-parent = <&liointc0>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + mac-address = [ 64 48 48 48 48 60 ];/* [>mac 64:48:48:48:48:60 <]*/
Yep, because all boards in the world will come with exactly this one MAC address. Drop.
arch/loongarch/boot/dts/loongson_2k0500.dts line 163
Quoted 11 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +11
-0+ phy-mode = "rgmii"; + bus_id = <0x0>; + }; + + gmac1: ethernet@1f030000 { + compatible = "snps,dwmac-3.70a"; + reg = <0 0x1f030000 0 0x10000>; + interrupt-parent = <&liointc0>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + mac-address = [ 64 48 48 48 48 61 ];/* [>mac 64:48:48:48:48:61 <]*/
Drop.
Quoted 43 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +43
-0+ phy-mode = "rgmii"; + bus_id = <0x1>; + }; + + sata@1f040000 { + compatible = "snps,spear-ahci"; + reg = <0 0x1f040000 0 0x10000>; + interrupt-parent = <&eiointc>; + interrupts = <75>; + }; + + ehci@1f050000 { + compatible = "generic-ehci"; + reg = <0 0x1f050000 0 0x8000>; + interrupt-parent = <&eiointc>; + interrupts = <71>; + }; + + ohci@1f058000 { + compatible = "generic-ohci"; + reg = <0 0x1f058000 0 0x8000>; + interrupt-parent = <&eiointc>; + interrupts = <72>; + }; + + clk: clock-controller@1fe10400 { + compatible = "loongson,ls2k-clk"; + reg = <0 0x1fe00400 0 0x30>; + #clock-cells = <1>; + clocks = <&ref_100m>; + clock-names = "ref_100m"; + status = "disabled"; + }; + + cpu_uart0: serial@1ff40800 { + compatible = "ns16550a"; + reg = <0 0x1ff40800 0 0x10>; + clock-frequency = <100000000>; + interrupt-parent = <&eiointc>; + interrupts = <2>; + no-loopback-test; + }; +
arch/loongarch/boot/dts/loongson_2k0500.dts line 216
Quoted 10 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +10
-0+ i2c@1ff48000 { + compatible = "loongson,ls2k-i2c"; + reg = <0 0x1ff48000 0 0x0800>; + interrupt-parent = <&eiointc>; + interrupts = <14>; + + #address-cells = <1>; + #size-cells = <0>; + eeprom@57 { + compatible = "atmel,24c16";
Are you sure eeprom is part of SoC? Again, aren't you mixing them?
Quoted 56 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +56
-0+ reg = <0x57>; + pagesize = <16>; + }; + }; + + i2c@1ff48800 { + compatible = "loongson,ls2k-i2c"; + reg = <0 0x1ff48800 0 0x0800>; + interrupt-parent = <&eiointc>; + interrupts = <15>; + status = "disabled"; + }; + + i2c@1ff49000 { + compatible = "loongson,ls2k-i2c"; + reg = <0 0x1ff49000 0 0x0800>; + interrupt-parent = <&eiointc>; + interrupts = <16>; + status = "disabled"; + }; + + i2c@1ff49800 { + compatible = "loongson,ls2k-i2c"; + reg = <0 0x1ff49800 0 0x0800>; + interrupt-parent = <&eiointc>; + interrupts = <17>; + status = "disabled"; + }; + + pixi2c@1ff4a000 { + compatible = "loongson,ls2k-i2c"; + reg = <0 0x1ff4a000 0 0x0800>; + interrupt-parent = <&eiointc>; + interrupts = <18>; + status = "disabled"; + }; + + pixi2c@1ff4a800 { + compatible = "loongson,ls2k-i2c"; + reg = <0 0x1ff4a800 0 0x0800>; + interrupt-parent = <&eiointc>; + interrupts = <19>; + status = "disabled"; + }; + + pmc: acpi@1ff6c000 { + compatible = "syscon"; + reg = <0x0 0x1ff6c000 0x0 0x58>; + interrupt-parent = <&eiointc>; + interrupts = <56>; + suspend-address = <0x1c000500>; + }; + + pcie@16800000 { + compatible = "loongson,ls2k-pci"; + device_type = "pci";
arch/loongarch/boot/dts/loongson_2k0500.dts line 282
Quoted 10 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +10
-0+ #address-cells = <3>; + #size-cells = <2>; + + reg = <0 0x1a000000 0 0x02000000>, + <0xfe 0x00000000 0 0x20000000>; + + ranges = <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>, + <0x01000000 0 0x00004000 0 0x16404000 0x0 0x4000>; + + pci_bridge@0,0 {
No underscores in node names.
Node names should be generic. See also explanation and list of examples in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
Quoted 4 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +4
-0+ compatible = "pci0014,1a05.1", + "pci0014,1a05", + "pciclass,060400", + "pciclass,0604";
arch/loongarch/boot/dts/loongson_2k0500.dts line 296
Quoted 10 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +10
-0+ + reg = <0x0000 0x0 0x0 0x0 0x0>; + interrupts = <81>; + interrupt-parent = <&eiointc>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &eiointc 81>; + }; + + pci_bridge@1,0 {
Ditto
Quoted 5 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +5
-0+ compatible = "pci0014,1a05.1", + "pci0014,1a05", + "pciclass,060400", + "pciclass,0604"; +
arch/loongarch/boot/dts/loongson_2k0500.dts line 311
Quoted 10 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +10
-0+ reg = <0x0800 0x0 0x0 0x0 0x0>; + interrupts = <82>; + interrupt-parent = <&eiointc>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &eiointc 82>; + }; + }; + }; +};
Best regards,
Krzysztof
Re: [PATCH 4/6] LoongArch: DeviceTree for Loongson-2K0500
In reply to Binbin ZhouQuoted 8 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.
Signed-off-by Binbin Zhou <[email protected]>---
arch/loongarch/boot/dts/loongson_2k0500.dts new file +1
-0+
arch/loongarch/boot/dts/loongson_2k0500.dts line 263
Quoted 10 lines
arch/loongarch/boot/dts/loongson_2k0500.dts new file +10
-0+ pixi2c@1ff4a800 { + compatible = "loongson,ls2k-i2c"; + reg = <0 0x1ff4a800 0 0x0800>; + interrupt-parent = <&eiointc>; + interrupts = <19>; + status = "disabled"; + }; + + pmc: acpi@1ff6c000 { + compatible = "syscon";
One more - this is not allowed and clear NAK.
Best regards,
Krzysztof
PATCH 5/6 LoongArch: DeviceTree for Loongson-2K1000
In reply to Binbin ZhouAdd DeviceTree file for Loongson-2K1000 processor, which integrates two 64-bit dual emission superscalar LA264 processor cores.
--- arch/loongarch/boot/dts/Makefile | 3 +- arch/loongarch/boot/dts/loongson_2k1000.dts | 565 ++++++++++++++++++++ 2 files changed, 567 insertions(+), 1 deletion(-) create mode 100644 arch/loongarch/boot/dts/loongson_2k1000.dts
arch/loongarch/boot/dts/Makefile +2 -1
@@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb +dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb \ + loongson_2k1000.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson_2k1000.dts new file +565 -0
565 lines not on this page · raw message
Signature · 1 line
2.39.3
Re: [PATCH 5/6] LoongArch: DeviceTree for Loongson-2K1000
arch/loongarch/boot/dts/loongson_2k1000.dts line 80
Quoted 4 lines · Binbin Zhou
arch/loongarch/boot/dts/loongson_2k1000.dts new file +4
-0+ memalloc@0 { + compatible = "loongson,ls-memalloc"; + reg = <0 0x90000000 0 0x20000000>; + };
This is not documented.
arch/loongarch/boot/dts/loongson_2k1000.dts line 234
Quoted 2 lines
arch/loongarch/boot/dts/loongson_2k1000.dts new file +2
-0+ gpio0: gpio@1fe00500 { + compatible = "loongson,ls2k-gpio", "syscon";
This isn't valid either, the binding doesn't allow syscon?
arch/loongarch/boot/dts/loongson_2k1000.dts line 397
Quoted 6 lines
arch/loongarch/boot/dts/loongson_2k1000.dts new file +6
-0+ ethernet@3,1 { + compatible = "pci0014,7a03.0", + "pci0014,7a03", + "pciclass,020000", + "pciclass,0200", + "loongson, pci-gmac";
None of the compatibles from here on out are documented either.
Cheers,
Conor.
Re: [PATCH 5/6] LoongArch: DeviceTree for Loongson-2K1000
Quoted 9 lines · Conor Dooley
arch/loongarch/boot/dts/loongson_2k1000.dts line 80
Quoted 4 lines · Binbin Zhou
arch/loongarch/boot/dts/loongson_2k1000.dts new file +4
-0+ memalloc@0 { + compatible = "loongson,ls-memalloc"; + reg = <0 0x90000000 0 0x20000000>; + };This is not documented.
Hi Conor:
Sorry, this is my mistake, a private driver will use it, I will try to remove it in the next version.
Quoted 5 lines
arch/loongarch/boot/dts/loongson_2k1000.dts line 234
Quoted 3 lines
arch/loongarch/boot/dts/loongson_2k1000.dts new file +2
-0+ gpio0: gpio@1fe00500 { + compatible = "loongson,ls2k-gpio", "syscon";This isn't valid either, the binding doesn't allow syscon?
The syscon is not needed right now. I will remove it.
Quoted 9 lines
arch/loongarch/boot/dts/loongson_2k1000.dts line 397
Quoted 7 lines
arch/loongarch/boot/dts/loongson_2k1000.dts new file +6
-0+ ethernet@3,1 { + compatible = "pci0014,7a03.0", + "pci0014,7a03", + "pciclass,020000", + "pciclass,0200", + "loongson, pci-gmac";None of the compatibles from here on out are documented either.
These are required to be added according to DeviceTree Spec PCI [1], Linux does not use these compatible for now.
Removing them really doesn't affect the driver, but to follow the spec and make sure every node has a compatible, I've left them all in.
Are they not required?
[1]: https://www.openfirmware.info/data/docs/bus.pci.pdf
Thanks.
Binbin
Quoted 3 lines
Cheers,
Conor.
Re: [PATCH 5/6] LoongArch: DeviceTree for Loongson-2K1000
Quoted 9 lines · Binbin Zhou
Quoted 9 lines
Quoted 8 lines
arch/loongarch/boot/dts/loongson_2k1000.dts new file +6
-0+ ethernet@3,1 { + compatible = "pci0014,7a03.0", + "pci0014,7a03", + "pciclass,020000", + "pciclass,0200", + "loongson, pci-gmac";
Quoted 8 lines
Quoted 1 line
None of the compatibles from here on out are documented either.
These are required to be added according to DeviceTree Spec PCI [1], Linux does not use these compatible for now.
Removing them really doesn't affect the driver, but to follow the spec and make sure every node has a compatible, I've left them all in.Are they not required?
If it passes dtbs_check, they can stay.
Best regards,
Krzysztof
Re: [PATCH 5/6] LoongArch: DeviceTree for Loongson-2K1000
In reply to Binbin ZhouQuoted 30 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K1000 processor, which integrates two 64-bit dual emission superscalar LA264 processor cores.
Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/Makefile | 3 +- arch/loongarch/boot/dts/loongson_2k1000.dts | 565 ++++++++++++++++++++ 2 files changed, 567 insertions(+), 1 deletion(-) create mode 100644 arch/loongarch/boot/dts/loongson_2k1000.dtsarch/loongarch/boot/dts/Makefile +2
-1@@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb +dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb \ + loongson_2k1000.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson_2k1000.dts new file +2
-0@@ -0,0 +1,565 @@ +// SPDX-License-Identifier: GPL-2.0 +
arch/loongarch/boot/dts/loongson_2k1000.dts line 12
Quoted 10 lines
arch/loongarch/boot/dts/loongson_2k1000.dts new file +10
-0+/dts-v1/; + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/loongson,ls2k-clk.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "LS2K1000 Reference Board"; + compatible = "loongson,ls2k1000"; +
All the same comments apply here. Don't mix SoC (DTSI) with boards.
It does not look like you tested the DTS against bindings. Please run make dtbs_check (see Documentation/devicetree/bindings/writing-schema.rst for instructions).
Best regards,
Krzysztof
Re: [PATCH 5/6] LoongArch: DeviceTree for Loongson-2K1000
Quoted 36 lines · Krzysztof Kozlowski
Quoted 34 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K1000 processor, which integrates two 64-bit dual emission superscalar LA264 processor cores.
Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/Makefile | 3 +- arch/loongarch/boot/dts/loongson_2k1000.dts | 565 ++++++++++++++++++++ 2 files changed, 567 insertions(+), 1 deletion(-) create mode 100644 arch/loongarch/boot/dts/loongson_2k1000.dtsarch/loongarch/boot/dts/Makefile +2
-1@@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb +dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb \ + loongson_2k1000.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson_2k1000.dts new file +6
-0@@ -0,0 +1,565 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/loongson,ls2k-clk.h>
Quoted 8 lines
arch/loongarch/boot/dts/loongson_2k1000.dts line 12
Quoted 6 lines
arch/loongarch/boot/dts/loongson_2k1000.dts new file +6
-0+#include <dt-bindings/gpio/gpio.h> + +/ { + model = "LS2K1000 Reference Board"; + compatible = "loongson,ls2k1000"; +All the same comments apply here. Don't mix SoC (DTSI) with boards.
Hi Krzysztof:
I'm very sorry, this is the first time I've written a full DTS. Do you mean that I need to put the descriptions of these devices into DTSI and the descriptions of the boards into DTS?
Quoted 4 lines
It does not look like you tested the DTS against bindings. Please run
make dtbs_check(seeDocumentation/devicetree/bindings/writing-schema.rstfor instructions).
Ok, I will do these checks before the next version.
Thanks.
Binbin
Quoted 4 lines
Best regards,
Krzysztof
Re: [PATCH 5/6] LoongArch: DeviceTree for Loongson-2K1000
Quoted 47 lines · Binbin Zhou
Quoted 36 lines · Krzysztof Kozlowski
Quoted 34 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K1000 processor, which integrates two 64-bit dual emission superscalar LA264 processor cores.
Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/Makefile | 3 +- arch/loongarch/boot/dts/loongson_2k1000.dts | 565 ++++++++++++++++++++ 2 files changed, 567 insertions(+), 1 deletion(-) create mode 100644 arch/loongarch/boot/dts/loongson_2k1000.dtsarch/loongarch/boot/dts/Makefile +2
-1@@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb +dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb \ + loongson_2k1000.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson_2k1000.dts new file +6
-0@@ -0,0 +1,565 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/loongson,ls2k-clk.h>Quoted 8 lines
arch/loongarch/boot/dts/loongson_2k1000.dts line 12
Quoted 6 lines
arch/loongarch/boot/dts/loongson_2k1000.dts new file +6
-0+#include <dt-bindings/gpio/gpio.h> + +/ { + model = "LS2K1000 Reference Board"; + compatible = "loongson,ls2k1000"; +All the same comments apply here. Don't mix SoC (DTSI) with boards.
Quoted 5 lines
Hi Krzysztof:
I'm very sorry, this is the first time I've written a full DTS. Do you mean that I need to put the descriptions of these devices into DTSI and the descriptions of the boards into DTS?
You need to clearly identify what is SoC and what is board. Just look for every arm/arm64/riscv example. SoC relevant properties go to SoC DTSI. Board relevant properties go to board DTS.
Best regards,
Krzysztof
PATCH 6/6 LoongArch: DeviceTree for Loongson-2K2000
In reply to Binbin ZhouAdd DeviceTree file for Loongson-2K2000 processor, which integrates two 64-bit triple emission superscalar LA364 processor cores.
--- arch/loongarch/boot/dts/Makefile | 3 +- arch/loongarch/boot/dts/loongson_2k2000.dts | 417 ++++++++++++++++++++ 2 files changed, 419 insertions(+), 1 deletion(-) create mode 100644 arch/loongarch/boot/dts/loongson_2k2000.dts
arch/loongarch/boot/dts/Makefile +2 -1
@@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only dtb-$(CONFIG_MACH_LOONGSON64) = loongson_2k0500.dtb \ - loongson_2k1000.dtb + loongson_2k1000.dtb \ + loongson_2k2000.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson_2k2000.dts new file +417 -0
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Signature · 1 line
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