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Add Support for Orange Pi 5

PATCH Superseded Muhammed Efe Cetin 3 participants 8 messages Aug 18, 2023 – Aug 19, 2023

Subsystems (2)
Device tree bindings Arm Rockchip

v2 of 4 Superseded Latest is v4 →

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Muhammed Efe Cetin

author
#0 lore raw

v2 cover Add Support for Orange Pi 5

Hi,

These series add initial support for Orange Pi 5 and SFC node for RK3588S.

Changes in v2:
* Fix CHECK_DTBS warnings and add dtb to makefile.
* Remove assigned-clock-rates from sfc node and fix wrong interrupts property.
* Remove non-existent adc buttons and add button-recovery instead.
* Remove backlight_1, backlight, vcc12v_dcin, vcc5v0_usbdcin, vcc5v0_usb, combophy_avdd0v85, combophy_avdd1v8, sata0, u2phy0, u2phy0_otg nodes.
* Rename vcc3v3_pcie2x1l2 to vcc3v3_pcie20, vbus5v0_typec to vbus_typec.
* Remove regulator-always-on property from vcc_3v3_sd_s0 and vcc3v3_pcie20.

Muhammed Efe Cetin (3):
dt-bindings: arm: rockchip: Add Orange Pi 5 board
arm64: dts: rockchip: Add sfc node to rk3588s
arm64: dts: rockchip: Add Orange Pi 5

 .../devicetree/bindings/arm/rockchip.yaml     |   5 +
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../boot/dts/rockchip/rk3588s-orangepi-5.dts  | 687 ++++++++++++++++++
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi     |  12 +
 4 files changed, 705 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
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author
#1 lore raw

PATCH v2 1/3 dt-bindings: arm: rockchip: Add Orange Pi 5 board

Add Orange Pi 5 SBC from Xunlong.

Signed-off-by Muhammed Efe Cetin <[email protected]>
Acked-by Krzysztof Kozlowski <[email protected]>
---
 Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
 1 file changed, 5 insertions(+)
Documentation/devicetree/bindings/arm/rockchip.yaml +5 -0
index ca5389862887..b9649e27bc82 100644
@@ -877,6 +877,11 @@ properties:
               - xunlong,orangepi-r1-plus-lts
           - const: rockchip,rk3328
 
+      - description: Xunlong Orange Pi 5
+        items:
+          - const: xunlong,orangepi-5
+          - const: rockchip,rk3588s
+
       - description: Zkmagic A95X Z2
         items:
           - const: zkmagic,a95x-z2
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author
#2 lore raw

PATCH v2 2/3 arm64: dts: rockchip: Add sfc node to rk3588s

In reply to Muhammed Efe Cetin

Add sfc node to rk3588s.dtsi from downstream kernel.

Signed-off-by Muhammed Efe Cetin <[email protected]>
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm64/boot/dts/rockchip/rk3588s.dtsi +12 -0
index 5544f66c6ff4..3c753f9b8acc 100644
@@ -1424,6 +1424,18 @@ sata-port@0 {
 		};
 	};
 
+	sfc: spi@fe2b0000 {
+		compatible = "rockchip,sfc";
+		reg = <0x0 0xfe2b0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		assigned-clocks = <&cru SCLK_SFC>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
 	sdmmc: mmc@fe2c0000 {
 		compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe2c0000 0x0 0x4000>;
Signature · 7 lines
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#3 lore raw

Re: [PATCH v2 2/3] arm64: dts: rockchip: Add sfc node to rk3588s

Quoted 12 lines · Muhammed Efe Cetin

Add sfc node to rk3588s.dtsi from downstream kernel.

Signed-off-by Muhammed Efe Cetin <[email protected]>
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm64/boot/dts/rockchip/rk3588s.dtsi +0 -0
index 5544f66c6ff4..3c753f9b8acc 100644

arch/arm64/boot/dts/rockchip/rk3588s.dtsi sata-port@0 { · line 1433

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588s.dtsi +7 -0
@@ -1424,6 +1424,18 @@ sata-port@0 {
 		};
 	};
 
+	sfc: spi@fe2b0000 {
+		compatible = "rockchip,sfc";
+		reg = <0x0 0xfe2b0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		assigned-clocks = <&cru SCLK_SFC>;

assigned-clocks should also be removed now that assigned-clock-rates was removed.

Regards,
Jonas

arch/arm64/boot/dts/rockchip/rk3588s.dtsi sata-port@0 { · line 1441

Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk3588s.dtsi +5 -0
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
 	sdmmc: mmc@fe2c0000 {
 		compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe2c0000 0x0 0x4000>;

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author
#4 lore raw

PATCH v2 3/3 arm64: dts: rockchip: Add Orange Pi 5

In reply to Muhammed Efe Cetin

Add initial support for OPi5 that includes support for USB2, PCIe2, Sata, Sdmmc, SPI Flash, PMIC.

Signed-off-by Muhammed Efe Cetin <[email protected]>
---
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../boot/dts/rockchip/rk3588s-orangepi-5.dts  | 687 ++++++++++++++++++
 2 files changed, 688 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
arch/arm64/boot/dts/rockchip/Makefile +1 -0
index e7728007fd1b..c29386106b7a 100644
@@ -105,3 +105,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +687 -0

687 lines not on this page · raw message

Signature · 7 lines
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Reviewed-by on v2 3/3
#5 lore raw

Re: [PATCH v2 3/3] arm64: dts: rockchip: Add Orange Pi 5

Hi Muhammed,

Quoted 9 lines · Muhammed Efe Cetin

Add initial support for OPi5 that includes support for USB2, PCIe2, Sata, Sdmmc, SPI Flash, PMIC.

Signed-off-by Muhammed Efe Cetin <[email protected]>

[...]

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +2 -0
+
+	adc-keys {

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 45

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +10 -0
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		poll-interval = <100>;
+
+		button-recovery {
+			label = "Recovery";
+			linux,code = <KEY_VENDOR>;
+			press-threshold-microvolt = <1000>;

I calculated 1800. (1.8e6 * 10 / 10e3)

Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +3 -0
+		};
+	};
+
 
[...]

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 66

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +10 -0
+
+	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_1v1_nldo_s3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1100000>;
+		regulator-max-microvolt = <1100000>;
+		vin-supply = <&vcc5v0_sys>;
+	};

This is still wrong. vcc_1v1_nldo_s3 is just alias for dcdc-reg6.

Quoted 77 lines

+&i2c2 {

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +76 -0
+	status = "okay";
+
+	vdd_npu_s0: vdd_npu_mem_s0: regulator@42 {
+		compatible = "rockchip,rk8602";
+		reg = <0x42>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-name = "vdd_npu_s0";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <550000>;
+		regulator-max-microvolt = <950000>;
+		regulator-ramp-delay = <2300>;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
+&i2c6 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c6m3_xfer>;
+	status = "okay";
+
+	hym8563: rtc@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-output-names = "hym8563";
+		pinctrl-names = "default";
+		pinctrl-0 = <&hym8563_int>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+		wakeup-source;
+	};
+};
+
+&mdio1 {
+	rgmii_phy1: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x1>;
+	};
+};
+
+&pcie2x1l2 {
+	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc3v3_pcie20>;
+	status = "okay";
+};
+
+&pinctrl {
+	gpio-func {
+		leds_gpio: leds-gpio {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	hym8563 {
+		hym8563_int: hym8563-int {
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb-typec {
+		usbc0_int: usbc0-int {
+			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		typec5v_pwren: typec5v-pwren {
+			rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&saradc {

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 295

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +10 -0
+	vref-supply = <&avcc_1v8_s0>;
+	status = "okay";
+};
+
+&sdmmc {
+	max-frequency = <150000000>;
+	no-sdio;
+	no-mmc;
+	bus-width = <4>;
+	cap-mmc-highspeed;

Is this useful for anything, when you have no-mmc specified?

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 303

Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +8 -0
+	cap-sd-highspeed;
+	disable-wp;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc_3v3_sd_s0>;
+	vqmmc-supply = <&vccio_sd_s0>;
+	status = "okay";
+};
+

With the above regulator issue fixed:

Reviewed-by Ondřej Jirman <[email protected]>

(I reviewed just for schematic <-> DT correspondece)

kind regards,

	o.
Quoted 3 lines
Signature · 1 line
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author
#6 lore raw

Re: [PATCH v2 3/3] arm64: dts: rockchip: Add Orange Pi 5

Hi Ondřej,

Quoted 31 lines · Ondřej Jirman

Hi Muhammed,

Quoted 9 lines · Muhammed Efe Cetin

Add initial support for OPi5 that includes support for USB2, PCIe2, Sata, Sdmmc, SPI Flash, PMIC.

Signed-off-by Muhammed Efe Cetin <[email protected]>

[...]

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +2 -0
+
+	adc-keys {

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 45

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +10 -0
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		poll-interval = <100>;
+
+		button-recovery {
+			label = "Recovery";
+			linux,code = <KEY_VENDOR>;
+			press-threshold-microvolt = <1000>;

I calculated 1800. (1.8e6 * 10 / 10e3)

Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +3 -0
+		};
+	};
+
 
[...]
Quoted 12 lines

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 66

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +10 -0
+
+	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_1v1_nldo_s3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1100000>;
+		regulator-max-microvolt = <1100000>;
+		vin-supply = <&vcc5v0_sys>;
+	};

This is still wrong. vcc_1v1_nldo_s3 is just alias for dcdc-reg6.

You sound right. Compared opi5 and several rk3588 boards, opi5 has different design than others. Should we also add regulator-min-microvolt and regulator-max-microvolt to dcdc-reg6 or only add vcc_1v1_nldo_s3 as alias? It seems better to add them according to schematics.

Quoted 102 lines
Quoted 78 lines

+&i2c2 {

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +76 -0
+	status = "okay";
+
+	vdd_npu_s0: vdd_npu_mem_s0: regulator@42 {
+		compatible = "rockchip,rk8602";
+		reg = <0x42>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-name = "vdd_npu_s0";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <550000>;
+		regulator-max-microvolt = <950000>;
+		regulator-ramp-delay = <2300>;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
+&i2c6 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c6m3_xfer>;
+	status = "okay";
+
+	hym8563: rtc@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-output-names = "hym8563";
+		pinctrl-names = "default";
+		pinctrl-0 = <&hym8563_int>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+		wakeup-source;
+	};
+};
+
+&mdio1 {
+	rgmii_phy1: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x1>;
+	};
+};
+
+&pcie2x1l2 {
+	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc3v3_pcie20>;
+	status = "okay";
+};
+
+&pinctrl {
+	gpio-func {
+		leds_gpio: leds-gpio {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	hym8563 {
+		hym8563_int: hym8563-int {
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb-typec {
+		usbc0_int: usbc0-int {
+			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		typec5v_pwren: typec5v-pwren {
+			rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&saradc {

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 295

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +10 -0
+	vref-supply = <&avcc_1v8_s0>;
+	status = "okay";
+};
+
+&sdmmc {
+	max-frequency = <150000000>;
+	no-sdio;
+	no-mmc;
+	bus-width = <4>;
+	cap-mmc-highspeed;

Is this useful for anything, when you have no-mmc specified?

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 303

Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +8 -0
+	cap-sd-highspeed;
+	disable-wp;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc_3v3_sd_s0>;
+	vqmmc-supply = <&vccio_sd_s0>;
+	status = "okay";
+};
+

With the above regulator issue fixed:

Quoted 10 lines
Reviewed-by Ondřej Jirman <[email protected]>

(I reviewed just for schematic <-> DT correspondece)

kind regards,

	o.
Quoted 3 lines
Signature · 1 line
2.41.0

Regards,
Efe

#7 lore raw

Re: [PATCH v2 3/3] arm64: dts: rockchip: Add Orange Pi 5

In reply to Muhammed Efe Cetin
Quoted 29 lines · Muhammed Efe Cetin

Add initial support for OPi5 that includes support for USB2, PCIe2, Sata, Sdmmc, SPI Flash, PMIC.

Signed-off-by Muhammed Efe Cetin <[email protected]>
---
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../boot/dts/rockchip/rk3588s-orangepi-5.dts  | 687 ++++++++++++++++++
 2 files changed, 688 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
arch/arm64/boot/dts/rockchip/Makefile +1 -0
index e7728007fd1b..c29386106b7a 100644
@@ -105,3 +105,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +4 -0
new file mode 100644
index 000000000000..f396b1285d73
@@ -0,0 +1,687 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+

[...]

Quoted 4 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +4 -0
+
+&gmac1 {
+	clock_in_out = "output";
+	phy-handle = <&rgmii_phy1>;

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 164

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +10 -0
+	phy-mode = "rgmii-rxid";
+	pinctrl-0 = <&gmac1_miim
+		     &gmac1_tx_bus2
+		     &gmac1_rx_bus2
+		     &gmac1_rgmii_clk
+		     &gmac1_rgmii_bus>;
+	pinctrl-names = "default";
+	snps,reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 20000 100000>;

snps,reset props are deprecated, use reset-gpios in rgmii_phy1.

Quoted 4 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +4 -0
+	tx_delay = <0x42>;
+	status = "okay";
+};
+

[...]

Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +8 -0
+
+&mdio1 {
+	rgmii_phy1: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x1>;
+	};
+};
+

[...]

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 307

Quoted 5 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +5 -0
+
+&sfc {
+	pinctrl-0 = <&fspim0_pins>;
+	pinctrl-names = "default";
+	max-freq = <100000000>;

This prop is not used, drop it.

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts

Quoted 2 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +2 -0
+	#address-cells = <1>;
+	#size-cells = <0>;

You already have #address-cells and #size-cells in rk3588s.dtsi.

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 317

Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +8 -0
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0x0>;
+		spi-max-frequency = <100000000>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;

spi- props should be in alphabetical order, rx before tx.

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts

Quoted 2 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +2 -0
+		#address-cells = <1>;
+		#size-cells = <0>;

You can also drop #address-cells and #size-cells here.

Regards,
Jonas

arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts line 22

Quoted 3 lines
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts new file +3 -0
+	};
+};
+

[...]

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