Device Tree support for SH7751 based board

R4 is caller saved in SH ABI.
Save it so it doesn't get corrupted until it's needed for initialization.

Signed-off-by Yoshinori Sato <[email protected]>

---
 arch/sh/boot/compressed/head_32.S | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

arch/sh/boot/compressed/head_32.S +2 -1

index 7bb168133dbb..c5227ef636c3 100644
@@ -15,7 +15,8 @@ startup:
 	/* Load initial status register */
 	mov.l   init_sr, r1
 	ldc     r1, sr
-
+	/* Save FDT address */
+	mov	r4, r13
 	/* Move myself to proper location if necessary */
 	mova	1f, r0
 	mov.l	1f, r2

Fix fdt initialize.

Signed-off-by Yoshinori Sato <[email protected]>

---
 arch/sh/kernel/setup.c | 36 +++++++++++++++++++++++++-----------
 1 file changed, 25 insertions(+), 11 deletions(-)

arch/sh/kernel/setup.c +1 -0

index b3da2757faaf..8fdbb9836134 100644
@@ -31,6 +31,7 @@
 #include <linux/memblock.h>
 #include <linux/of.h>
 #include <linux/of_fdt.h>
+#include <linux/libfdt.h>
 #include <linux/uaccess.h>
 #include <uapi/linux/mount.h>
 #include <asm/io.h>

Signed-off-by Yoshinori Sato <[email protected]>

arch/sh/boards/of-generic.c +0 -0

@@ -140,25 +132,13 @@ static void __init sh_of_init_irq(void)
        irqchip_init();
 }
 

Hi Sato-san,

Quoted 1 line · Yoshinori Sato

Signed-off-by Yoshinori Sato <[email protected]>

Thanks for your patch!

Quoted 6 lines

arch/sh/boards/of-generic.c +0 -0

@@ -140,25 +132,13 @@ static void __init sh_of_init_irq(void)
        irqchip_init();
 }
 

arch/sh/boards/of-generic.c static void __init sh_of_init_irq(void) · line 152

Quoted 10 lines

arch/sh/boards/of-generic.c +0 -10

-static int __init sh_of_clk_init(void)
-{
-#ifdef CONFIG_COMMON_CLK
-       /* Disabled pending move to COMMON_CLK framework. */
-       pr_info("SH generic board support: scanning for clk providers\n");
-       of_clk_init(NULL);
-#endif
-       return 0;
-}
-

Removing this breaks J2 for sure? I guess this should be merged with "[RFC PATCH v3 07/35] arch/sh/kernel/time.c: support COMMON_CLK." to avoid a bisection regression?

Gr{oetje,eeting}s,

Geert

Signature · 5 lines

Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Quoted 12 lines · Geert Uytterhoeven

Quoted 1 line · Yoshinori Sato

Signed-off-by Yoshinori Sato <[email protected]>

Thanks for your patch!

Quoted 6 lines

arch/sh/boards/of-generic.c +0 -0

@@ -140,25 +132,13 @@ static void __init sh_of_init_irq(void)
        irqchip_init();
 }
 

Quoted 14 lines

arch/sh/boards/of-generic.c static void __init sh_of_init_irq(void) · line 152

Quoted 10 lines

arch/sh/boards/of-generic.c +0 -10

-static int __init sh_of_clk_init(void)
-{
-#ifdef CONFIG_COMMON_CLK
-       /* Disabled pending move to COMMON_CLK framework. */
-       pr_info("SH generic board support: scanning for clk providers\n");
-       of_clk_init(NULL);
-#endif
-       return 0;
-}
-

Removing this breaks J2 for sure? I guess this should be merged with "[RFC PATCH v3 07/35] arch/sh/kernel/time.c: support COMMON_CLK." to avoid a bisection regression?

J2 timer (jcore-pit) used TIMER_OF_DECLARE
This is the correct OF implementation, so it is initialized with timer_probe. I would like to eliminate as many SH-specific methods as possible.

pci-sh7751.h move from "arch/sh/drivers/pci/pci-sh7751.h" pci-sh7751.c convert from "arch/sh/drivers/pci/pci-sh7751.c"

Signed-off-by Yoshinori Sato <[email protected]>

---
 drivers/pci/controller/Kconfig      |   9 +
 drivers/pci/controller/Makefile     |   1 +
 drivers/pci/controller/pci-sh7751.c | 285 ++++++++++++++++++++++++++++
 drivers/pci/controller/pci-sh7751.h | 267 ++++++++++++++++++++++++++
 4 files changed, 562 insertions(+)
 create mode 100644 drivers/pci/controller/pci-sh7751.c
 create mode 100644 drivers/pci/controller/pci-sh7751.h

drivers/pci/controller/Kconfig +0 -0

index c0c3f2824990..037ff44bd1e8 100644
@@ -342,6 +342,15 @@ config PCIE_XILINX_CPM
 	  Say 'Y' here if you want kernel support for the

"git am" complained about a couple whitespace errors elsewhere in this series:

Applying: arch/sh/boot/compressed/head_32.S: passing FDT address to initialize function. .git/rebase-apply/patch:25: trailing whitespace.
Applying: drivers/irqchip: SH7751 IRL external encoder with enable gate. .git/rebase-apply/patch:33: new blank line at EOF.

Quoted 2 lines

pci-sh7751.h move from "arch/sh/drivers/pci/pci-sh7751.h" pci-sh7751.c convert from "arch/sh/drivers/pci/pci-sh7751.c"

Note the subject line conventions in drivers/pci (use "git log --oneline" to see them): use something like this:

PCI: sh7751: Add SH7751 PCI host bridge driver

with no period at the end.

arch/sh/drivers/pci/pci-sh7751.h and arch/sh/drivers/pci/pci-sh7751.c still exist after applying this series. Better to have a single patch that moves the content from arch/sh/drivers/pci/ to drivers/pci/controller/.

Neither file looks like a simple move; there's a lot of reorganization going on at the same time. It's really difficult to review a patch like that because we can't compare the content from before and after.

If you make a patch that does the cleanup/reorganization, and a separate patch that is just a simple move, and you use "git mv" for the move, git should notice that this is just a rename, and that diff will be tiny.

One of the reorganization patches should be to incorporate the pci-sh7751.h content directly into pci-sh7751.c. Since it's only used in pci-sh7751.c, there's really no advantage to having it in a separate file.

Bjorn

Quoted 16 lines

Signed-off-by Yoshinori Sato <[email protected]>

---
 drivers/pci/controller/Kconfig      |   9 +
 drivers/pci/controller/Makefile     |   1 +
 drivers/pci/controller/pci-sh7751.c | 285 ++++++++++++++++++++++++++++
 drivers/pci/controller/pci-sh7751.h | 267 ++++++++++++++++++++++++++
 4 files changed, 562 insertions(+)
 create mode 100644 drivers/pci/controller/pci-sh7751.c
 create mode 100644 drivers/pci/controller/pci-sh7751.h

drivers/pci/controller/Kconfig +0 -0

index c0c3f2824990..037ff44bd1e8 100644
@@ -342,6 +342,15 @@ config PCIE_XILINX_CPM
 	  Say 'Y' here if you want kernel support for the

drivers/pci/controller/Kconfig config PCIE_XILINX_CPM · line 352

Quoted 10 lines

drivers/pci/controller/Kconfig +8 -0

 	  Xilinx Versal CPM host bridge.
 
+config PCI_SH7751
+	bool "Renesas SH7751 PCI controller"
+	depends on OF
+	depends on CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R || COMPILE_TEST
+	select PCI_HOST_COMMON
+	help
+	  Say 'Y' here if you want kernel to support the Renesas SH7751 PCI
+	  Host Bridge driver.

Move this so the menu entries stay sorted by vendor name.

Bjorn

binding document for renesas,pci-sh7751.

Signed-off-by Yoshinori Sato <[email protected]>

---
 .../bindings/pci/renesas,pci-sh7751.yaml      | 123 ++++++++++++++++++
 1 file changed, 123 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/renesas,pci-sh7751.yaml

Documentation/devicetree/bindings/pci/renesas,pci-sh7751.yaml new file +7 -0

new file mode 100644
index 000000000000..a6081c3de51d
@@ -0,0 +1,123 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/renesas,pci-sh7751.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas SH7751 PCI Host controller

binding document for renesas,pci-sh7751.

SH7750 CPG driver binding definition.

Signed-off-by Yoshinori Sato <[email protected]>

include/dt-bindings/clock/sh7750.h new file +11 -0

@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+ *
+ * Copyright 2023 Yoshinori Sato
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_SH7750_H__
+#define __DT_BINDINGS_CLOCK_SH7750_H__
+
+#define SH7750_CPG_PLLOUT      0
+
+#define SH7750_CPG_FCK         1

This driver supported SH7750/7751 PLL/Divider clock and module stop.

Signed-off-by Yoshinori Sato <[email protected]>

---
 drivers/clk/renesas/Kconfig      |  21 +-
 drivers/clk/renesas/Makefile     |   1 +
 drivers/clk/renesas/clk-sh7750.c | 787 +++++++++++++++++++++++++++++++
 3 files changed, 807 insertions(+), 2 deletions(-)
 create mode 100644 drivers/clk/renesas/clk-sh7750.c

drivers/clk/renesas/Kconfig +0 -0

index 37632a0659d8..c52c038ce715 100644

drivers/clk/renesas/Kconfig +4 -0

 if CLK_RENESAS
 

@@ -188,6 +193,10 @@ config CLK_SH73A0
        select CLK_RENESAS_CPG_MSTP
        select CLK_RENESAS_DIV6
 
+config CLK_SH7750
+       bool "SH7750/7751 family clock support" if COMPILE_TEST
+       help
+         This is a driver for SH7750 / SH7751 CPG.
 
 # Family
 config CLK_RCAR_CPG_LIB

drivers/clk/renesas/clk-sh7750.c new file +2 -0

 
+static void sbcr_sw(struct clk_hw *hw, bool on)
+{

drivers/clk/renesas/clk-sh7750.c new file +18 -0

+}
+
+static int sbcr_enable(struct clk_hw *hw)
+{
+       sbcr_sw(hw, true);
+       return 0;
+}
+
+static void sbcr_disable(struct clk_hw *hw)
+{
+       sbcr_sw(hw, false);
+}
+
+static int sbcr_is_enabled(struct clk_hw *hw)
+{
+       u8 val;
+       struct clk_gate *gate = to_clk_gate(hw);
+

drivers/clk/renesas/clk-sh7750.c new file +20 -0

+
+static void clkstp00_sw(struct clk_hw *hw, bool on)
+{
+       u32 val;
+       struct clk_gate *gate = to_clk_gate(hw);
+
+       val = BIT(gate->bit_idx);
+       if (on)
+               writel(val, gate->reg + CLKSTPCLR00);
+       else
+               writel(val, gate->reg);
+}
+
+static int clkstp00_enable(struct clk_hw *hw)
+{
+       clkstp00_sw(hw, true);
+       return 0;
+}
+
+static void clkstp00_disable(struct clk_hw *hw)

drivers/clk/renesas/clk-sh7750.c new file +58 -0

+       struct sh_clk_reg_arg args[ARRAY_SIZE(divout) + ARRAY_SIZE(mstpout)];
+       unsigned int i, j;
+       int ret;
+
+       for (i = 0; i < ARRAY_SIZE(divout); i++) {
+               args[i].type = CLK_DIV;
+               args[i].name  = divout[i];
+               args[i].parent = PLLOUT;
+               args[i].reg = cpg->frqcr;
+               args[i].ops = &sh_clk_divider_ops;
+               args[i].div.shift = i * 3;
+               args[i].div.width = 3;
+               args[i].div.table = (i == 0) ? pdiv_table : div_table;
+       }
+       for (i = 0, j = ARRAY_SIZE(divout); j < ARRAY_SIZE(args); i++, j++) {
+               args[j].type = CLK_GATE;
+               args[j].name  = mstpout[i];
+               args[j].parent = divout[0];
+               switch (i) {
+               case 0 ... 4:
+                       args[j].reg = cpg->frqcr + STBCR;
+                       args[j].gate.bit_idx = i;
+                       args[j].ops = &gate_stbcr_ops;
+                       break;
+               case 5 ... 6:
+                       args[j].reg = cpg->frqcr + STBCR2;
+                       args[j].gate.bit_idx = i - 5;
+                       args[j].ops = &gate_stbcr_ops;
+                       break;
+               case 7 ... 9:
+                       args[j].reg = cpg->clkstp00;
+                       args[j].gate.bit_idx = i - 7;
+                       args[j].ops = &gate_clkstp00_ops;
+                       break;
+               }
+       }
+
+       ret = _clk_register(node, ARRAY_SIZE(args), args,
+                           &cpg->clklock, &cpg->hw);
+       if (ret < 0)
+               pr_err("%pOF: failed to register clock (%d)\n",
+                      node, ret);
+       return ret;
+}
+
+static struct cpg_priv *sh7750_cpg_setup(struct device_node *node)
+{
+       unsigned int num_parents;
+       u32 mode;
+       struct cpg_priv *cpg;
+       int ret = 0;
+
+       num_parents = of_clk_get_parent_count(node);
+       if (num_parents < 1) {
+               pr_err("%s: no parent found", node->name);
+               return ERR_PTR(-ENODEV);
+       }
+

drivers/clk/renesas/clk-sh7750.c new file +22 -0

+               pr_err("%pOF: failed to map clkstp00 register", node);
+               ret = -ENODEV;
+               goto unmap_frqcr;
+       }
+       cpg->mode = mode;
+
+       ret = register_pll(node, cpg);
+       if (ret < 0)
+               goto unmap_clkstp00;
+
+       ret = register_div(node, cpg);
+       if (ret < 0)
+               goto unmap_clkstp00;
+
+       return cpg;
+
+unmap_clkstp00:
+       iounmap(cpg->clkstp00);
+unmap_frqcr:
+       iounmap(cpg->frqcr);
+cpg_free:
+       kfree(cpg);

drivers/clk/renesas/clk-sh7750.c new file +28 -0

+}
+
+CLK_OF_DECLARE_DRIVER(sh7750_cpg, "renesas,sh7750-cpg",
+                     sh7750_cpg_init);
+
+static int sh7750_cpg_probe(struct platform_device *pdev)
+{
+       if (cpg_data)
+               return 0;
+       cpg_data = sh7750_cpg_setup(pdev->dev.of_node);
+       if (IS_ERR(cpg_data))
+               return PTR_ERR(cpg_data);
+       cpg_data->have_div1 = (of_device_get_match_data(&pdev->dev) != NULL);
+       return 0;
+}
+
+static const struct of_device_id sh7750_cpg_of_match[] = {
+       { .compatible = "renesas,sh7750-cpg",
+         .data = (void *)1 },
+       { .compatible = "renesas,sh7750s-cpg",
+         .data = (void *)1 },
+       { .compatible = "renesas,sh7750r-cpg",
+         .data = 0 },
+       { .compatible = "renesas,sh7751-cpg",
+         .data = (void *)1 },
+       { .compatible = "renesas,sh7751r-cpg",
+         .data = 0 },
+       { }

This driver supported SH7750/7751 PLL/Divider clock and module stop.

Signed-off-by Yoshinori Sato <[email protected]>

drivers/clk/renesas/clk-sh7750.c new file +23 -0

 
+static void sbcr_sw(struct clk_hw *hw, bool on)
+{
+       struct clk_gate *gate = to_clk_gate(hw);
+       u8 msk = BIT(gate->bit_idx);
+       u8 val;
+
+       val = readb(gate->reg);
+       if (on)
+               val &= ~msk;
+       else
+               val |= msk;
+       writeb(val, gate->reg);
+}
+
+static int sbcr_enable(struct clk_hw *hw)
+{
+       sbcr_sw(hw, true);
+       return 0;
+}
+
+static void sbcr_disable(struct clk_hw *hw)
+{
+       sbcr_sw(hw, false);

+}

Signed-off-by Yoshinori Sato <[email protected]>

Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml new file +18 -0

@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/renesas,sh7750-cpg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas SH7750/7751 Clock Pulse Generator (CPG)
+
+maintainers:
+  - Yoshinori Sato <[email protected]>
+
+description:
+  The Clock Pulse Generator (CPG) generates core clocks for the SoC.  It
+  includes PLLs, and variable ratio dividers.
+
+  The CPG may also provide a Clock Domain for SoC devices, in combination with
+  the CPG Module Stop (MSTP) Clocks.
+

Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml new file +1 -1

+    };
--

2.39.2

SH7751 Internal interrupt controler driver.

Signed-off-by Yoshinori Sato <[email protected]>

drivers/irqchip/irq-renesas-sh7751.c new file +5 -0

 
+static int __init load_ipr_map(struct device_node *intc,
+                              struct sh7751_intc_priv *priv)
+{
+       int num_ipr;
+       struct iprmap *p;

drivers/irqchip/irq-renesas-sh7751.c new file +21 -0

+                               pr_err("%s: Failed to load ipr-map\n", intc->name);
+                               kfree(priv->iprmap);
+                               return -EINVAL;
+                       }
+               }
+               p->irq = evt2irq(val[0]);
+               p->reg = val[1];
+               p->bits = val[2];
+       }
+       /* This table will be searched using bsearch, so sort it. */
+       sort(priv->iprmap, priv->num_ipr, sizeof(struct iprmap),
+            sort_ipr_cmp, sort_ipr_swap);
+
+       for (p = priv->iprmap, idx = 0; idx < priv->num_ipr; p++, idx++)
+               pr_debug("irq=%04x reg=%02x bits=%d\n", p->irq, p->reg, p->bits);
+       return 0;
+}
+
+static int __init sh7751_intc_of_init(struct device_node *intc,
+                                     struct device_node *parent)
+{

drivers/irqchip/irq-renesas-sh7751.c new file +19 -0

+#define ICR_IRLM BIT(7)
+
+/* Bitmap of IRQ masked */
+#define IMASK_PRIORITY	15
+
+static DECLARE_BITMAP(imask_mask, IMASK_PRIORITY);
+static int interrupt_priority;
+
+static inline void set_interrupt_registers(int ip)
+{
+	unsigned long __dummy;
+
+	asm volatile(
+#ifdef CONFIG_CPU_HAS_SR_RB
+		     "ldc	%2, r6_bank\n\t"
+#endif
+		     "stc	sr, %0\n\t"
+		     "and	#0xf0, %0\n\t"
+		     "shlr2	%0\n\t"

+}

drivers/irqchip/irq-renesas-sh7751.c new file +6 -0

+		/* IPR priority is 0 */
+		update_ipr(priv, irq, 0);
+}
+
+static void sh7751_enable_irq(struct irq_data *data)
+{

drivers/irqchip/irq-renesas-sh7751.c new file +34 -0

+}
+
+static void sort_ipr_swap(void *a, void *b, int sz)
+{
+	struct iprmap tmp;
+
+	memcpy(&tmp, a, sizeof(tmp));
+	memcpy(a, b, sizeof(tmp));
+	memcpy(b, &tmp, sizeof(tmp));
+}
+
+static int __init load_ipr_map(struct device_node *intc,
+			       struct sh7751_intc_priv *priv)
+{
+	int num_ipr;
+	struct iprmap *p;
+	u32 val[3];
+	unsigned int i, idx;
+
+	num_ipr = of_property_count_elems_of_size(intc, "renesas,ipr-map", sizeof(u32) * 3);
+	if (num_ipr < 0)
+		return num_ipr;
+
+	priv->iprmap = kcalloc(num_ipr, sizeof(struct iprmap), GFP_KERNEL);
+	if (priv->iprmap == NULL) {
+		pr_err("%s: Failed to alloc memory\n", intc->name);
+		return -ENOMEM;
+	}
+	priv->num_ipr = num_ipr;
+
+	for (p = priv->iprmap, idx = 0; num_ipr > 0; p++, num_ipr--) {
+		for (i = 0; i < 3; idx++, i++) {
+			if (of_property_read_u32_index(intc, "renesas,ipr-map",
+						       idx, &val[i])) {

Quoted 20 lines · Yoshinori Sato

drivers/irqchip/irq-renesas-sh7751.c new file +19 -0

+config RENESAS_SH7751_INTC
+     bool "Renesas SH7751 Interrupt Controller"
+     depends on SH_DEVICE_TREE || COMPILE_TEST
 
+static inline void set_interrupt_registers(int ip)
+{
+     unsigned long __dummy;
+
+     asm volatile(
+#ifdef CONFIG_CPU_HAS_SR_RB
+                  "ldc       %2, r6_bank\n\t"
+#endif
+                  "stc       sr, %0\n\t"
+                  "and       #0xf0, %0\n\t"
+                  "shlr2     %0\n\t"
+                  "cmp/eq    #0x3c, %0\n\t"
+                  "bt/s      1f      ! CLI-ed\n\t"
+                  " stc      sr, %0\n\t"
+                  "and       %1, %0\n\t"
+                  "or        %2, %0\n\t"

drivers/irqchip/irq-renesas-sh7751.c line 64

Quoted 5 lines

drivers/irqchip/irq-renesas-sh7751.c new file +5 -0

+                  "ldc       %0, sr\n"
+                  "1:"
+                  : "=&z" (__dummy)
+                  : "r" (~0xf0), "r" (ip << 4)
+                  : "t");

Why has this to be ASM and cannot be done in C with the existing accessors? Also this really lacks a comment what this is actually doing.

SH7751 interrupt controller binding definition.

Signed-off-by Yoshinori Sato <[email protected]>

Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml new file +9 -0

@@ -0,0 +1,102 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas SH7751 Interrupt Controller
+
+maintainers:

+ shintc: interrupt-controller@ffd00000 {

+ compatible = "renesas,sh7751-intc";

Quoted 20 lines · Yoshinori Sato

SH7751 interrupt controller binding definition.

Signed-off-by Yoshinori Sato <[email protected]>

Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml new file +13 -0

@@ -0,0 +1,102 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas SH7751 Interrupt Controller
+
+maintainers:
+  - Yoshinori Sato <[email protected]>
+
+properties:
+  compatible:

Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml line 19

Quoted 6 lines

Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml new file +6 -0

+    items:
+      - const: renesas,sh7751-intc
+
+  '#interrupt-cells':
+    # an interrupt index and flags, as defined in interrupts.txt in
+    # this directory

I think you can drop this comment.

Quoted 1 line

Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml new file +1 -0

+    const: 2

drivers/irqchip/Kconfig +7 -0

+config RENESAS_SH7751IRL_INTC
+	bool "Renesas SH7751 based target IRL encoder support."
+	depends on RENESAS_SH7751_INTC
+	help
+	  Support for External Interrupt encoder
+	  on the some Renesas SH7751 based target.
+
 endmenu

drivers/irqchip/Makefile +2 -0

index 26c91d075e25..91df16726b1f 100644
@@ -121,3 +121,5 @@ obj-$(CONFIG_APPLE_AIC)			+= irq-apple-aic.o
 obj-$(CONFIG_MCHP_EIC)			+= irq-mchp-eic.o
 obj-$(CONFIG_SUNPLUS_SP7021_INTC)	+= irq-sp7021-intc.o
 obj-$(CONFIG_RENESAS_SH7751_INTC)	+= irq-renesas-sh7751.o
+obj-$(CONFIG_RENESAS_SH7751IRL_INTC)	+= irq-renesas-sh7751irl.o
+

drivers/irqchip/irq-renesas-sh7751irl.c new file +0 -0

new file mode 100644
index 000000000000..1520d0cfda1e

drivers/irqchip/irq-renesas-sh7751irl.c new file +10 -0

+}
+
+static inline void set_reg(void *addr, int w, u32 val)
+{
+	switch (w) {
+	case 8:
+		__raw_writeb(val, addr);
+		break;
+	case 16:
+		__raw_writew(val, addr);

drivers/irqchip/Kconfig config RENESAS_SH7751_INTC · line 689

Quoted 5 lines

drivers/irqchip/Kconfig +0 -0

@@ -688,4 +688,11 @@ config RENESAS_SH7751_INTC
 	  Support for the Renesas SH7751 On-chip interrupt controller.
 	  And external interrupt encoder for some targets.

... I have no idea against which tree this is supposed to apply. None of the trees I usually use has the above. So I assume it's a patch in the same series, but what do I know.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux.git/

Quoted 9 lines · Thomas Gleixner

drivers/irqchip/Kconfig config RENESAS_SH7751_INTC · line 689

Quoted 5 lines

drivers/irqchip/Kconfig +0 -0

@@ -688,4 +688,11 @@ config RENESAS_SH7751_INTC
 	  Support for the Renesas SH7751 On-chip interrupt controller.
 	  And external interrupt encoder for some targets.

... I have no idea against which tree this is supposed to apply. None of the trees I usually use has the above. So I assume it's a patch in the same series, but what do I know.

This shall eventually go through my sh-linux tree [1].

Quoted 11 lines · John Paul Adrian Glaubitz

Quoted 9 lines · Thomas Gleixner

drivers/irqchip/Kconfig config RENESAS_SH7751_INTC · line 689

Quoted 5 lines

drivers/irqchip/Kconfig +0 -0

@@ -688,4 +688,11 @@ config RENESAS_SH7751_INTC
 	  Support for the Renesas SH7751 On-chip interrupt controller.
 	  And external interrupt encoder for some targets.

... I have no idea against which tree this is supposed to apply. None of the trees I usually use has the above. So I assume it's a patch in the same series, but what do I know.

Quoted 1 line

This shall eventually go through my sh-linux tree [1].

That's an actual tree management problem, which is completely independent of the review process.

Reviewing patches which depend on "unknown" other changes is per definition impossible and in this case it's even worse because the dependency affects the same subsystem, no?

- fix earlycon name.

- fix earlyprintk hung (NULL pointer reference).

Signed-off-by Yoshinori Sato <[email protected]>

I am changing the target board of SuperH using SM501 to DeviceTree. This target uses platform_device to configure sm501 and sm501fb. In order to migrate to DeviceTree, it can now be set in properties.

Signed-off-by Yoshinori Sato <[email protected]>

---
 drivers/mfd/sm501.c           | 113 ++++++++++++++++++++++++++++++++++
 drivers/video/fbdev/sm501fb.c |  92 +++++++++++++++++++++++++++
 2 files changed, 205 insertions(+)