Introduce PCIe PHY driver for EN7581 SoC
Subsystems (4)
Lorenzo Bianconi
maintainerv3 cover Introduce PCIe PHY driver for EN7581 SoC
Add support for Airoha PCIe PHY controller available in the EN7581 SoC.
Changes since v2:
- introduce registers description in dts binding
- compile PCIe PHY controller driver as module by default
- improve code readability
Changes since v1:
- add patch 4/4 to enable PCIe PHY driver
- rename documentation binding in airoha,en7581-pcie-phy.yaml
- fix kernel doc
Lorenzo Bianconi (4):
dt-bindings: phy: airoha: Add binding doc for PCIe PHY driver
arm64: dts: airoha: Add EN7581 pcie-phy node
phy: airoha: Add PCIe PHY driver for EN7581 SoC.
arm64: defconfig: Enable Airoha pcie phy driver
.../bindings/phy/airoha,en7581-pcie-phy.yaml | 58 + MAINTAINERS | 8 + arch/arm64/boot/dts/airoha/en7581.dtsi | 9 + arch/arm64/configs/defconfig | 1 + drivers/phy/Kconfig | 10 + drivers/phy/Makefile | 1 + drivers/phy/phy-airoha-pcie-regs.h | 477 +++++++ drivers/phy/phy-airoha-pcie.c | 1247 +++++++++++++++++ 8 files changed, 1811 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/airoha,en7581-pcie-phy.yaml create mode 100644 drivers/phy/phy-airoha-pcie-regs.h create mode 100644 drivers/phy/phy-airoha-pcie.c
Signature · 1 line
2.45.1
Lorenzo Bianconi
maintainerPATCH v3 1/4 dt-bindings: phy: airoha: Add binding doc for PCIe PHY driver
Introduce device-tree binding documentation for Airoha EN7581 PCIe PHY driver.
--- .../bindings/phy/airoha,en7581-pcie-phy.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/airoha,en7581-pcie-phy.yaml
Documentation/devicetree/bindings/phy/airoha,en7581-pcie-phy.yaml new file +58 -0
@@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/airoha,en7581-pcie-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha EN7581 PCI-Express PHY + +maintainers: + - Lorenzo Bianconi <[email protected]> + +description: + The PCIe PHY supports physical layer functionality for PCIe Gen2/Gen3 port. + +properties: + compatible: + const: airoha,en7581-pcie-phy + + reg: + items: + - description: PCIE analog base address + - description: PCIE lane0 base address + - description: PCIE lane1 base address + + reg-names: + items: + - const: csr-2l + - const: pma0 + - const: pma1 + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - reg-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/phy/phy.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + phy@11e80000 { + compatible = "airoha,en7581-pcie-phy"; + #phy-cells = <0>; + reg = <0x0 0x1fa5a000 0x0 0xfff>, + <0x0 0x1fa5b000 0x0 0xfff>, + <0x0 0x1fa5c000 0x0 0xfff>; + reg-names = "csr-2l", "pma0", "pma1"; + }; + };
Signature · 1 line
2.45.1
Re: [PATCH v3 1/4] dt-bindings: phy: airoha: Add binding doc for PCIe PHY driver
Quoted 5 lines · Lorenzo Bianconi
Introduce device-tree binding documentation for Airoha EN7581 PCIe PHY driver.
Reviewed-by AngeloGioacchino Del Regno <[email protected]>Tested-by Zhengping Zhang <[email protected]>
How the binding was tested?
Quoted 1 line
Signed-off-by Lorenzo Bianconi <[email protected]>
A nit, subject: drop second/last, redundant "bindings". The "dt-bindings" prefix is already stating that these are bindings. See also:
https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18
Subject: drop driver. This is for hardware, not drivers.
Best regards,
Krzysztof
Lorenzo Bianconi
maintainerRe: [PATCH v3 1/4] dt-bindings: phy: airoha: Add binding doc for PCIe PHY driver
Quoted 11 lines · Lorenzo Bianconi
Quoted 5 lines
Introduce device-tree binding documentation for Airoha EN7581 PCIe PHY driver.
Reviewed-by AngeloGioacchino Del Regno <[email protected]>Tested-by Zhengping Zhang <[email protected]>How the binding was tested?
Quoted 1 line
Signed-off-by Lorenzo Bianconi <[email protected]>
Quoted 8 lines
A nit, subject: drop second/last, redundant "bindings". The "dt-bindings" prefix is already stating that these are bindings. See also:
https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18Subject: drop driver. This is for hardware, not drivers.
Reviewed-by Krzysztof Kozlowski <[email protected]>
Do I need to repost it or is it ok to address it applying the patches?
Regards,
Lorenzo
Quoted 4 lines
Best regards,
Krzysztof
Lorenzo Bianconi
maintainerPATCH v3 2/4 arm64: dts: airoha: Add EN7581 pcie-phy node
In reply to Lorenzo BianconiIntroduce the Airoha EN7581 PCIe-phy node in Airoha EN7581 dtsi
--- arch/arm64/boot/dts/airoha/en7581.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm64/boot/dts/airoha/en7581.dtsi +9 -0
@@ -178,5 +178,14 @@ spi_nand: nand@0 { spi-rx-bus-width = <2>; }; }; + + pciephy: phy@1fa5a000 { + compatible = "airoha,en7581-pcie-phy"; + reg = <0x0 0x1fa5a000 0x0 0xfff>, + <0x0 0x1fa5b000 0x0 0xfff>, + <0x0 0x1fa5c000 0x0 0xfff>; + reg-names = "csr-2l", "pma0", "pma1"; + #phy-cells = <0>; + }; }; };
Signature · 1 line
2.45.1
Lorenzo Bianconi
maintainerPATCH v3 3/4 phy: airoha: Add PCIe PHY driver for EN7581 SoC.
In reply to Lorenzo BianconiIntroduce support for Airoha PCIe PHY controller available in EN7581 SoC.
--- MAINTAINERS | 8 + drivers/phy/Kconfig | 10 + drivers/phy/Makefile | 1 + drivers/phy/phy-airoha-pcie-regs.h | 477 +++++++++++ drivers/phy/phy-airoha-pcie.c | 1247 ++++++++++++++++++++++++++++ 5 files changed, 1743 insertions(+) create mode 100644 drivers/phy/phy-airoha-pcie-regs.h create mode 100644 drivers/phy/phy-airoha-pcie.c
MAINTAINERS +8 -0
@@ -653,6 +653,14 @@ S: Supported F: fs/aio.c F: include/linux/*aio*.h +AIROHA PCIE PHY DRIVER +M: Lorenzo Bianconi <[email protected]> +L: [email protected] (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/phy/airoha,en7581-pcie-phy.yaml +F: drivers/phy/phy-airoha-pcie-regs.h +F: drivers/phy/phy-airoha-pcie.c + AIROHA SPI SNFI DRIVER M: Lorenzo Bianconi <[email protected]> M: Ray Liu <[email protected]>
drivers/phy/Kconfig +10 -0
@@ -72,6 +72,16 @@ config PHY_CAN_TRANSCEIVER functional modes using gpios and sets the attribute max link rate, for CAN drivers. +config PHY_AIROHA_PCIE + tristate "Airoha PCIe-PHY Driver" + depends on ARCH_AIROHA || COMPILE_TEST + depends on OF + select GENERIC_PHY + help + Say Y here to add support for Airoha PCIe PHY driver. + This driver create the basic PHY instance and provides initialize + callback for PCIe GEN3 port. + source "drivers/phy/allwinner/Kconfig" source "drivers/phy/amlogic/Kconfig" source "drivers/phy/broadcom/Kconfig"
drivers/phy/Makefile +1 -0
@@ -10,6 +10,7 @@ obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o obj-$(CONFIG_PHY_XGENE) += phy-xgene.o obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o obj-$(CONFIG_USB_LGM_PHY) += phy-lgm-usb.o +obj-$(CONFIG_PHY_AIROHA_PCIE) += phy-airoha-pcie.o obj-y += allwinner/ \ amlogic/ \ broadcom/ \
drivers/phy/phy-airoha-pcie-regs.h new file +477 -0
477 lines not on this page · raw message
drivers/phy/phy-airoha-pcie.c new file +1247 -0
1,247 lines not on this page · raw message
Signature · 1 line
2.45.1
Lorenzo Bianconi
maintainerPATCH v3 4/4 arm64: defconfig: Enable Airoha pcie phy driver
In reply to Lorenzo BianconiEnables the PHY_AIROHA_PCIE config by default.
--- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)
arch/arm64/configs/defconfig +1 -0
@@ -1479,6 +1479,7 @@ CONFIG_RESET_QCOM_AOSS=y CONFIG_RESET_QCOM_PDC=m CONFIG_RESET_RZG2L_USBPHY_CTRL=y CONFIG_RESET_TI_SCI=y +CONFIG_PHY_AIROHA_PCIE=m CONFIG_PHY_XGENE=y CONFIG_PHY_CAN_TRANSCEIVER=m CONFIG_PHY_SUN4I_USB=y
Signature · 1 line
2.45.1
Re: [PATCH v3 4/4] arm64: defconfig: Enable Airoha pcie phy driver
Il 18/05/24 13:31, Lorenzo Bianconi ha scritto:
Quoted 4 lines
Enables the
PHY_AIROHA_PCIEconfig by default.Tested-by Zhengping Zhang <[email protected]>Signed-off-by Lorenzo Bianconi <[email protected]>
Vinod Koul
maintainerQuoted 1 line · Lorenzo Bianconi
Add support for Airoha PCIe PHY controller available in the EN7581 SoC.
This fails build tests on x86 etc, please make sure you compile in idff arch with W=1 and C=1 and submit again
Signature · 1 line
~Vinod
Re: (subset) [PATCH v3 0/4] Introduce PCIe PHY driver for EN7581 SoC
In reply to Lorenzo BianconiQuoted 11 lines · Lorenzo Bianconi
Add support for Airoha PCIe PHY controller available in the EN7581 SoC.
Changes since v2:
- introduce registers description in dts binding
- compile PCIe PHY controller driver as module by default
- improve code readability
Changes since v1:
- add patch 4/4 to enable PCIe PHY driver
- rename documentation binding in airoha,en7581-pcie-phy.yaml
- fix kernel doc
Quoted 1 line
[...]
Applied, thanks!
[1/4] dt-bindings: phy: airoha: Add binding doc for PCIe PHY driver
(no commit info)
[3/4] phy: airoha: Add PCIe PHY driver for EN7581 SoC.
commit: d7d2818b93837def4a33f92da2e64c3a2752c47e
Best regards,
Signature · 1 line
Vinod Koul <[email protected]>