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arm64: zynqmp: Update description for Kria

PATCH Applied Michal Simek 1 participant 14 messages May 27, 2024 – Jun 17, 2024

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Device tree bindings Arm/Zynq architecture
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Michal Simek

author maintainer
#0 lore raw

cover arm64: zynqmp: Update description for Kria

Hi,

over last couple of months dt bindings have been updated but dtbs didn't reflect it that's why I have created this series to match description used in U-Boot to be able to switch to OF_UPSTREAM for ZynqMP platforms. There are still small missing part regarding usb peer hub and MTD layouts for other boards.
The rest should be in sync already.

Thanks,
Michal

Michal Simek (9):
arm64: zynqmp: Align nvmem node with dt schema
arm64: zynqmp: Use fpga-region as node name
arm64: zynqmp: Add missing description for efuses
arm64: zynqmp: Describe USB wakeup interrupt
arm64: zynqmp: Describe OCM controller
arm64: zynqmp: Remove address/size-cells from ams node
arm64: zynqmp: Add compatible string for kv260
arm64: zynqmp: Add description for ina260 on kv260
arm64: zynqmp: Add support for K26 rev2 boards

Tejas Bhumkar (1):
arm64: zynqmp: Disable Tri-state for SDIO

Vishal Patel (1):
arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property

Vishal Sagar (1):
arm64: zynqmp: Describe DisplayPort connector for Kria

 .../boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 19 +++-
 .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 41 ++++++++-
 .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts    | 19 +++-
 .../boot/dts/xilinx/zynqmp-smk-k26-revA.dts   |  8 +-
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi        | 91 ++++++++++++++++---
 5 files changed, 156 insertions(+), 22 deletions(-)
Signature · 1 line
2.40.1
author maintainer
#1 lore raw

PATCH 1/12 arm64: zynqmp: Align nvmem node with dt schema

Use new soc-nvmem node name and swich to nvmem fixed layout.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +9 -6
index ef31b0fc73d1..7a5388b7ec6d 100644
@@ -207,13 +207,16 @@ zynqmp_power: power-management {
 				mbox-names = "tx", "rx";
 			};
 
-			nvmem-firmware {
+			soc-nvmem {
 				compatible = "xlnx,zynqmp-nvmem-fw";
-				#address-cells = <1>;
-				#size-cells = <1>;
-
-				soc_revision: soc-revision@0 {
-					reg = <0x0 0x4>;
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					soc_revision: soc-revision@0 {
+						reg = <0x0 0x4>;
+					};
 				};
 			};
Signature · 1 line
2.40.1
author maintainer
#2 lore raw

PATCH 2/12 arm64: zynqmp: Use fpga-region as node name

In reply to Michal Simek

Based on commit 85f838adad54 ("dt-bindings: fpga: Convert fpga-region binding to yaml") fpga/programmable logic should use fpga-region as node name that's why move to it.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +1 -1
index 7a5388b7ec6d..9e9a76fca098 100644
@@ -255,7 +255,7 @@ timer {
 			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 	};
 
-	fpga_full: fpga-full {
+	fpga_full: fpga-region {
 		compatible = "fpga-region";
 		fpga-mgr = <&zynqmp_pcap>;
 		#address-cells = <2>;
Signature · 1 line
2.40.1
author maintainer
#3 lore raw

PATCH 3/12 arm64: zynqmp: Add missing description for efuses

In reply to Michal Simek

The commit 737c0c8d07b5 ("nvmem: zynqmp_nvmem: Add support to access efuse") added support for efuses that's why also describe them in DT.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 55 ++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +55 -0
index 9e9a76fca098..c82275f1e79c 100644
@@ -217,6 +217,61 @@ nvmem-layout {
 					soc_revision: soc-revision@0 {
 						reg = <0x0 0x4>;
 					};
+					/* efuse access */
+					efuse_dna: efuse-dna@c {
+						reg = <0xc 0xc>;
+					};
+					efuse_usr0: efuse-usr0@20 {
+						reg = <0x20 0x4>;
+					};
+					efuse_usr1: efuse-usr1@24 {
+						reg = <0x24 0x4>;
+					};
+					efuse_usr2: efuse-usr2@28 {
+						reg = <0x28 0x4>;
+					};
+					efuse_usr3: efuse-usr3@2c {
+						reg = <0x2c 0x4>;
+					};
+					efuse_usr4: efuse-usr4@30 {
+						reg = <0x30 0x4>;
+					};
+					efuse_usr5: efuse-usr5@34 {
+						reg = <0x34 0x4>;
+					};
+					efuse_usr6: efuse-usr6@38 {
+						reg = <0x38 0x4>;
+					};
+					efuse_usr7: efuse-usr7@3c {
+						reg = <0x3c 0x4>;
+					};
+					efuse_miscusr: efuse-miscusr@40 {
+						reg = <0x40 0x4>;
+					};
+					efuse_chash: efuse-chash@50 {
+						reg = <0x50 0x4>;
+					};
+					efuse_pufmisc: efuse-pufmisc@54 {
+						reg = <0x54 0x4>;
+					};
+					efuse_sec: efuse-sec@58 {
+						reg = <0x58 0x4>;
+					};
+					efuse_spkid: efuse-spkid@5c {
+						reg = <0x5c 0x4>;
+					};
+					efuse_aeskey: efuse-aeskey@60 {
+						reg = <0x60 0x20>;
+					};
+					efuse_ppk0hash: efuse-ppk0hash@a0 {
+						reg = <0xa0 0x30>;
+					};
+					efuse_ppk1hash: efuse-ppk1hash@d0 {
+						reg = <0xd0 0x30>;
+					};
+					efuse_pufuser: efuse-pufuser@100 {
+						reg = <0x100 0x7F>;
+					};
 				};
 			};
Signature · 1 line
2.40.1
author maintainer
#4 lore raw

PATCH 4/12 arm64: zynqmp: Describe USB wakeup interrupt

In reply to Michal Simek

Describe usb wakeup interrupt.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +6 -4
index c82275f1e79c..90fccae7ff5f 100644
@@ -1054,10 +1054,11 @@ dwc3_0: usb@fe200000 {
 				status = "disabled";
 				reg = <0x0 0xfe200000 0x0 0x40000>;
 				interrupt-parent = <&gic>;
-				interrupt-names = "host", "peripheral", "otg";
+				interrupt-names = "host", "peripheral", "otg", "wakeup";
 				interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 				clock-names = "ref";
 				/* iommus = <&smmu 0x860>; */
 				snps,quirk-frame-length-adjustment = <0x20>;

@@ -1085,10 +1086,11 @@ dwc3_1: usb@fe300000 {
 				status = "disabled";
 				reg = <0x0 0xfe300000 0x0 0x40000>;
 				interrupt-parent = <&gic>;
-				interrupt-names = "host", "peripheral", "otg";
+				interrupt-names = "host", "peripheral", "otg", "wakeup";
 				interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+					     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 				clock-names = "ref";
 				/* iommus = <&smmu 0x861>; */
 				snps,quirk-frame-length-adjustment = <0x20>;
Signature · 1 line
2.40.1
author maintainer
#5 lore raw

PATCH 5/12 arm64: zynqmp: Describe OCM controller

In reply to Michal Simek

Describe OCM controller which brings EDAC functionality.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +7 -0
index 90fccae7ff5f..27adead77220 100644
@@ -799,6 +799,13 @@ i2c1: i2c@ff030000 {
 			power-domains = <&zynqmp_firmware PD_I2C_1>;
 		};
 
+		ocm: memory-controller@ff960000 {
+			compatible = "xlnx,zynqmp-ocmc-1.0";
+			reg = <0x0 0xff960000 0x0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		pcie: pcie@fd0e0000 {
 			compatible = "xlnx,nwl-pcie-2.11";
 			status = "disabled";
Signature · 1 line
2.40.1
author maintainer
#6 lore raw

PATCH 6/12 arm64: zynqmp: Remove address/size-cells from ams node

In reply to Michal Simek

Remove unused address/size-cells properties without defining child.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 --
 1 file changed, 2 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +0 -2
index 27adead77220..a121afb8231c 100644
@@ -1146,8 +1146,6 @@ ams_pl: ams-pl@400 {
 				compatible = "xlnx,zynqmp-ams-pl";
 				status = "disabled";
 				reg = <0x400 0x400>;
-				#address-cells = <1>;
-				#size-cells = <0>;
 			};
 		};
Signature · 1 line
2.40.1
author maintainer
#7 lore raw

PATCH 7/12 arm64: zynqmp: Disable Tri-state for SDIO

In reply to Michal Simek

From: Tejas Bhumkar <[email protected]>

Since the zynqmp pinctrl driver now includes support for the tri-state registers, ensure that the pins needing output-enable are correctly configured for SOMs.

Currently, there is an issue with the detection of the MMC for the SOM kv260, resulting in the following error:
ZynqMP> mmc dev 1
Card did not respond to voltage select! : -110

To address this problem, configure the SDIO pins for output-enable to enable MMC detection.

Signed-off-by Tejas Bhumkar <[email protected]>
Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 1 +
 2 files changed, 2 insertions(+)
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +1 -0
index d7535a77b45e..a09909a6f885 100644
@@ -321,6 +321,7 @@ conf {
 			slew-rate = <SLEW_RATE_SLOW>;
 			power-source = <IO_STANDARD_LVCMOS18>;
 			bias-disable;
+			output-enable;
 		};
 
 		conf-cd {
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +1 -0
index a7b8fffad499..b3b8875f8f7a 100644
@@ -305,6 +305,7 @@ conf {
 			slew-rate = <SLEW_RATE_SLOW>;
 			power-source = <IO_STANDARD_LVCMOS18>;
 			bias-disable;
+			output-enable;
 		};
 
 		conf-cd {
Signature · 1 line
2.40.1
author maintainer
#8 lore raw

PATCH 8/12 arm64: zynqmp: Add compatible string for kv260

In reply to Michal Simek

The commit dbcd27526e6a ("dt-bindings: soc: xilinx: Add support for KV260 CC") added description for kv260 kit and it should be also reflected in DTs.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 6 ++++++
 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 6 ++++++
 2 files changed, 12 insertions(+)
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +6 -0
index a09909a6f885..0e5597e2fe10 100644
@@ -22,6 +22,12 @@
 /plugin/;
 
 &{/} {
+	compatible = "xlnx,zynqmp-sk-kv260-revA",
+		     "xlnx,zynqmp-sk-kv260-revY",
+		     "xlnx,zynqmp-sk-kv260-revZ",
+		     "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";
+	model = "ZynqMP KV260 revA";
+
 	si5332_0: si5332-0 { /* u17 */
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +6 -0
index b3b8875f8f7a..fb37c06cfd69 100644
@@ -17,6 +17,12 @@
 /plugin/;
 
 &{/} {
+	compatible = "xlnx,zynqmp-sk-kv260-rev2",
+		     "xlnx,zynqmp-sk-kv260-rev1",
+		     "xlnx,zynqmp-sk-kv260-revB",
+		     "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";
+	model = "ZynqMP KV260 revB";
+
 	si5332_0: si5332-0 { /* u17 */
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
Signature · 1 line
2.40.1
author maintainer
#9 lore raw

PATCH 9/12 arm64: zynqmp: Add description for ina260 on kv260

In reply to Michal Simek

The commit f7ab2d180e6a ("dt-bindings: hwmon: ina2xx: Describe ina260 chip"), commit f29996d0295e ("dt-bindings: hwmon: ina2xx:
Describe #io-channel-cells property") and commit eea32fafadd3 ("dt-bindings: hwmon: ina2xx: Add label property") added description for ina260 that's why describe them on kv260

Signed-off-by Michal Simek <[email protected]>

---

 .../boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso      | 12 +++++++++++-
 .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso      | 14 ++++++++++++--
 2 files changed, 23 insertions(+), 3 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +11 -1
index 0e5597e2fe10..95d16904d765 100644
@@ -28,6 +28,11 @@
 		     "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";
 	model = "ZynqMP KV260 revA";
 
+	ina260-u14 {
+		compatible = "iio-hwmon";
+		io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
+	};
+
 	si5332_0: si5332-0 { /* u17 */
 		compatible = "fixed-clock";
 		#clock-cells = <0>;

@@ -74,7 +79,12 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
 	scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 	sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 
-	/* u14 - 0x40 - ina260 */
+	u14: ina260@40 { /* u14 */
+		compatible = "ti,ina260";
+		#io-channel-cells = <1>;
+		label = "ina260-u14";
+		reg = <0x40>;
+	};
 	/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
 };
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +12 -2
index fb37c06cfd69..3ada04781950 100644
@@ -23,6 +23,11 @@
 		     "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";
 	model = "ZynqMP KV260 revB";
 
+	ina260-u14 {
+		compatible = "iio-hwmon";
+		io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
+	};
+
 	si5332_0: si5332-0 { /* u17 */
 		compatible = "fixed-clock";
 		#clock-cells = <0>;

@@ -69,8 +74,13 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
 	scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 	sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 
-	/* u14 - 0x40 - ina260 */
-	/* u43 - 0x2d - usb5744 */
+	u14: ina260@40 { /* u14 */
+		compatible = "ti,ina260";
+		#io-channel-cells = <1>;
+		label = "ina260-u14";
+		reg = <0x40>;
+	};
+	/* u43 - 0x2d - USB hub */
 	/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
 };
Signature · 1 line
2.40.1
author maintainer
#10 lore raw

PATCH 10/12 arm64: zynqmp: Describe DisplayPort connector for Kria

In reply to Michal Simek

From: Vishal Sagar <[email protected]>

Add a device tree node to describe the DisplayPort connector, and connect it to the DPSUB output.

The patch was tested on kv260-revB/rev2.

Signed-off-by Vishal Sagar <[email protected]>
Signed-off-by Michal Simek <[email protected]>

---

 .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +20 -0
index 3ada04781950..a74d0ac7e07a 100644
@@ -63,6 +63,18 @@ si5332_5: si5332-5 { /* u17 */
 		#clock-cells = <0>;
 		clock-frequency = <27000000>;
 	};
+
+	dpcon {
+		compatible = "dp-connector";
+		label = "P11";
+		type = "full-size";
+
+		port {
+			dpcon_in: endpoint {
+				remote-endpoint = <&dpsub_dp_out>;
+			};
+		};
+	};
 };
 
 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */

@@ -97,6 +109,14 @@ &zynqmp_dpsub {
 	phy-names = "dp-phy0", "dp-phy1";
 	phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
 	assigned-clock-rates = <27000000>, <25000000>, <300000000>;
+
+	ports {
+		port@5 {
+			dpsub_dp_out: endpoint {
+				remote-endpoint = <&dpcon_in>;
+			};
+		};
+	};
 };
 
 &zynqmp_dpdma {
Signature · 1 line
2.40.1
author maintainer
#11 lore raw

PATCH 11/12 arm64: zynqmp: Add support for K26 rev2 boards

In reply to Michal Simek

Revision 2 is SW compatible with revision 1 but it is necessary to reflect it in model and compatible properties which are parsed by user space. Rev 2 has improved a power on boot reset and MIO34 shutdown glich improvement done via an additional filter in the GreenPak chip.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts  | 8 +++++---
 arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts | 8 +++++---
 2 files changed, 10 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +5 -3
index 51622896b1b1..2841be11ae66 100644
@@ -1,8 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * dts file for Xilinx ZynqMP SM-K26 rev1/B/A
+ * dts file for Xilinx ZynqMP SM-K26 rev2/1/B/A
  *
  * (C) Copyright 2020 - 2021, Xilinx, Inc.
+ * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc.
  *
  * Michal Simek <[email protected]>
  */

@@ -17,8 +18,9 @@
 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
 
 / {
-	model = "ZynqMP SM-K26 Rev1/B/A";
-	compatible = "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB",
+	model = "ZynqMP SM-K26 Rev2/1/B/A";
+	compatible = "xlnx,zynqmp-sm-k26-rev2",
+		     "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB",
 		     "xlnx,zynqmp-sm-k26-revA", "xlnx,zynqmp-sm-k26",
 		     "xlnx,zynqmp";
arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts +5 -3
index 85b0d1677240..b804abe89d1d 100644
@@ -1,8 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * dts file for Xilinx ZynqMP SMK-K26 rev1/B/A
+ * dts file for Xilinx ZynqMP SMK-K26 rev2/1/B/A
  *
  * (C) Copyright 2020 - 2021, Xilinx, Inc.
+ * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc.
  *
  * Michal Simek <[email protected]>
  */

@@ -10,8 +11,9 @@
 #include "zynqmp-sm-k26-revA.dts"
 
 / {
-	model = "ZynqMP SMK-K26 Rev1/B/A";
-	compatible = "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB",
+	model = "ZynqMP SMK-K26 Rev2/1/B/A";
+	compatible = "xlnx,zynqmp-smk-k26-rev2",
+		     "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB",
 		     "xlnx,zynqmp-smk-k26-revA", "xlnx,zynqmp-smk-k26",
 		     "xlnx,zynqmp";
 };
Signature · 1 line
2.40.1
author maintainer
#12 lore raw

PATCH 12/12 arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property

In reply to Michal Simek

From: Vishal Patel <[email protected]>

Add pwm-fan node to control fan through hwmon and change pwm-cells property to 3 to allow fancontrol utility to function correctly.

Signed-off-by Vishal Patel <[email protected]>
Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +11 -0
index 2841be11ae66..86e6c4990560 100644
@@ -103,12 +103,23 @@ ams {
 			<&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>,
 			<&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>;
 	};
+
+	pwm-fan {
+		compatible = "pwm-fan";
+		status = "okay";
+		pwms = <&ttc0 2 40000 0>;
+	};
 };
 
 &modepin_gpio {
 	label = "modepin";
 };
 
+&ttc0 {
+	status = "okay";
+	#pwm-cells = <3>;
+};
+
 &uart1 { /* MIO36/MIO37 */
 	status = "okay";
 };
Signature · 1 line
2.40.1
author maintainer Applied
#13 lore raw
In reply to Michal Simek
Quoted 33 lines · Michal Simek

Hi,

over last couple of months dt bindings have been updated but dtbs didn't reflect it that's why I have created this series to match description used in U-Boot to be able to switch to OF_UPSTREAM for ZynqMP platforms. There are still small missing part regarding usb peer hub and MTD layouts for other boards.
The rest should be in sync already.

Thanks,
Michal

Michal Simek (9):
arm64: zynqmp: Align nvmem node with dt schema
arm64: zynqmp: Use fpga-region as node name
arm64: zynqmp: Add missing description for efuses
arm64: zynqmp: Describe USB wakeup interrupt
arm64: zynqmp: Describe OCM controller
arm64: zynqmp: Remove address/size-cells from ams node
arm64: zynqmp: Add compatible string for kv260
arm64: zynqmp: Add description for ina260 on kv260
arm64: zynqmp: Add support for K26 rev2 boards

Tejas Bhumkar (1):
arm64: zynqmp: Disable Tri-state for SDIO

Vishal Patel (1):
arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property

Vishal Sagar (1):
arm64: zynqmp: Describe DisplayPort connector for Kria

Quoted 7 lines
  .../boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 19 +++-
  .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 41 ++++++++-
  .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts    | 19 +++-
  .../boot/dts/xilinx/zynqmp-smk-k26-revA.dts   |  8 +-
  arch/arm64/boot/dts/xilinx/zynqmp.dtsi        | 91 ++++++++++++++++---
  5 files changed, 156 insertions(+), 22 deletions(-)

Applied.
M