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arm64: dts: intel: set alias for i3c controllers for agilex5 variants and derivatives

PATCH Superseded Adrian Ng Ho Yin 2 participants 5 messages May 5 Device tree bindings

v2 of 3 Superseded Latest is v3 →

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v2 cover arm64: dts: intel: set alias for i3c controllers for agilex5 variants and derivatives

Agilex5 SoCFPGA variants and derivatives have 2 i3c controllers, a main master and a secondary master. Setting the alias for both i3c controllers to prevent bus id contention when both controllers are enabled which results in driver probe failures.

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changelog
v1->v2
* Simplify commit titles
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Adrian Ng Ho Yin (2):
arm64: dts: intel: set alias for i3c controllers for agilex5 variants
arm64: dts: intel: set alias for i3c controllers for agilex3

 arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts         | 2 ++
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts         | 2 ++
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts    | 2 ++
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts | 2 ++
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts    | 2 ++
 5 files changed, 10 insertions(+)
Signature · 1 line
2.49.GIT
#1 lore raw

PATCH v2 1/2 arm64: dts: intel: set alias for i3c controllers for agilex5 variants

From: Adrian Ng Ho Yin <[email protected]>

Agilex5 SoCFPGA variants and derivities have 2 i3c controllers, a main master and a secondary master. Setting the alias for both i3c controllers to prevent bus id contention when both controllers are enabled which results in driver probe failures.

---
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts         | 2 ++
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts    | 2 ++
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts | 2 ++
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts    | 2 ++
 4 files changed, 8 insertions(+)
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts +2 -0
index 262bb3e8e5c7..dae0db9f8819 100644
@@ -13,6 +13,8 @@ aliases {
 		ethernet0 = &gmac0;
 		ethernet1 = &gmac1;
 		ethernet2 = &gmac2;
+		i3c0 = &i3c0;
+		i3c1 = &i3c1;
 	};
 
 	chosen {
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts +2 -0
index f71e1280c778..86137380df04 100644
@@ -11,6 +11,8 @@ / {
 	aliases {
 		serial0 = &uart0;
 		ethernet2 = &gmac2;
+		i3c0 = &i3c0;
+		i3c1 = &i3c1;
 	};
 
 	chosen {
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts +2 -0
index 1831402d8808..e728cedb4cbd 100644
@@ -11,6 +11,8 @@ / {
 	aliases {
 		serial0 = &uart0;
 		ethernet2 = &gmac2;
+		i3c0 = &i3c0;
+		i3c1 = &i3c1;
 	};
 
 	chosen {
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts +2 -0
index ec4541d44c9b..21faa47681fa 100644
@@ -11,6 +11,8 @@ / {
 	aliases {
 		serial0 = &uart0;
 		ethernet0 = &gmac0;
+		i3c0 = &i3c0;
+		i3c1 = &i3c1;
 	};
 
 	chosen {
Signature · 1 line
2.49.GIT
#2 lore raw

Re: [PATCH v2 1/2] arm64: dts: intel: set alias for i3c controllers for agilex5 variants

Sorry if I was unclear, the commit header should be:

arm64: dts: socfpga: agilex5: set alias for i3c controllers

For future reference, please run a 'git log' on the files you're changing as an example.

Quoted 7 lines · Adrian Ng Ho Yin

From: Adrian Ng Ho Yin <[email protected]>

Agilex5 SoCFPGA variants and derivities have 2 i3c controllers, a main master and a secondary master. Setting the alias for both i3c controllers to prevent bus id contention when both controllers are enabled which results in driver probe failures.

Dinh

#3 lore raw

PATCH v2 2/2 arm64: dts: intel: set alias for i3c controllers for agilex3

In reply to Adrian Ng Ho Yin

From: Adrian Ng Ho Yin <[email protected]>

Agilex3 SoCFPGA have 2 i3c controllers, a main master and a secondary master. Setting the alias for both i3c controllers to prevent bus id contention when both controllers are enabled which results in driver probe failures.

---
 arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts | 2 ++
 1 file changed, 2 insertions(+)
arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts +2 -0
index 14b299f19f3a..25e17df0cbdb 100644
@@ -12,6 +12,8 @@ / {
 	aliases {
 		serial0 = &uart0;
 		ethernet2 = &gmac2;
+		i3c0 = &i3c0;
+		i3c1 = &i3c1;
 	};
 
 	chosen {
Signature · 1 line
2.49.GIT
#4 lore raw

Re: [PATCH v2 2/2] arm64: dts: intel: set alias for i3c controllers for agilex3

Please use this commit header:

arm64: dts: socfpga: agilex3: set alias for i3c controllers

Quoted 9 lines · Adrian Ng Ho Yin

From: Adrian Ng Ho Yin <[email protected]>

Agilex3 SoCFPGA have 2 i3c controllers, a main master and a secondary master. Setting the alias for both i3c controllers to prevent bus id contention when both controllers are enabled which results in driver probe failures.

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Dinh