arm: dts: aspeed: add Intel AVCRP and JNCRP BMC platforms

PATCH Superseded Dawid Glazik 3 participants 8 messages Oct 21 – Oct 25

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Device tree bindings Arm/Aspeed machine support

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Dawid Glazik

author

2026-10-21 19:31 UTC #0 lore raw

v3 cover arm: dts: aspeed: add Intel AVCRP and JNCRP BMC platforms

This series adds initial upstream support for the Intel AVCRP and JNCRP BMC platforms based on the ASPEED AST2600.

The first patch adds the board compatibles to the ASPEED binding. The remaining two patches add the board DTS files and register them in the ASPEED DTB build list.

Dawid Glazik (3):
dt-bindings: arm: aspeed: Add Intel AVCRP and JNCRP boards
ARM: dts: aspeed: add Intel AVCRP BMC
ARM: dts: aspeed: add Intel JNCRP BMC

 .../bindings/arm/aspeed/aspeed.yaml           |   2 +
 arch/arm/boot/dts/aspeed/Makefile             |   2 +
 .../dts/aspeed/aspeed-bmc-intel-avcrp.dts     | 322 ++++++++++++++++++
 .../dts/aspeed/aspeed-bmc-intel-jncrp.dts     | 276 +++++++++++++++
 4 files changed, 602 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts
 create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts

base-commit: e7ae89a0c97ce2b68b0983cd01eda67cf373517d
prerequisite-patch-id: 3af4bd880f896c97741b54ee18845b305a4bd061
prerequisite-patch-id: 23091b539ec7723a865d82da7703bf70c6ed0222
prerequisite-patch-id: ac42a7a373fdc407f6377d0b1c74d728af50ba42

Signature · 1 line

2.43.0

Dawid Glazik

author

2026-10-21 19:31 UTC #1 lore raw

PATCH v3 1/3 dt-bindings: arm: aspeed: Add Intel AVCRP and JNCRP boards

Add compatible strings for the Intel AVCRP and JNCRP BMC boards.

Signed-off-by Dawid Glazik <[email protected]>

Acked-by Krzysztof Kozlowski <[email protected]>

---
v2:
- Squash the separate AVCRP and JNCRP commits from v1 into a single commit, since the changes are small and closely related
- Fix compatible string ordering so the new entries stay in alphabetical order within the enum
---

---
 Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 2 ++
 1 file changed, 2 insertions(+)

Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +2 -0

index 8ec7a3e74a21..60e8e73da3f5 100644
@@ -107,6 +107,8 @@ properties:
               - ibm,sbp1-bmc
               - ibm,system1-bmc
               - ibm,tacoma-bmc
+              - intel,avcrp-bmc
+              - intel,jncrp-bmc
               - inventec,starscream-bmc
               - inventec,transformer-bmc
               - jabil,rbp-bmc

Signature · 1 line

2.43.0

Dawid Glazik

author

2026-10-21 19:31 UTC #2 lore raw

PATCH v3 2/3 ARM: dts: aspeed: add Intel AVCRP BMC

In reply to Dawid Glazik

Add the initial AST2600 device tree for the Intel AVCRP BMC platform.

Signed-off-by Dawid Glazik <[email protected]>

Reviewed-by Andrew Lunn <[email protected]>

---
v3:
- Sorted nodes alphabetically
- Sorted properties per dts-coding-style
- Removed lpc-snoop label
- Removed &i3c_global since it's enabled by default
- Removed GPIO line names for pins claimed by pinctrl
- Restored Reviewed-by from Andrew Lunn, dropped by mistake in v2
v2:
- Reviewed-by: Andrew Lunn for nodes: &mdio1, &mac1
- Replace bootargs console=ttyS4,115200n8 with stdout-path = &uart5
- Remove the unreferenced video_memory reserved-memory node
---

---
 arch/arm/boot/dts/aspeed/Makefile             |   1 +
 .../dts/aspeed/aspeed-bmc-intel-avcrp.dts     | 322 ++++++++++++++++++
 2 files changed, 323 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts

arch/arm/boot/dts/aspeed/Makefile +1 -0

index 767f7c7652d5..ea4645ef9872 100644
@@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
 	aspeed-bmc-ibm-rainier-4u.dtb \
 	aspeed-bmc-ibm-sbp1.dtb \
 	aspeed-bmc-ibm-system1.dtb \
+	aspeed-bmc-intel-avcrp.dtb \
 	aspeed-bmc-intel-s2600wf.dtb \
 	aspeed-bmc-inspur-fp5280g2.dtb \
 	aspeed-bmc-inspur-nf5280m6.dtb \

arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +322 -0

322 lines not on this page · raw message

Signature · 1 line

2.43.0

[email protected]

AI review

2026-10-21 19:46 UTC #3 lore raw

Re: [PATCH v3 2/3] ARM: dts: aspeed: add Intel AVCRP BMC

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] ARM: dts: aspeed: avcrp: pinmux conflicts on uart3, uart4, and gpio0 --

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] ARM: dts: aspeed: avcrp: pinmux conflicts on uart3, uart4, and gpio0 --

commit 01d3c06dda0485c95a5f1bf0fb7cf7492e56bdd4
Author: Dawid Glazik <[email protected]>

ARM: dts: aspeed: add Intel AVCRP BMC

This commit adds the initial device tree for the Intel AVCRP BMC platform based on the Aspeed AST2600 SoC.

Quoted 6 lines

arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +0 -0
new file mode 100644
index 0000000000000..010ace09d90ff
@@ -0,0 +1,322 @@

[ ... ]

Quoted 6 lines

+&gpio0 {

arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +5 -0

+	gpio-line-names =
+		/*A0-A7*/ "", "", "", "", "SMB_CPU_PIROM_SCL", "SMB_CPU_PIROM_SDA",
+				"SMB_IPMB_STBY_LVC3_SCL", "SMB_IPMB_STBY_LVC3_SDA",
+		/*B0-B7*/ "", "", "", "FM_CPU1_ERR2_LVT3_N", "", "",
+				"FM_BMC_BMCINIT_R", "FP_ID_LED_N",

[ ... ]

Quoted 2 lines

arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +2 -0
+		/*L0-L7*/ "", "", "", "", "PREQ_N", "TCK_MUX_SEL", "", "",
+		/*M0-M7*/ "", "", "", "", "", "", "SPA_SOUT", "SPA_SIN",

[ ... ]

Quoted 1 line

+};

[ ... ]

arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts line 304

Quoted 11 lines

+&uart1 {
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +10 -0
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&uart4 {
+	status = "okay";
+};

[Severity: Medium]
Should &uart3 and &uart4 override pinctrl-0 = <>; here, and should the pinctrl-claimed pins in &gpio0 be cleared from gpio-line-names?

In arch/arm/boot/dts/aspeed/aspeed-g6.dtsi, uart3 and uart4 default to pinctrl_txd3_default / pinctrl_rxd3_default (pins L4 and L5) and pinctrl_txd4_default / pinctrl_rxd4_default (pins B6 and B7). In &gpio0 above, those pins are named as board lines PREQ_N, TCK_MUX_SEL, FM_BMC_BMCINIT_R, and FP_ID_LED_N.

Because aspeed_g6_pinmux_ops in drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c sets .strict = true, probing &uart3 and &uart4 claims exclusive mux ownership of L4-L5 and B6-B7 via pin_request() in drivers/pinctrl/pinmux.c. This muxes those balls to TXD3/RXD3 and TXD4/RXD4 and causes any subsequent request for those lines via aspeed_gpio_request() -> pinctrl_gpio_request() to fail with -EINVAL.

Also, in &gpio0, pins A4-A7 (SMB_CPU_PIROM_SCL, SMB_CPU_PIROM_SDA, SMB_IPMB_STBY_LVC3_SCL, SMB_IPMB_STBY_LVC3_SDA) and M6-M7 (SPA_SOUT, SPA_SIN) still have gpio-line-names entries even though they are claimed by &i2c12 (pinctrl_i2c13_default), &i2c13 (pinctrl_i2c14_default), and &uart1 (pinctrl_txd1_default / pinctrl_rxd1_default).

Signature · 1 line

Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2

Dawid Glazik

author

2026-10-21 19:31 UTC #4 lore raw

PATCH v3 3/3 ARM: dts: aspeed: add Intel JNCRP BMC

In reply to Dawid Glazik

Add the initial AST2600 device tree for the Intel JNCRP BMC platform.

Signed-off-by Dawid Glazik <[email protected]>

Reviewed-by Andrew Lunn <[email protected]>

---
v3:
- Sorted nodes alphabetically
- Sorted properties per dts-coding-style
- Removed lpc-snoop label
- Removed &i3c_global since it's enabled by default
- Added &kcs3 and replaced flash layout with 128MB one
- Restored Reviewed-by from Andrew Lunn, dropped by mistake in v2
v2:
- Reviewed-by: Andrew Lunn for nodes: &mdio1, &mac1
- Replace bootargs console=ttyS4,115200n8 with stdout-path = &uart5
---

---
 arch/arm/boot/dts/aspeed/Makefile             |   1 +
 .../dts/aspeed/aspeed-bmc-intel-jncrp.dts     | 276 ++++++++++++++++++
 2 files changed, 277 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts

arch/arm/boot/dts/aspeed/Makefile +1 -0

index ea4645ef9872..f0d665b3dcee 100644
@@ -55,6 +55,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
 	aspeed-bmc-ibm-sbp1.dtb \
 	aspeed-bmc-ibm-system1.dtb \
 	aspeed-bmc-intel-avcrp.dtb \
+	aspeed-bmc-intel-jncrp.dtb \
 	aspeed-bmc-intel-s2600wf.dtb \
 	aspeed-bmc-inspur-fp5280g2.dtb \
 	aspeed-bmc-inspur-nf5280m6.dtb \

arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts new file +276 -0

276 lines not on this page · raw message

Signature · 1 line

2.43.0

Andrew Jeffery

maintainer

2026-10-23 04:17 UTC #5 lore raw

In reply to Dawid Glazik

Hi Dawid,

Quoted 16 lines · Dawid Glazik

This series adds initial upstream support for the Intel AVCRP and JNCRP BMC platforms based on the ASPEED AST2600.
The first patch adds the board compatibles to the ASPEED binding. The remaining two patches add the board DTS files and register them in the ASPEED DTB build list.
Dawid Glazik (3):
dt-bindings: arm: aspeed: Add Intel AVCRP and JNCRP boards
ARM: dts: aspeed: add Intel AVCRP BMC
ARM: dts: aspeed: add Intel JNCRP BMC
.../bindings/arm/aspeed/aspeed.yaml | 2 + arch/arm/boot/dts/aspeed/Makefile | 2 + .../dts/aspeed/aspeed-bmc-intel-avcrp.dts | 322 ++++++++++++++++++ .../dts/aspeed/aspeed-bmc-intel-jncrp.dts | 276 +++++++++++++++

Quoted 6 lines

 4 files changed, 602 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts
base-commit: e7ae89a0c97ce2b68b0983cd01eda67cf373517d

Can you please discuss why you based this series on v7.1-rc5? v7.3 has been released, v7.1-rc5 is a long time ago.

In the future please base changes for the AST2600 on the latest -rc1, or the aspeed/arm/dt branch of bmc/linux.git on git.kernel.org.

Rebasing allows you to remove 2/3rds of this prerequisite list.

Quoted 1 line

prerequisite-patch-id: 3af4bd880f896c97741b54ee18845b305a4bd061

This was already applied in 7.2

Quoted 1 line

prerequisite-patch-id: 23091b539ec7723a865d82da7703bf70c6ed0222

Can you please rebase this patch to send it to Lee on its own. The AST2600-based platforms currently generate a warning without it. I had hoped Lee would apply it in the same cycle.

Quoted 1 line

prerequisite-patch-id: ac42a7a373fdc407f6377d0b1c74d728af50ba42

This was already applied in 7.2

Andrew

Dawid Glazik

author

2026-10-23 09:21 UTC #6 lore raw

Hi Andrew,

Quoted 24 lines · Andrew Jeffery

Hi Dawid,
Quoted 21 lines · Dawid Glazik
This series adds initial upstream support for the Intel AVCRP and JNCRP BMC platforms based on the ASPEED AST2600.
The first patch adds the board compatibles to the ASPEED binding. The remaining two patches add the board DTS files and register them in the ASPEED DTB build list.
Dawid Glazik (3):
dt-bindings: arm: aspeed: Add Intel AVCRP and JNCRP boards
ARM: dts: aspeed: add Intel AVCRP BMC
ARM: dts: aspeed: add Intel JNCRP BMC
  .../bindings/arm/aspeed/aspeed.yaml           |   2 +
  arch/arm/boot/dts/aspeed/Makefile             |   2 +
  .../dts/aspeed/aspeed-bmc-intel-avcrp.dts     | 322 ++++++++++++++++++
  .../dts/aspeed/aspeed-bmc-intel-jncrp.dts     | 276 +++++++++++++++
  4 files changed, 602 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts

Quoted 8 lines

Quoted 1 line
base-commit: e7ae89a0c97ce2b68b0983cd01eda67cf373517d
Can you please discuss why you based this series on v7.1-rc5? v7.3 has been released, v7.1-rc5 is a long time ago.
In the future please base changes for the AST2600 on the latest -rc1, or the aspeed/arm/dt branch of bmc/linux.git on git.kernel.org.

That's my mistake. I'll rebase onto aspeed/arm/dt of bmc/linux.git and send v4. For future AST2600 changes I'll use that branch as the base.

Quoted 5 lines

Quoted 1 line
prerequisite-patch-id: 23091b539ec7723a865d82da7703bf70c6ed0222
Can you please rebase this patch to send it to Lee on its own. The AST2600-based platforms currently generate a warning without it. I had hoped Lee would apply it in the same cycle.

Sure, I will reach out to him.

Regards,
Dawid

Andrew Jeffery

maintainer

2026-10-25 23:31 UTC #7 lore raw

Quoted 32 lines · Dawid Glazik

Hi Andrew,
Quoted 29 lines · Andrew Jeffery
Hi Dawid,
Quoted 16 lines · Dawid Glazik
This series adds initial upstream support for the Intel AVCRP and JNCRP BMC platforms based on the ASPEED AST2600.
The first patch adds the board compatibles to the ASPEED binding. The remaining two patches add the board DTS files and register them in the ASPEED DTB build list.
Dawid Glazik (3):
   dt-bindings: arm: aspeed: Add Intel AVCRP and JNCRP boards
   ARM: dts: aspeed: add Intel AVCRP BMC
   ARM: dts: aspeed: add Intel JNCRP BMC
  .../bindings/arm/aspeed/aspeed.yaml           |   2 + arch/arm/boot/dts/aspeed/Makefile             |   2 + .../dts/aspeed/aspeed-bmc-intel-avcrp.dts     | 322 ++++++++++++++++++ .../dts/aspeed/aspeed-bmc-intel-jncrp.dts     | 276 +++++++++++++++
Quoted 6 lines
  4 files changed, 602 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts
base-commit: e7ae89a0c97ce2b68b0983cd01eda67cf373517d
Can you please discuss why you based this series on v7.1-rc5? v7.3 has been released, v7.1-rc5 is a long time ago.

Quoted 6 lines

Quoted 3 lines
In the future please base changes for the AST2600 on the latest -rc1, or the aspeed/arm/dt branch of bmc/linux.git on git.kernel.org.
That's my mistake. I'll rebase onto aspeed/arm/dt of bmc/linux.git and send v4. For future AST2600 changes I'll use that branch as the base.

Thanks.

Quoted 7 lines

Quoted 5 lines
Quoted 1 line
prerequisite-patch-id: 23091b539ec7723a865d82da7703bf70c6ed0222
Can you please rebase this patch to send it to Lee on its own. The AST2600-based platforms currently generate a warning without it. I had hoped Lee would apply it in the same cycle.
Sure, I will reach out to him.

Thanks for this also :)

Andrew