arm: dts: aspeed: Add Intel AVCRP and JNCRP BMC platforms
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v5 cover arm: dts: aspeed: Add Intel AVCRP and JNCRP BMC platforms
This series adds initial upstream support for the Intel AVCRP and JNCRP BMC platforms. Both are x86 server platforms with Intel host processors, managed by an ASPEED AST2600 BMC.
The first patch adds the board compatibles to the ASPEED binding. The remaining two patches add the board DTS files and register them in the ASPEED DTB build list.
Changes in v5:
- Removed bootargs from the chosen node
- Added a description of each platform to the commit messages
- Capitalised the first word of the DTS subjects
- Rebased onto the current aspeed/arm/dt
Dawid Glazik (3):
dt-bindings: arm: aspeed: Add Intel AVCRP and JNCRP boards
ARM: dts: aspeed: Add Intel AVCRP BMC
ARM: dts: aspeed: Add Intel JNCRP BMC
.../bindings/arm/aspeed/aspeed.yaml | 2 + arch/arm/boot/dts/aspeed/Makefile | 2 + .../dts/aspeed/aspeed-bmc-intel-avcrp.dts | 321 ++++++++++++++++++ .../dts/aspeed/aspeed-bmc-intel-jncrp.dts | 275 +++++++++++++++ 4 files changed, 600 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts
base-commit: 6767ba3efdda2d27e5eab719db39a7ed98d28b35
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2.43.0
PATCH v5 1/3 dt-bindings: arm: aspeed: Add Intel AVCRP and JNCRP boards
Add compatible strings for the Intel AVCRP and JNCRP BMC boards.
---
v5:
- Rebased onto the current aspeed/arm/dt, no other changes
v4:
- Rebased onto aspeed/arm/dt of bmc/linux.git, no other changes
v2:
- Squash the separate AVCRP and JNCRP commits from v1 into a single commit, since the changes are small and closely related
- Fix compatible string ordering so the new entries stay in alphabetical order within the enum
--- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 2 ++ 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +2 -0
@@ -110,6 +110,8 @@ properties: - ibm,sbp1-bmc - ibm,system1-bmc - ibm,tacoma-bmc + - intel,avcrp-bmc + - intel,jncrp-bmc - inventec,starscream-bmc - inventec,transformer-bmc - jabil,rbp-bmc
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2.43.0
PATCH v5 2/3 ARM: dts: aspeed: Add Intel AVCRP BMC
In reply to Dawid GlazikAVCRP is an Intel x86 server platform equipped with an ASPEED AST2600 BMC. The BMC is used for out-of-band management, platform monitoring, and system control.
---
v5:
- Removed bootargs from the chosen node
- Added a description of the platform to the commit message, written in the style of other boards upstream (Facebook, Lenovo, Ampere)
- Rebased onto the current aspeed/arm/dt
- Capitalised the first word of the subject
v4:
- Rebased onto aspeed/arm/dt of bmc/linux.git, no other changes
v3:
- Sorted nodes alphabetically
- Sorted properties per dts-coding-style
- Removed lpc-snoop label
- Removed &i3c_global since it's enabled by default
- Removed GPIO line names for pins claimed by pinctrl
- Restored Reviewed-by from Andrew Lunn, dropped by mistake in v2
v2:
- Reviewed-by: Andrew Lunn for nodes: &mdio1, &mac1
- Replace bootargs console=ttyS4,115200n8 with stdout-path = &uart5
- Remove the unreferenced video_memory reserved-memory node
--- arch/arm/boot/dts/aspeed/Makefile | 1 + .../dts/aspeed/aspeed-bmc-intel-avcrp.dts | 321 ++++++++++++++++++ 2 files changed, 322 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts
arch/arm/boot/dts/aspeed/Makefile +1 -0
@@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-ibm-rainier-4u.dtb \ aspeed-bmc-ibm-sbp1.dtb \ aspeed-bmc-ibm-system1.dtb \ + aspeed-bmc-intel-avcrp.dtb \ aspeed-bmc-intel-s2600wf.dtb \ aspeed-bmc-inspur-fp5280g2.dtb \ aspeed-bmc-inspur-nf5280m6.dtb \
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +321 -0
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2.43.0
[email protected]
AI reviewRe: [PATCH v5 2/3] ARM: dts: aspeed: Add Intel AVCRP BMC
Thank you for your contribution! Sashiko AI review found 2 potential issues to consider: - [High] ARM: dts: aspeed: avcrp: uart3/4 pinmux conflicts and pinctrl GPIO names - [Low] ARM: dts: aspeed…
Thank you for your contribution! Sashiko AI review found 2 potential issues to consider:
- [High] ARM: dts: aspeed: avcrp: uart3/4 pinmux conflicts and pinctrl GPIO names
- [Low] ARM: dts: aspeed: avcrp: unnecessary RMII RCLK clock specified on RGMII mac1
--
commit 60b4388d543f21749b3a54e80fb2aad89bf0d6d7
Author: Dawid Glazik <[email protected]>
ARM: dts: aspeed: Add Intel AVCRP BMC
This commit adds the device tree for the Intel AVCRP BMC platform based on the ASPEED AST2600 SoC.
Quoted 5 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +0
-0
[ ... ]
Quoted 6 lines
+&gpio0 {
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +5
-0+ gpio-line-names = + /*A0-A7*/ "", "", "", "", "SMB_CPU_PIROM_SCL", "SMB_CPU_PIROM_SDA", + "SMB_IPMB_STBY_LVC3_SCL", "SMB_IPMB_STBY_LVC3_SDA", + /*B0-B7*/ "", "", "", "FM_CPU1_ERR2_LVT3_N", "", "", + "FM_BMC_BMCINIT_R", "FP_ID_LED_N",
[ ... ]
Quoted 2 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +2
-0+ /*L0-L7*/ "", "", "", "", "PREQ_N", "TCK_MUX_SEL", "", "", + /*M0-M7*/ "", "", "", "", "", "", "SPA_SOUT", "SPA_SIN",
[ ... ]
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts line 193
Quoted 11 lines
+&mac1 {
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +10
-0+ clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>, + <&syscon ASPEED_CLK_MAC2RCLK>; + clock-names = "MACCLK", "RCLK"; + phy-handle = <ðphy1>; + phy-mode = "rgmii-id"; + pinctrl-0 = <&pinctrl_rgmii2_default>; + pinctrl-names = "default"; + + status = "okay"; +};
[Severity: Low]
Does &mac1 need the second clock entry here? In aspeed-g6.dtsi, &mac1 already sets clocks to ASPEED_CLK_GATE_MAC2CLK, and the optional second clock (ASPEED_CLK_MAC2RCLK) gates the 50MHz reference clock output for rmii mode, which is unused when phy-mode is "rgmii-id".
[ ... ]
Quoted 9 lines
+&uart1 {
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +8
-0+ status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 {
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts line 311
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts new file +10
-0+ status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&uart_routing { + status = "okay"; +};
[Severity: High]
Should &uart3 and &uart4 override pinctrl-0 = <>; when used with &uart_routing on this board?
In aspeed-g6.dtsi, &uart3 defaults to pinctrl_txd3_default and pinctrl_rxd3_default (pins L4 and L5), and &uart4 defaults to pinctrl_txd4_default and pinctrl_rxd4_default (pins B6 and B7). Without clearing pinctrl-0, probing &uart3 and &uart4 muxes those balls away from &gpio0, driving serial tx onto the board lines named in gpio-line-names on B6 and L4 and causing gpio requests on B6, B7, L4 and L5 to fail with -EINVAL under strict pinmux.
In addition, &gpio0 still sets gpio-line-names on pins A4-A7 and M6-M7, which are claimed by the default pinctrl of &i2c12, &i2c13 and &uart1.
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Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2
Andrew Jeffery
maintainerRe: [PATCH v5 2/3] ARM: dts: aspeed: Add Intel AVCRP BMC
In reply to Dawid GlazikQuoted 3 lines · Dawid Glazik
AVCRP is an Intel x86 server platform equipped with an ASPEED AST2600 BMC. The BMC is used for out-of-band management, platform monitoring, and system control.
It's probably my fault to some degree for not providing a better explanation of what I was after on v4, and for merging changes from others in the past that were pretty lax on the description, but what I was hoping for was something more like e.g:
- f28674fab34f ("ARM: dts: aspeed: Add NVIDIA MSX4 HPM"), or
- bc83b7353d2b ("ARM: dts: aspeed: Add Facebook Anacapa platform")
Are there more details you can provide? If there are, I'm fine if you reply here with them, and if there are no further concerns I can update the commit message while applying the patches.
This also applies to the JNCRP patch that follows.
Andrew
Re: [PATCH v5 2/3] ARM: dts: aspeed: Add Intel AVCRP BMC
Quoted 13 lines · Andrew Jeffery
Quoted 3 lines · Dawid Glazik
AVCRP is an Intel x86 server platform equipped with an ASPEED AST2600 BMC. The BMC is used for out-of-band management, platform monitoring, and system control.
It's probably my fault to some degree for not providing a better explanation of what I was after on v4, and for merging changes from others in the past that were pretty lax on the description, but what I was hoping for was something more like e.g:
-
f28674fab34f("ARM: dts: aspeed: Add NVIDIA MSX4 HPM"), or
-bc83b7353d2b("ARM: dts: aspeed: Add Facebook Anacapa platform")
Quoted 7 lines
Are there more details you can provide? If there are, I'm fine if you reply here with them, and if there are no further concerns I can update the commit message while applying the patches.
This also applies to the JNCRP patch that follows.
Andrew
Hi Andrew,
Thanks, that helps. I also found one more issue in v5 (uart-routing issue), so I'll send a v6 with the fuller descriptions below instead of having you edit them. Please hold off applying v5.
AVCRP is an Intel x86 server platform. The BMC is an ASPEED AST2600-based RunBMC module on the platform's DC-SCM. It supports the platform's out-of-band management and exposes board management I/O such as the system UARTs, status LEDs and control buttons, while integrating with the host's telemetry and management infrastructure.
JNCRP is an Intel x86 server platform managed by an ASPEED AST2600 BMC.
The BMC is the platform management controller for the host system and supports platform power and reset control, while participating in out-of-band monitoring and reporting for host faults during bring-up and normal operation.
Does this shape work for you?
Best regards,
Dawid
Andrew Jeffery
maintainerRe: [PATCH v5 2/3] ARM: dts: aspeed: Add Intel AVCRP BMC
Quoted 28 lines · Dawid Glazik
Quoted 13 lines · Andrew Jeffery
Quoted 3 lines · Dawid Glazik
AVCRP is an Intel x86 server platform equipped with an ASPEED AST2600 BMC. The BMC is used for out-of-band management, platform monitoring, and system control.
It's probably my fault to some degree for not providing a better explanation of what I was after on v4, and for merging changes from others in the past that were pretty lax on the description, but what I was hoping for was something more like e.g:
-
f28674fab34f("ARM: dts: aspeed: Add NVIDIA MSX4 HPM"), or
-bc83b7353d2b("ARM: dts: aspeed: Add Facebook Anacapa platform")Quoted 7 lines
Are there more details you can provide? If there are, I'm fine if you reply here with them, and if there are no further concerns I can update the commit message while applying the patches.
This also applies to the JNCRP patch that follows.
Andrew
Hi Andrew,
Thanks, that helps. I also found one more issue in v5 (uart-routing issue), so I'll send a v6 with the fuller descriptions below instead of having you edit them. Please hold off applying v5.
Quoted 5 lines
AVCRP is an Intel x86 server platform. The BMC is an ASPEED AST2600-based RunBMC module on the platform's DC-SCM. It supports the platform's out-of-band management and exposes board management I/O such as the system UARTs, status LEDs and control buttons, while integrating with the host's telemetry and management infrastructure.
Can you talk more about the division of duties around RunBMC vs DC-SCM? Can you describe how components of each spec are used in the design?
What's the motivation for designing this module vs using another? Are there any specific target platforms intended for it? If there are, then some further details about those would be nice. If not, no problem.
Quoted 6 lines
JNCRP is an Intel x86 server platform managed by an ASPEED AST2600 BMC. The BMC is the platform management controller for the host system and supports platform power and reset control, while participating in out-of-band monitoring and reporting for host faults during bring-up and normal operation.
You don't mention RunBMC/DC-SCM here, so I assume the BMC is integrated into the platform? Can you describe the purpose of the platform itself (beyond the purpose of the BMC, which tends to be the same for most platforms)?
Cheers,
Andrew
PATCH v5 3/3 ARM: dts: aspeed: Add Intel JNCRP BMC
In reply to Dawid GlazikJNCRP is an Intel x86 server platform equipped with an ASPEED AST2600 BMC. The BMC is used for out-of-band management, platform monitoring, and system control.
---
v5:
- Removed bootargs from the chosen node
- Added a description of the platform to the commit message, written in the style of other boards upstream (Facebook, Lenovo, Ampere)
- Rebased onto the current aspeed/arm/dt
- Capitalised the first word of the subject
v4:
- Rebased onto aspeed/arm/dt of bmc/linux.git, no other changes
v3:
- Sorted nodes alphabetically
- Sorted properties per dts-coding-style
- Removed lpc-snoop label
- Removed &i3c_global since it's enabled by default
- Added &kcs3 and replaced flash layout with 128MB one
- Restored Reviewed-by from Andrew Lunn, dropped by mistake in v2
v2:
- Reviewed-by: Andrew Lunn for nodes: &mdio1, &mac1
- Replace bootargs console=ttyS4,115200n8 with stdout-path = &uart5
--- arch/arm/boot/dts/aspeed/Makefile | 1 + .../dts/aspeed/aspeed-bmc-intel-jncrp.dts | 275 ++++++++++++++++++ 2 files changed, 276 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts
arch/arm/boot/dts/aspeed/Makefile +1 -0
@@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-ibm-sbp1.dtb \ aspeed-bmc-ibm-system1.dtb \ aspeed-bmc-intel-avcrp.dtb \ + aspeed-bmc-intel-jncrp.dtb \ aspeed-bmc-intel-s2600wf.dtb \ aspeed-bmc-inspur-fp5280g2.dtb \ aspeed-bmc-inspur-nf5280m6.dtb \
arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts new file +275 -0
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