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Add PMIC DT files for sc7280

PATCH RESEND Superseded satya priya 4 participants 22 messages May 18, 2021 – May 21, 2021

Subsystems (4)

v4 of 5 Superseded Latest is v5 →

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#0 lore raw

v4 cover Add PMIC DT files for sc7280

Changes in V2:
- As per Matthias comments:
- I've Split the patch into per-PMIC patches and one sc7280 patch
- Removed 2nd critical point, thermal-governer property
- s/pm8325_tz/pm7325_temp_alarm and s/pm7325_temp_alarm/pm7325_thermal
- Fixed few other minor errors.

- As per Bjorn's comments, replaced '_' with '-' in node names and moved DT files inclusion to board dts.

Changes in V3:
- As per Matthias comments, changed commit text, modified critical interrupt node name like <name>-crit for all pmics.
- Moved pmk8350_vadc channel nodes to idp dts, as it is not guaranteed that a board with the pmk8350 will always have the other 3 PMICs

Changes in V4:
- PMR735A and PM8350C PMICS are used in sm8350 SoC. Added thermal_zones label for thermal-zones node to avoid compilation error while using the phandle in pmic dt files.
- As per Matthias comments:
- Changed commit text for pmk8350 pmic patch
- Moved the header files inclusion for the on die tempertures of PMICs from

    pmk8350 dt file to sc7280-idp dts
  - Changed commit text and made a dedicated patch to include pmic dt files
    for sc7280-idp

- Made separate patches for on die temp channel nodes and for adding thermal- zones node in sc7280 SoC dtsi

satya priya (8):
arm64: dts: qcom: sm8350: Add label for thermal-zones node
arm64: dts: qcom: sc7280: Add thermal-zones node
arm64: dts: qcom: pm7325: Add pm7325 base dts file
arm64: dts: qcom: pm8350c: Add temp-alarm support
arm64: dts: qcom: pmr735a: Add temp-alarm support
arm64: dts: qcom: pmk8350: Add peripherals for pmk8350
arm64: dts: qcom: sc7280: Include PMIC DT files for sc7280-idp
arm64: dts: qcom: sc7280: Add ADC channel nodes for PMIC temperatures

    to sc7280-idp
 arch/arm64/boot/dts/qcom/pm7325.dtsi    | 53 +++++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/pm8350c.dtsi   | 32 +++++++++++++++++++-
 arch/arm64/boot/dts/qcom/pmk8350.dtsi   | 51 ++++++++++++++++++++++++++++++-
 arch/arm64/boot/dts/qcom/pmr735a.dtsi   | 32 +++++++++++++++++++-
 arch/arm64/boot/dts/qcom/sc7280-idp.dts | 34 +++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi    |  3 ++
 arch/arm64/boot/dts/qcom/sm8350.dtsi    |  2 +-
 7 files changed, 203 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
#1 lore raw

PATCH RESEND v4 1/8 arm64: dts: qcom: sm8350: Add label for thermal-zones node

Add label "thermal_zones" for thermal-zones node.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/sm8350.dtsi +1 -1
index ed0b51b..47c6c0b 100644
@@ -1317,7 +1317,7 @@
 		};
 	};
 
-	thermal-zones {
+	thermal_zones: thermal-zones {
 		cpu0-thermal {
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
#2 lore raw

Re: [RESEND PATCH V4 1/8] arm64: dts: qcom: sm8350: Add label for thermal-zones node

Quoted 16 lines · satya priya

Add label "thermal_zones" for thermal-zones node.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/sm8350.dtsi +0 -0
index ed0b51b..47c6c0b 100644

arch/arm64/boot/dts/qcom/sm8350.dtsi line 1320

Quoted 5 lines
arch/arm64/boot/dts/qcom/sm8350.dtsi +1 -1
@@ -1317,7 +1317,7 @@
 		};
 	};
 
-	thermal-zones {
+	thermal_zones: thermal-zones {

is this label used anywhere in this series? If not lets drop it

Quoted 6 lines
arch/arm64/boot/dts/qcom/sm8350.dtsi +0 -0
 		cpu0-thermal {
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
Signature · 1 line
~Vinod
#3 lore raw

Re: [RESEND PATCH V4 1/8] arm64: dts: qcom: sm8350: Add label for thermal-zones node

Quoted 20 lines · Vinod Koul
Quoted 19 lines · satya priya

Add label "thermal_zones" for thermal-zones node.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/sm8350.dtsi +0 -0
index ed0b51b..47c6c0b 100644
@@ -1317,7 +1317,7 @@
 		};
 	};
 
Quoted 5 lines

arch/arm64/boot/dts/qcom/sm8350.dtsi line 1320

Quoted 2 lines
arch/arm64/boot/dts/qcom/sm8350.dtsi +1 -1
-	thermal-zones {
+	thermal_zones: thermal-zones {

is this label used anywhere in this series? If not lets drop it

yes, it is used in pm8350c.dtsi, pmk8350.dtsi and pmr735a.dtsi files which are included in sm8350 board dts.

Quoted 6 lines
Quoted 6 lines
arch/arm64/boot/dts/qcom/sm8350.dtsi +0 -1
 		cpu0-thermal {
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
--

QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

#4 lore raw

PATCH RESEND v4 2/8 arm64: dts: qcom: sc7280: Add thermal-zones node

In reply to satya priya

Add thermal-zones node for SC7280 SoC.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
 1 file changed, 3 insertions(+)
arch/arm64/boot/dts/qcom/sc7280.dtsi +3 -0
index 2cc4785..2a7d488 100644
@@ -1125,4 +1125,7 @@
 			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
 			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
 	};
+
+	thermal_zones: thermal-zones {
+	};
 };
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
#5 lore raw

Re: [RESEND PATCH V4 2/8] arm64: dts: qcom: sc7280: Add thermal-zones node

Quoted 16 lines · satya priya

Add thermal-zones node for SC7280 SoC.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
 1 file changed, 3 insertions(+)
arch/arm64/boot/dts/qcom/sc7280.dtsi +0 -0
index 2cc4785..2a7d488 100644

arch/arm64/boot/dts/qcom/sc7280.dtsi line 1130

Quoted 6 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +3 -0
@@ -1125,4 +1125,7 @@
 			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
 			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
 	};
+
+	thermal_zones: thermal-zones {
+	};

Empty node..? what am i missing here...

Signature · 1 line
~Vinod
#6 lore raw

Re: [RESEND PATCH V4 2/8] arm64: dts: qcom: sc7280: Add thermal-zones node

Quoted 12 lines · Vinod Koul
Quoted 11 lines · satya priya

Add thermal-zones node for SC7280 SoC.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
 1 file changed, 3 insertions(+)
Quoted 13 lines

arch/arm64/boot/dts/qcom/sc7280.dtsi line 1130

Quoted 11 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +3 -0
index 2cc4785..2a7d488 100644
@@ -1125,4 +1125,7 @@
 			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
 			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
 	};
+
+	thermal_zones: thermal-zones {
+	};

Empty node..? what am i missing here...

The 'thermal-zones' node with the SoC thermal zones is usually created in the <soc>.dtsi, however it doesn't exist yet. The 'Add DT bindings and device tree nodes for TSENS in SC7280' series
(https://patchwork.kernel.org/project/linux-arm-msm/list/?series=478225)
is creating it, but the series hasn't landed yet.

The node is needed by other patches in this series that add non-SoC thermal zones. Hence either an empty node needs to be added (for now) or this series should 'officially' depend on the TSENS series mentioned above.

#7 lore raw

Re: [RESEND PATCH V4 2/8] arm64: dts: qcom: sc7280: Add thermal-zones node

Quoted 33 lines · Matthias Kaehlcke
Quoted 12 lines · Vinod Koul
Quoted 11 lines · satya priya

Add thermal-zones node for SC7280 SoC.

---
Changes in RESEND V4:
- No Changes.

  arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
  1 file changed, 3 insertions(+)
Quoted 13 lines

arch/arm64/boot/dts/qcom/sc7280.dtsi line 1130

Quoted 11 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +3 -0
index 2cc4785..2a7d488 100644
@@ -1125,4 +1125,7 @@
  			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
  			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
  	};
+
+	thermal_zones: thermal-zones {
+	};

Empty node..? what am i missing here...

The 'thermal-zones' node with the SoC thermal zones is usually created in the <soc>.dtsi, however it doesn't exist yet. The 'Add DT bindings and device tree nodes for TSENS in SC7280' series
(https://patchwork.kernel.org/project/linux-arm-msm/list/?series=478225)
is creating it, but the series hasn't landed yet.

Quoted 4 lines

The node is needed by other patches in this series that add non-SoC thermal zones. Hence either an empty node needs to be added (for now) or this series should 'officially' depend on the TSENS series mentioned above.

You can reference the TZ node as /thermal-zones/ even from non-SoC includes. See pm8150.dtsi for example.

Signature · 2 lines
With best wishes
Dmitry
#8 lore raw

Re: [RESEND PATCH V4 2/8] arm64: dts: qcom: sc7280: Add thermal-zones node

In reply to Matthias Kaehlcke

Hi Matthias,

Quoted 33 lines · Matthias Kaehlcke
Quoted 12 lines · Vinod Koul
Quoted 11 lines · satya priya

Add thermal-zones node for SC7280 SoC.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
 1 file changed, 3 insertions(+)
Quoted 13 lines

arch/arm64/boot/dts/qcom/sc7280.dtsi line 1130

Quoted 11 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +3 -0
index 2cc4785..2a7d488 100644
@@ -1125,4 +1125,7 @@
 			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
 			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
 	};
+
+	thermal_zones: thermal-zones {
+	};

Empty node..? what am i missing here...

The 'thermal-zones' node with the SoC thermal zones is usually created in the <soc>.dtsi, however it doesn't exist yet. The 'Add DT bindings and device tree nodes for TSENS in SC7280' series
(https://patchwork.kernel.org/project/linux-arm-msm/list/?series=478225)
is creating it, but the series hasn't landed yet.

Quoted 4 lines

The node is needed by other patches in this series that add non-SoC thermal zones. Hence either an empty node needs to be added (for now) or this series should 'officially' depend on the TSENS series mentioned above.

I will add the dependency in cover letter and drop this patch.

Thanks,
Satya Priya

#9 lore raw

PATCH RESEND v4 3/8 arm64: dts: qcom: pm7325: Add pm7325 base dts file

In reply to satya priya

Add base DTS file for pm7325 along with GPIOs and temp-alarm nodes.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +53 -0
new file mode 100644
index 0000000..e7f64a9
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2021, The Linux Foundation. All rights reserved.
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pm7325: pmic@1 {
+		compatible = "qcom,pm7325", "qcom,spmi-pmic";
+		reg = <0x1 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pm7325_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
+			interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
+
+		pm7325_gpios: gpios@8800 {
+			compatible = "qcom,pm7325-gpio", "qcom,spmi-gpio";
+			reg = <0x8800>;
+			gpio-controller;
+			gpio-ranges = <&pm7325_gpios 0 0 10>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+};
+
+&thermal_zones {
+	pm7325_thermal: pm7325-thermal {
+		polling-delay-passive = <100>;
+		polling-delay = <0>;
+		thermal-sensors = <&pm7325_temp_alarm>;
+
+		trips {
+			pm7325_trip0: trip0 {
+				temperature = <95000>;
+				hysteresis = <0>;
+				type = "passive";
+			};
+
+			pm7325_crit: pm7325-crit {
+				temperature = <115000>;
+				hysteresis = <0>;
+				type = "critical";
+			};
+		};
+	};
+};
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
#10 lore raw

Re: [RESEND PATCH V4 3/8] arm64: dts: qcom: pm7325: Add pm7325 base dts file

Quoted 18 lines · satya priya

Add base DTS file for pm7325 along with GPIOs and temp-alarm nodes.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +0 -0
new file mode 100644
index 0000000..e7f64a9

arch/arm64/boot/dts/qcom/pm7325.dtsi line 9

Quoted 9 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +9 -0
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2021, The Linux Foundation. All rights reserved.
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pm7325: pmic@1 {
+		compatible = "qcom,pm7325", "qcom,spmi-pmic";

where is qcom,pm7325 documented?

arch/arm64/boot/dts/qcom/pm7325.dtsi line 22

Quoted 13 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +13 -0
+		reg = <0x1 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pm7325_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
+			interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
+
+		pm7325_gpios: gpios@8800 {
+			compatible = "qcom,pm7325-gpio", "qcom,spmi-gpio";

where is qcom,pm7325-gpio documented?

Quoted 9 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +9 -0
+			reg = <0x8800>;
+			gpio-controller;
+			gpio-ranges = <&pm7325_gpios 0 0 10>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+};
Signature · 1 line
~Vinod
#11 lore raw

Re: [RESEND PATCH V4 3/8] arm64: dts: qcom: pm7325: Add pm7325 base dts file

Quoted 22 lines · Vinod Koul
Quoted 21 lines · satya priya

Add base DTS file for pm7325 along with GPIOs and temp-alarm nodes.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +3 -0
new file mode 100644
index 0000000..e7f64a9
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2021, The Linux Foundation. All rights reserved.
+
Quoted 8 lines

arch/arm64/boot/dts/qcom/pm7325.dtsi line 9

Quoted 6 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +6 -0
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pm7325: pmic@1 {
+		compatible = "qcom,pm7325", "qcom,spmi-pmic";

where is qcom,pm7325 documented?

good point, I missed that one.

Quoted 7 lines
Quoted 7 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +7 -0
+		reg = <0x1 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pm7325_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
Quoted 8 lines

arch/arm64/boot/dts/qcom/pm7325.dtsi line 22

Quoted 6 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +6 -0
+			interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
+
+		pm7325_gpios: gpios@8800 {
+			compatible = "qcom,pm7325-gpio", "qcom,spmi-gpio";

where is qcom,pm7325-gpio documented?

It's added by the 'Add GPIO support for PM7325' series
(https://patchwork.kernel.org/project/linux-arm-msm/list/?series=481133)

The binding change was acked by Rob and the code by Bjorn, so it can be expected to land, but it would still be good to mention the dependency explicitly.

#12 lore raw

Re: [RESEND PATCH V4 3/8] arm64: dts: qcom: pm7325: Add pm7325 base dts file

Quoted 33 lines · Matthias Kaehlcke
Quoted 22 lines · Vinod Koul
Quoted 21 lines · satya priya

Add base DTS file for pm7325 along with GPIOs and temp-alarm nodes.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +3 -0
new file mode 100644
index 0000000..e7f64a9
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2021, The Linux Foundation. All rights reserved.
+
Quoted 8 lines

arch/arm64/boot/dts/qcom/pm7325.dtsi line 9

Quoted 6 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +6 -0
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pm7325: pmic@1 {
+		compatible = "qcom,pm7325", "qcom,spmi-pmic";

where is qcom,pm7325 documented?

Quoted 2 lines

good point, I missed that one.

Actually this point was discussed during V2( https://lore.kernel.org/patchwork/patch/1406186/#1607321 ).
As far as I understand it is not mandatory to add "qcom,pm7325" as we are adding "qcom,spmi-pmic". It is just a good to have change. I could not find the documentation for pm8350c, pmk8350 and pmr735a as well.

Quoted 16 lines
Quoted 7 lines
Quoted 7 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +7 -0
+		reg = <0x1 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pm7325_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
Quoted 8 lines

arch/arm64/boot/dts/qcom/pm7325.dtsi line 22

Quoted 6 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +6 -0
+			interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
+
+		pm7325_gpios: gpios@8800 {
+			compatible = "qcom,pm7325-gpio", "qcom,spmi-gpio";

where is qcom,pm7325-gpio documented?

Quoted 6 lines

It's added by the 'Add GPIO support for PM7325' series
(https://patchwork.kernel.org/project/linux-arm-msm/list/?series=481133)

The binding change was acked by Rob and the code by Bjorn, so it can be expected to land, but it would still be good to mention the dependency explicitly.

The binding patch is applied now.

Thanks,
Satya Priya

#13 lore raw

Re: [RESEND PATCH V4 3/8] arm64: dts: qcom: pm7325: Add pm7325 base dts file

Quoted 34 lines · On 20-05-21, 12:02, [email protected] wrote:
Quoted 33 lines · Matthias Kaehlcke
Quoted 30 lines · Vinod Koul
Quoted 18 lines · satya priya

Add base DTS file for pm7325 along with GPIOs and temp-alarm nodes.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +0 -0
new file mode 100644
index 0000000..e7f64a9

arch/arm64/boot/dts/qcom/pm7325.dtsi line 9

Quoted 9 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +9 -0
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2021, The Linux Foundation. All rights reserved.
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pm7325: pmic@1 {
+		compatible = "qcom,pm7325", "qcom,spmi-pmic";

where is qcom,pm7325 documented?

Quoted 8 lines
Quoted 2 lines

good point, I missed that one.

Actually this point was discussed during V2(
https://lore.kernel.org/patchwork/patch/1406186/#1607321 ).
As far as I understand it is not mandatory to add "qcom,pm7325" as we are adding "qcom,spmi-pmic". It is just a good to have change.
I could not find the documentation for pm8350c, pmk8350 and pmr735a as well.

Yes that is a miss too, IMO all of these should be added to Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt or the yaml file replacing this

Thanks

Signature · 1 line
~Vinod
#14 lore raw

Re: [RESEND PATCH V4 3/8] arm64: dts: qcom: pm7325: Add pm7325 base dts file

Quoted 44 lines · Vinod Koul
Quoted 34 lines · On 20-05-21, 12:02, [email protected] wrote:
Quoted 33 lines · Matthias Kaehlcke
Quoted 30 lines · Vinod Koul
Quoted 18 lines · satya priya

Add base DTS file for pm7325 along with GPIOs and temp-alarm nodes.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +0 -0
new file mode 100644
index 0000000..e7f64a9

arch/arm64/boot/dts/qcom/pm7325.dtsi line 9

Quoted 9 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +9 -0
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2021, The Linux Foundation. All rights reserved.
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pm7325: pmic@1 {
+		compatible = "qcom,pm7325", "qcom,spmi-pmic";

where is qcom,pm7325 documented?

Quoted 8 lines
Quoted 2 lines

good point, I missed that one.

Actually this point was discussed during V2(
https://lore.kernel.org/patchwork/patch/1406186/#1607321 ).
As far as I understand it is not mandatory to add "qcom,pm7325" as we are adding "qcom,spmi-pmic". It is just a good to have change.
I could not find the documentation for pm8350c, pmk8350 and pmr735a as well.

Quoted 4 lines

Yes that is a miss too, IMO all of these should be added to Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt or the yaml file replacing this

Okay, will add those four pmics to qcom,spmi-pmic.txt.

Quoted 1 line

Thanks

#15 lore raw

PATCH RESEND v4 4/8 arm64: dts: qcom: pm8350c: Add temp-alarm support

In reply to satya priya

Add temp-alarm node for PM8350C pmic and also modify gpio node to add gpio ranges and "qcom,spmi-gpio" compatible.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pm8350c.dtsi | 32 +++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/pm8350c.dtsi +31 -1
index 2b9b75e..e1b75ae 100644
@@ -13,13 +13,43 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
+		pm8350c_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
+			interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
+
 		pm8350c_gpios: gpio@8800 {
-			compatible = "qcom,pm8350c-gpio";
+			compatible = "qcom,pm8350c-gpio", "qcom,spmi-gpio";
 			reg = <0x8800>;
 			gpio-controller;
+			gpio-ranges = <&pm8350c_gpios 0 0 9>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 };
+
+&thermal_zones {
+	pm8350c_thermal: pm8350c-thermal {
+		polling-delay-passive = <100>;
+		polling-delay = <0>;
+		thermal-sensors = <&pm8350c_temp_alarm>;
+
+		trips {
+			pm8350c_trip0: trip0 {
+				temperature = <95000>;
+				hysteresis = <0>;
+				type = "passive";
+			};
+
+			pm8350c_crit: pm8350c-crit {
+				temperature = <115000>;
+				hysteresis = <0>;
+				type = "critical";
+			};
+		};
+	};
+};
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
#16 lore raw

Re: [RESEND PATCH V4 4/8] arm64: dts: qcom: pm8350c: Add temp-alarm support

Quoted 2 lines · satya priya

Add temp-alarm node for PM8350C pmic and also modify gpio node to add gpio ranges and "qcom,spmi-gpio" compatible.

These should be two patches explaining why things are done like that

Quoted 18 lines

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pm8350c.dtsi | 32 +++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/pm8350c.dtsi +0 -0
index 2b9b75e..e1b75ae 100644
@@ -13,13 +13,43 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 

arch/arm64/boot/dts/qcom/pm8350c.dtsi line 24

Quoted 10 lines
arch/arm64/boot/dts/qcom/pm8350c.dtsi +8 -1
+		pm8350c_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
+			interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
+
 		pm8350c_gpios: gpio@8800 {
-			compatible = "qcom,pm8350c-gpio";
+			compatible = "qcom,pm8350c-gpio", "qcom,spmi-gpio";

why is this changed?

Quoted 34 lines
arch/arm64/boot/dts/qcom/pm8350c.dtsi +23 -0
 			reg = <0x8800>;
 			gpio-controller;
+			gpio-ranges = <&pm8350c_gpios 0 0 9>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 };
+
+&thermal_zones {
+	pm8350c_thermal: pm8350c-thermal {
+		polling-delay-passive = <100>;
+		polling-delay = <0>;
+		thermal-sensors = <&pm8350c_temp_alarm>;
+
+		trips {
+			pm8350c_trip0: trip0 {
+				temperature = <95000>;
+				hysteresis = <0>;
+				type = "passive";
+			};
+
+			pm8350c_crit: pm8350c-crit {
+				temperature = <115000>;
+				hysteresis = <0>;
+				type = "critical";
+			};
+		};
+	};
+};
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
Signature · 1 line
~Vinod
#17 lore raw

Re: [RESEND PATCH V4 4/8] arm64: dts: qcom: pm8350c: Add temp-alarm support

Quoted 6 lines · Vinod Koul
Quoted 2 lines · satya priya

Add temp-alarm node for PM8350C pmic and also modify gpio node to add gpio ranges and "qcom,spmi-gpio" compatible.

These should be two patches explaining why things are done like that

Okay, will split them.

Quoted 19 lines
Quoted 19 lines

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pm8350c.dtsi | 32 
+++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/pm8350c.dtsi +0 -0
index 2b9b75e..e1b75ae 100644
@@ -13,13 +13,43 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
Quoted 12 lines

arch/arm64/boot/dts/qcom/pm8350c.dtsi line 24

Quoted 10 lines
arch/arm64/boot/dts/qcom/pm8350c.dtsi +8 -1
+		pm8350c_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
+			interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
+
 		pm8350c_gpios: gpio@8800 {
-			compatible = "qcom,pm8350c-gpio";
+			compatible = "qcom,pm8350c-gpio", "qcom,spmi-gpio";

why is this changed?

As per the Documentation[1], either "qcom,spmi-gpio" or "qcom,ssbi-gpio" must be added based on whether the device is on an spmi bus or an ssbi bus respectively.

[1] https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pinctrl/qcom%2Cpmic-gpio.txt#L41

Quoted 35 lines
Quoted 35 lines
arch/arm64/boot/dts/qcom/pm8350c.dtsi +23 -1
 			reg = <0x8800>;
 			gpio-controller;
+			gpio-ranges = <&pm8350c_gpios 0 0 9>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 };
+
+&thermal_zones {
+	pm8350c_thermal: pm8350c-thermal {
+		polling-delay-passive = <100>;
+		polling-delay = <0>;
+		thermal-sensors = <&pm8350c_temp_alarm>;
+
+		trips {
+			pm8350c_trip0: trip0 {
+				temperature = <95000>;
+				hysteresis = <0>;
+				type = "passive";
+			};
+
+			pm8350c_crit: pm8350c-crit {
+				temperature = <115000>;
+				hysteresis = <0>;
+				type = "critical";
+			};
+		};
+	};
+};
--

QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

#18 lore raw

PATCH RESEND v4 5/8 arm64: dts: qcom: pmr735a: Add temp-alarm support

In reply to satya priya

Add temp-alarm node for PMR735A pmic and also modify gpio node to add gpio ranges and "qcom,spmi-gpio" compatible.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pmr735a.dtsi | 32 +++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/pmr735a.dtsi +31 -1
index 1c675af1..b4b6ba24 100644
@@ -13,13 +13,43 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
+		pmr735a_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
+			interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
+
 		pmr735a_gpios: gpio@8800 {
-			compatible = "qcom,pmr735a-gpio";
+			compatible = "qcom,pmr735a-gpio", "qcom,spmi-gpio";
 			reg = <0x8800>;
 			gpio-controller;
+			gpio-ranges = <&pmr735a_gpios 0 0 4>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 };
+
+&thermal_zones {
+	pmr735a_thermal: pmr735a-thermal {
+		polling-delay-passive = <100>;
+		polling-delay = <0>;
+		thermal-sensors = <&pmr735a_temp_alarm>;
+
+		trips {
+			pmr735a_trip0: trip0 {
+				temperature = <95000>;
+				hysteresis = <0>;
+				type = "passive";
+			};
+
+			pmr735a_crit: pmr735a-crit {
+				temperature = <115000>;
+				hysteresis = <0>;
+				type = "critical";
+			};
+		};
+	};
+};
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
#19 lore raw

PATCH RESEND v4 6/8 arm64: dts: qcom: pmk8350: Add peripherals for pmk8350

In reply to satya priya

Add PON, RTC, VADC and ACD_TM support for PMK8350.

---
Changes in RESEND V4:
- No Changes.

 arch/arm64/boot/dts/qcom/pmk8350.dtsi | 51 ++++++++++++++++++++++++++++++++++-
 1 file changed, 50 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/pmk8350.dtsi +50 -1
index 1530b8f..04fc263 100644
@@ -3,6 +3,8 @@
  * Copyright (c) 2021, Linaro Limited
  */
 
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/spmi/spmi.h>
 
@@ -13,10 +15,57 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
+		pmk8350_pon: pon@1300 {
+			compatible = "qcom,pm8998-pon";
+			reg = <0x1300>;
+
+			pwrkey {
+				compatible = "qcom,pmk8350-pwrkey";
+				interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
+				linux,code = <KEY_POWER>;
+			};
+
+			resin {
+				compatible = "qcom,pmk8350-resin";
+				interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
+				linux,code = <KEY_VOLUMEDOWN>;
+			};
+		};
+
+		pmk8350_vadc: adc@3100 {
+			compatible = "qcom,spmi-adc7";
+			reg = <0x3100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "eoc-int-en-set";
+			#io-channel-cells = <1>;
+			io-channel-ranges;
+		};
+
+		pmk8350_adc_tm: adc-tm@3400 {
+			compatible = "qcom,adc-tm7";
+			reg = <0x3400>;
+			interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "threshold";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#thermal-sensor-cells = <1>;
+			status = "disabled";
+		};
+
+		pmk8350_rtc: rtc@6100 {
+			compatible = "qcom,pmk8350-rtc";
+			reg = <0x6100>, <0x6200>;
+			reg-names = "rtc", "alarm";
+			interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
+		};
+
 		pmk8350_gpios: gpio@b000 {
-			compatible = "qcom,pmk8350-gpio";
+			compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio";
 			reg = <0xb000>;
 			gpio-controller;
+			gpio-ranges = <&pmk8350_gpios 0 0 4>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
#20 lore raw

PATCH RESEND v4 7/8 arm64: dts: qcom: sc7280: Include PMIC DT files for sc7280-idp

In reply to satya priya

The sc7280-idp has four PMICs, include their .dtsi files.

---
Changes in RESEND V4:
- As per Matthias comments moved this patch before 'Add ADC channel nodes for PMIC temperatures to sc7280-idp'

 arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm64/boot/dts/qcom/sc7280-idp.dts +4 -0
index 54d2cb3..f295580 100644
@@ -8,6 +8,10 @@
 /dts-v1/;
 
 #include "sc7280.dtsi"
+#include "pm7325.dtsi"
+#include "pmr735a.dtsi"
+#include "pm8350c.dtsi"
+#include "pmk8350.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. sc7280 IDP platform";
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
#21 lore raw

PATCH RESEND v4 8/8 arm64: dts: qcom: sc7280: Add ADC channel nodes for PMIC temperatures to sc7280-idp

In reply to satya priya

Add channel nodes for the on die temperatures of PMICS pmk8350, pm8350, pmr735a and pmr735b.

---
Changes in RESEND V4:
- As per Matthias comments, changed the commit text.

 arch/arm64/boot/dts/qcom/sc7280-idp.dts | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
arch/arm64/boot/dts/qcom/sc7280-idp.dts +30 -0
index f295580..704fb9a 100644
@@ -7,6 +7,10 @@
 
 /dts-v1/;
 
+#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
+#include <dt-bindings/iio/qcom,spmi-adc7-pmr735b.h>
+#include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
+#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
 #include "sc7280.dtsi"
 #include "pm7325.dtsi"
 #include "pmr735a.dtsi"
@@ -238,6 +242,32 @@
 	};
 };
 
+&pmk8350_vadc {
+		pm8350_die_temp {
+			reg = <PM8350_ADC7_DIE_TEMP>;
+			label = "pm8350_die_temp";
+			qcom,pre-scaling = <1 1>;
+		};
+
+		pmk8350_die_temp {
+			reg = <PMK8350_ADC7_DIE_TEMP>;
+			label = "pmk8350_die_temp";
+			qcom,pre-scaling = <1 1>;
+		};
+
+		pmr735a_die_temp {
+			reg = <PMR735A_ADC7_DIE_TEMP>;
+			label = "pmr735a_die_temp";
+			qcom,pre-scaling = <1 1>;
+		};
+
+		pmr735b_die_temp {
+			reg = <PMR735B_ADC7_DIE_TEMP>;
+			label = "pmr735b_die_temp";
+			qcom,pre-scaling = <1 1>;
+		};
+};
+
 &qupv3_id_0 {
 	status = "okay";
 };
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation