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Krait L1/L2 EDAC driver

Stephen Boyd linux-arm-kernel linux-arm-msm linux-devicetree lkml 6 versions – In review

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Versions newest first · linked by author and title

  1. v6 Latest5 patches 14 repliesIn review
  2. v54 patches 17 repliesSuperseded
  3. v46 patches 15 repliesApplied
Earlier versions · 3
VersionPostedPatchesRepliesStatus
v36 patches0 repliesSuperseded
v26 patches8 repliesSuperseded
v16 patches17 repliesSuperseded

Changes in v6 from the cover letter

* Don't rely on platform device being created from cpus node
* Get interrupts from L1 cache node
* Rework binding to be in cache document

Patches in v6 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/5genirq: export percpu irq functions for module usagekernel/irq/manage.c+2 -00 replies
2/5ARM: Add Krait L2 register accessor functionsarch/arm/common/Kconfig arch/arm/common/Makefile arch/arm/common/krait-l2-accessors.c +1 more+82 -07 replies
3/5devicetree: bindings: Document Krait cache error interruptsDocumentation/devicetree/bindings/arm/cache.txt+47 -14 replies
4/5edac: Add support for Krait CPU cache error detectiondrivers/edac/Kconfig drivers/edac/Makefile drivers/edac/krait_edac.c+380 -03 replies
5/5ARM: dts: msm: Fix Krait CPU/L2 nodesarch/arm/boot/dts/qcom-msm8960.dtsi arch/arm/boot/dts/qcom-msm8974.dtsi+57 -210 replies

Reviews trailers per patch

1 of 5 patches has a Reviewed-by or Acked-by.

PatchThomas Gleixner
1/5A-b
2/5
3/5
4/5
5/5

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v6 thread

Cover letter [PATCH v6 0/5] Krait L1/L2 EDAC driver

This patchset adds support for the Krait L1/L2 cache error detection hardware. The second patch adds the Krait L2 indirection register code. This patch is in need of an ACK from ARM folks. The next two patches add the driver and the binding and the final patch fixes up the DT nodes to match the binding (this last one should go through the arm-soc tree).

NOTE: the DT binding patches rely on Lorenzo's cache DT binding document[1]

Changes since v5:
* Don't rely on platform device being created from cpus node
* Get interrupts from L1 cache node
* Rework binding to be in cache document

Changes since v4:
* Prefixed l2 accessors functions with krait_
* Dropped first two patches as Boris says he picked them up

Changes since v3:
* Fixed l1_irq handler to properly dereference dev_id

Changes since v2:
* Picked up acks
* s/an/a/ in DT binding

Stephen Boyd (5):
genirq: export percpu irq functions for module usage
ARM: Add Krait L2 register accessor functions
devicetree: bindings: Document Krait cache error interrupts
edac: Add support for Krait CPU cache error detection
ARM: dts: msm: Fix Krait CPU/L2 nodes

 Documentation/devicetree/bindings/arm/cache.txt |  48 ++-
 arch/arm/boot/dts/qcom-msm8960.dtsi             |  29 +-
 arch/arm/boot/dts/qcom-msm8974.dtsi             |  49 +++-
 arch/arm/common/Kconfig                         |   3 +
 arch/arm/common/Makefile                        |   1 +
 arch/arm/common/krait-l2-accessors.c            |  58 ++++
 arch/arm/include/asm/krait-l2-accessors.h       |  20 ++
 drivers/edac/Kconfig                            |   8 +
 drivers/edac/Makefile                           |   2 +
 drivers/edac/krait_edac.c                       | 370 ++++++++++++++++++++++++
 kernel/irq/manage.c                             |   2 +
 11 files changed, 568 insertions(+), 22 deletions(-)
 create mode 100644 arch/arm/common/krait-l2-accessors.c
 create mode 100644 arch/arm/include/asm/krait-l2-accessors.h
 create mode 100644 drivers/edac/krait_edac.c

[1] http://www.spinics.net/lists/arm-kernel/msg308540.html

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