Fix H-PLL and M-PLL clock rate calculation in ast2500 clock driver
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b4 am [email protected]Versions newest first
- v1 Latest1 patch 0 repliesNew
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/1 | aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculationdrivers/ | +2 | 2 replies |
Reviews trailers per patch
The patch has a Reviewed-by or Acked-by.
| Patch | Simon Glass |
|---|---|
| 1/1 | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [U-Boot] [PATCH 0/1] Fix H-PLL and M-PLL clock rate calculation in ast2500 clock driver
This is a fix to a very dumb (division by zero) mistake I made in the series where I added support for ast2500 eval board. It is not causing any problems for that board yet, because no driver requests the rate of any clock yet, but I think it's still better to fix it for this release.
Maxim Sloyko (1):
aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation
drivers/clk/aspeed/clk_ast2500.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Signature · 1 line
2.11.0.483.g087da7b7c-goog