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ppc: support for the XIVE interrupt controller (POWER9)

Cédric Le Goater qemu-devel 7 versions – Applied

Status from this message: Applied, and folded into "spapr: add hcalls support for the XIVE

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Versions newest first · linked by author and title

  1. v9 Latest7 patches 7 repliesApplied
  2. v812 patches 17 repliesSuperseded
  3. v719 patches 41 repliesApplied
Earlier versions · 4
VersionPostedPatchesRepliesStatus
v637 patches27 repliesSuperseded
v536 patches147 repliesSuperseded
v428 patches0 repliesSuperseded
v335 patches63 repliesSuperseded

Changes in v9 from the cover letter

- fixed compile breakage on windows
- reworked XIVE capability in ibm,arch-vec-5-platform-support
- fixed default CPU type on 3.1 machines
- updated MAINTAINERS file

* GitHub trees

Patches in v9 Applied

#Subject and filesSizeRepliesApplied
1/7target/ppc: fix the PPC_BIT definitionstarget/ppc/cpu.h+3 -31 reply
2/7target/ppc: replace __builtin_ffssl() by the equivalent ctz routinestarget/ppc/cpu.h+9 -63 replies
3/7spapr/xive: fix compilation breakage on windowshw/intc/spapr_xive.c+28 -181 reply
4/7spapr: add an extra OV5 field to the sPAPR IRQ backendhw/ppc/spapr.c hw/ppc/spapr_irq.c include/hw/ppc/spapr.h +1 more+36 -70 replies
5/7spapr: introduce an 'ic-mode' machine optionhw/ppc/spapr.c hw/ppc/spapr_cpu_core.c hw/ppc/spapr_irq.c +1 more+55 -330 replies
6/7spapr: change default CPU type to POWER9hw/ppc/spapr.c+2 -11 reply
7/7MAINTAINERS: PPC: add a XIVE sectionMAINTAINERS+8 -00 replies

Reviews trailers per patch

1 of 7 patches has a Reviewed-by or Acked-by.

PatchDavid Gibson
1/7
2/7
3/7
4/7
5/7R-b
6/7
7/7

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v9 thread

Cover letter [Qemu-devel] [PATCH v9 0/7] ppc: support for the XIVE interrupt controller (POWER9)

Hello,

Here is the version 9 of the QEMU models adding support for the XIVE interrupt controller to the sPAPR machine, under TCG only.

The 'dual' machine, supporting both interrupt modes, is nearly complete, only remains the question on the qirq array, which will be addressed in early 2019 with the support for KVM.

Thanks,

C.

Changes in v9 (sPAPR only) :

- fixed compile breakage on windows
- reworked XIVE capability in ibm,arch-vec-5-platform-support
- fixed default CPU type on 3.1 machines
- updated MAINTAINERS file

* GitHub trees

QEMU sPAPR:

https://github.com/legoater/qemu/commits/xive-v9-4.0

QEMU PowerNV:

https://github.com/legoater/qemu/commits/powernv-3.1

Linux/KVM:

https://github.com/legoater/linux/commits/xive-4.20

OPAL:

https://github.com/legoater/skiboot/commits/xive

Cédric Le Goater (7):
target/ppc: fix the PPC_BIT definitions
target/ppc: replace __builtin_ffssl() by the equivalent ctz routines spapr/xive: fix compilation breakage on windows
spapr: add an extra OV5 field to the sPAPR IRQ backend
spapr: introduce an 'ic-mode' machine option
spapr: change default CPU type to POWER9
MAINTAINERS: PPC: add a XIVE section

 include/hw/ppc/spapr.h     |  7 ++++
 include/hw/ppc/spapr_irq.h |  1 +
 target/ppc/cpu.h           | 21 +++++-----
 hw/intc/spapr_xive.c       | 46 +++++++++++++---------
 hw/ppc/spapr.c             | 80 ++++++++++++++++++++++++++++++++------
 hw/ppc/spapr_cpu_core.c    |  3 +-
 hw/ppc/spapr_irq.c         | 37 +++++++-----------
 MAINTAINERS                |  8 ++++
 8 files changed, 138 insertions(+), 65 deletions(-)
Signature · 1 line
2.17.2

Read the cover letter in its thread