clocksource/arm_arch_timer: Add basic ARMv8.6 support
Status from this message: The following commit has been merged into the timers/core branch of tip:
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v4 Latest17 patches 1 replyApplied
- v317 patches 14 repliesSuperseded
- v216 patches 3 repliesSuperseded
Earlier versions · 1
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v1 | 13 patches | 25 replies | Superseded |
Patches in v4 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/17 | clocksource/arm_arch_timer: Add build-time guards for unhandled register accessesarch/ arch/ drivers/ | +32 | 0 replies | |
| 2/17 | clocksource/arm_arch_timer: Drop CNT*_TVAL read accessorsarch/ arch/ drivers/ | +0 | 0 replies | |
| 3/17 | clocksource/arm_arch_timer: Extend write side of timer register accessors to u64arch/ arch/ drivers/ | +11 | 0 replies | |
| 4/17 | clocksource/arm_arch_timer: Move system register timer programming over to CVALarch/ arch/ drivers/ +1 more | +33 | 0 replies | |
| 5/17 | clocksource/arm_arch_timer: Move drop _tval from erratum function namesdrivers/ | +13 | 0 replies | |
| 6/17 | clocksource/arm_arch_timer: Fix MMIO base address vs callback ordering issuedrivers/ | +13 | 0 replies | |
| 7/17 | clocksource/arm_arch_timer: Move MMIO timer programming over to CVALarch/ drivers/ | +39 | 0 replies | |
| 8/17 | clocksource/arm_arch_timer: Advertise 56bit timer to the core codedrivers/ | +1 | 0 replies | |
| 9/17 | clocksource/arm_arch_timer: Work around broken CVAL implementationsdrivers/ | +27 | 0 replies | |
| 10/17 | clocksource/arm_arch_timer: Remove any trace of the TVAL programming interfacedrivers/ include/ | +0 | 0 replies | |
| 11/17 | clocksource/arm_arch_timer: Drop unnecessary ISB on CVAL programmingarch/ arch/ | +4 | 0 replies | |
| 12/17 | clocksource/arm_arch_timer: Fix masking for high freq countersdrivers/ | +29 | 0 replies | |
| 13/17 | clocksource/arch_arm_timer: Move workaround synchronisation aroundarch/ | +3 | 0 replies | |
| 14/17 | arm64: Add a capability for FEAT_ECVarch/ arch/ | +11 | 0 replies | |
| 15/17 | arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0arch/ arch/ | +27 | 0 replies | |
| 16/17 | arm64: Add handling of CNTVCTSS trapsarch/ arch/ | +17 | 0 replies | |
| 17/17 | arm64: Add HWCAP for self-synchronising virtual counterDocumentation/ Documentation/ arch/ +3 more | +19 | 0 replies |
Reviews trailers per patch
9 of 17 patches have a Reviewed-by or Acked-by.
| Patch | Oliver Upton | Mark Rutland | Will Deacon | Linus Walleij |
|---|---|---|---|---|
| 1/17 | ||||
| 2/17 | R-b | R-b T-b | ||
| 3/17 | R-b | R-b T-b | ||
| 4/17 | R-b | R-b T-b | ||
| 5/17 | R-b | R-b T-b | ||
| 6/17 | R-b | R-b | ||
| 7/17 | ||||
| 8/17 | ||||
| 9/17 | ||||
| 10/17 | ||||
| 11/17 | ||||
| 12/17 | R-b | |||
| 13/17 | ||||
| 14/17 | R-b | A-b | ||
| 15/17 | ||||
| 16/17 | A-b | |||
| 17/17 | A-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 4 reviewers.
Cover letter [PATCH v4 00/17] clocksource/arm_arch_timer: Add basic ARMv8.6 support
This is v4 (final?) of the series enabling ARMv8.6 support for timer subsystem, and was prompted by a discussion with Oliver around the fact that an ARMv8.6 implementation must have a 1GHz counter, which leads to a number of things to break in the timer code:
- the counter rollover can come pretty quickly as we only advertise a 56bit counter,
- the maximum timer delta can be remarkably small, as we use the countdown interface which is limited to 32bit...
Thankfully, there is a way out: we can compute the minimal width of the counter based on the guarantees that the architecture gives us, and we can use the 64bit comparator interface instead of the countdown to program the timer.
Finally, we start making use of the ARMv8.6 ECV features by switching accesses to the counters to a self-synchronising register, removing the need for an ISB. Hopefully, implementations will *not* just stick an invisible ISB there...
A side effect of the switch to CVAL is that XGene-1 breaks. I have added a workaround to keep it alive.
I have added Oliver's original patch[0] to the series and tweaked a couple of things. Blame me if I broke anything.
The whole things has been tested on Juno (sysreg + MMIO timers), XGene-1 (broken sysreg timers), FVP (FEAT_ECV, CNT*CTSS_EL0).
To ease merging, and after discussion with Daniel, I have created two tags from which the patches can be pulled fromgit://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git :
- clocksource-timers-arm64-8.6 has the first 13 patches, which can go into Daniel's tree, and ultimately tip
- arm64-timers-8.6 has the full series, which can be pulled into the arm64 tree
Alternatively, Will and Daniel can synchronise independently to build a branch of their own.
* From v3 [3]:
- Drop the %x0 qualifiers for the registers in the asm accessors
- Added an update to cpu-feature-registers.rst
- Collected Acks, with thanks.
* From v2 [2]:
- New patch adding a HWCAP (ECV) allowing userspace to probe for the presence of CNTVSS_EL0.
* From v1 [1]:
- New patch adding a bunch of BUILD_BUG()s for register accesses we don't expect. This makes subsequent patches much simpler.
- New patch moving the ISBs for workaround in a way that makes more sense for the self-synchronising accessors.
- Rework the XGene-1 workaround to rely solely on MIDR.
- Split the CNTVCTSS trap handling in its own patch.
- Rebased on 5.15-rc2
- Collected RBs, with thanks.
[0] https://lore.kernel.org/r/[email protected]
[1] https://lore.kernel.org/r/[email protected]
[2] https://lore.kernel.org/r/[email protected]
[3] https://lore.kernel.org/r/[email protected]
Marc Zyngier (16):
clocksource/arm_arch_timer: Add build-time guards for unhandled
register accesses
clocksource/arm_arch_timer: Drop CNT*_TVAL read accessors clocksource/arm_arch_timer: Extend write side of timer register
accessors to u64
clocksource/arm_arch_timer: Move system register timer programming
over to CVAL
clocksource/arm_arch_timer: Move drop _tval from erratum function
names
clocksource/arm_arch_timer: Fix MMIO base address vs callback ordering
issue
clocksource/arm_arch_timer: Move MMIO timer programming over to CVAL clocksource/arm_arch_timer: Advertise 56bit timer to the core code clocksource/arm_arch_timer: Work around broken CVAL implementations clocksource/arm_arch_timer: Remove any trace of the TVAL programming
interface
clocksource/arm_arch_timer: Drop unnecessary ISB on CVAL programming clocksource/arch_arm_timer: Move workaround synchronisation around
arm64: Add a capability for FEAT_ECV
arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0
arm64: Add handling of CNTVCTSS traps
arm64: Add HWCAP for self-synchronising virtual counter
Oliver Upton (1):
clocksource/arm_arch_timer: Fix masking for high freq counters
Documentation/arm64/cpu-feature-registers.rst | 12 +- Documentation/arm64/elf_hwcaps.rst | 4 + arch/arm/include/asm/arch_timer.h | 37 +-- arch/arm64/include/asm/arch_timer.h | 78 +++--- arch/arm64/include/asm/esr.h | 6 + arch/arm64/include/asm/hwcap.h | 1 + arch/arm64/include/asm/sysreg.h | 3 + arch/arm64/include/uapi/asm/hwcap.h | 1 + arch/arm64/kernel/cpufeature.c | 13 +- arch/arm64/kernel/cpuinfo.c | 1 + arch/arm64/kernel/traps.c | 11 + arch/arm64/tools/cpucaps | 1 + drivers/clocksource/arm_arch_timer.c | 243 +++++++++++------- include/clocksource/arm_arch_timer.h | 2 +- 14 files changed, 264 insertions(+), 149 deletions(-)
Signature · 1 line
2.30.2