tegra20-emc: Identify memory chip by LPDDR configuration
Status from this message: Applied, thanks!
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v5 Latest9 patches 16 repliesApplied
- v47 patches 9 repliesSuperseded
- v34 patches 8 repliesSuperseded
Earlier versions · 2
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v2 | 4 patches | 1 reply | Superseded | |
| v1 | 2 patches | 2 replies | Superseded |
Patches in v5 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/9 | dt-bindings: Relocate DDR bindingsDocumentation/ Documentation/ Documentation/ +1 more | +0 | 1 reply | |
| 2/9 | dt-bindings: memory: lpddr2: Convert to schemaDocumentation/ Documentation/ | +208 | 1 reply | |
| 3/9 | dt-bindings: memory: lpddr2: Add revision-id propertiesDocumentation/ | +14 | 9 replies | |
| 4/9 | dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-FDocumentation/ | +1 | 1 reply | |
| 5/9 | dt-bindings: Add vendor prefix for Elpida MemoryDocumentation/ | +2 | 1 reply | |
| 6/9 | ARM: dts: elpida_ecb240abacn: Change Elpida compatiblearch/ | +1 | 0 replies | |
| 7/9 | dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-nodeDocumentation/ | +21 | 1 reply | |
| 8/9 | memory: Add LPDDR2-info helpersdrivers/ drivers/ drivers/ +1 more | +184 | 0 replies | |
| 9/9 | memory: tegra20-emc: Support matching timings by LPDDR2 configurationdrivers/ drivers/ | +186 | 0 replies |
Reviews trailers per patch
6 of 9 patches have a Reviewed-by or Acked-by.
| Patch | Rob Herring |
|---|---|
| 1/9 | A-b |
| 2/9 | R-b |
| 3/9 | R-b |
| 4/9 | R-b |
| 5/9 | R-b |
| 6/9 | |
| 7/9 | R-b |
| 8/9 | |
| 9/9 |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [PATCH v5 0/9] tegra20-emc: Identify memory chip by LPDDR configuration
Support memory chip identification by LPDDR2 configuration, which is needed by ASUS Transformer TF101 tablet device that doesn't store RAMCODE in Tegra's NVMEM.
Changelog:
v5: - Added new patch which adds vendor prefix for Elpida Inc.
- Added new patch that updates existing device-tree to use proper lowercase "elpida," compatible prefix.
- Changed Krzysztof's email address in the LPDDR2 binding.
- Added uint32 types to the LPDDR2 binding, which was requested by Krzysztof Kozlowski.
v4: - Moved DDR bindings directory to memory-controllers/, like it
was suggested by Krzysztof Kozlowski.
- Converted existing LPDDR2 binding to schema and utilized it, like it was requested by Krzysztof Kozlowski.
- Added Elpida B8132B2PB-6D-F compatible.
- Made code changes that were requested by Krzysztof Kozlowski.
v3: - Corrected sub-node name in tegra20-emc.yaml.
v2: - Added separate binding for standard LPDDR2 properties, like it
was suggested by Krzysztof Kozlowski.
- Switched Tegra binding to use new lpddr2-configuration sub-node that contains the standard properties.
- Extended commit message of the "emc: Document new LPDDR2 sub-node" patch, telling how the properties are supposed to be used, which was requested by Krzysztof Kozlowski.
- Added new common helpers for parsing LPDDR2 properties and made tegra20-emc driver to use these helpers.
Dmitry Osipenko (9):
dt-bindings: Relocate DDR bindings
dt-bindings: memory: lpddr2: Convert to schema
dt-bindings: memory: lpddr2: Add revision-id properties
dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
dt-bindings: Add vendor prefix for Elpida Memory
ARM: dts: elpida_ecb240abacn: Change Elpida compatible
dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
memory: Add LPDDR2-info helpers
memory: tegra20-emc: Support matching timings by LPDDR2 configuration
.../devicetree/bindings/ddr/lpddr2.txt | 102 --------
.../memory-controllers/ddr/jedec,lpddr2.yaml | 223 ++++++++++++++++++
.../ddr/lpddr2-timings.txt | 0
.../ddr/lpddr3-timings.txt | 0
.../{ => memory-controllers}/ddr/lpddr3.txt | 0
.../nvidia,tegra20-emc.yaml | 23 +-
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm/boot/dts/elpida_ecb240abacn.dtsi | 2 +-
drivers/memory/jedec_ddr.h | 47 ++++
drivers/memory/jedec_ddr_data.c | 41 ++++
drivers/memory/of_memory.c | 87 +++++++
drivers/memory/of_memory.h | 9 +
drivers/memory/tegra/Kconfig | 1 +
drivers/memory/tegra/tegra20-emc.c | 199 ++++++++++++++--
14 files changed, 617 insertions(+), 119 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ddr/lpddr2.txt
create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
rename Documentation/devicetree/bindings/{ => memory-controllers}/ddr/lpddr2-timings.txt (100%)
rename Documentation/devicetree/bindings/{ => memory-controllers}/ddr/lpddr3-timings.txt (100%)
rename Documentation/devicetree/bindings/{ => memory-controllers}/ddr/lpddr3.txt (100%)Signature · 1 line
2.32.0