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RFC RISC-V Smstateen support

Mayuresh Chitale opensbi 1 version New

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  1. v1 RFC Latest3 patches 0 repliesNew

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/3lib: sbi: Add Smstateen extension definesinclude/sbi/riscv_encoding.h+37 -01 reply
2/3lib: sbi: Detect Smstateen CSRs at boot-timeinclude/sbi/sbi_hart.h lib/sbi/sbi_hart.c+22 -21 reply
3/3lib: sbi: configure mstateenlib/sbi/sbi_hart.c+9 -01 reply

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Cover letter [RFC PATCH v1 0/3] RISC-V Smstateen support

This series adds support for the Smstateen specification which provides a mechanism to plug potential covert channels which are opened by extensions which add to processor state that may not get context-switched. Currently access to AIA registers and *envcfg registers is controlled via smstateen.

Mayuresh Chitale (3):
lib: sbi: Add Smstateen extension defines
lib: sbi: Detect Smstateen CSRs at boot-time
lib: sbi: configure mstateen

 include/sbi/riscv_encoding.h | 37 ++++++++++++++++++++++++++++++++++++
 include/sbi/sbi_hart.h       |  4 +++-
 lib/sbi/sbi_hart.c           | 29 +++++++++++++++++++++++++++-
 3 files changed, 68 insertions(+), 2 deletions(-)
Signature · 1 line
2.17.1