RISC-V Smstateen support

Smstateen extension provides a mechanism to plug potential covert channels which are opened by extensions that add to processor state that may not get context-switched.

Signed-off-by Mayuresh Chitale <[email protected]>

---
 include/sbi/riscv_encoding.h | 37 ++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

include/sbi/riscv_encoding.h +6 -0

index cce66dd..fefd3de 100644
@@ -337,6 +337,12 @@
 #define CSR_SIEH                       0x114
 #define CSR_SIPH                       0x154
 
+/* Supervisor stateen CSRs */
+#define CSR_SSTATEEN0       0x10C
+#define CSR_SSTATEEN1       0x10D
+#define CSR_SSTATEEN2       0x10E
+#define CSR_SSTATEEN3       0x10F
+
 /* ===== Hypervisor-level CSRs ===== */
 
 /* Hypervisor Trap Setup (H-extension) */

@@ -401,6 +407,16 @@
 #define CSR_VSIEH                      0x214
 #define CSR_VSIPH                      0x254
 

include/sbi/riscv_encoding.h +21 -1

 /* ===== Machine-level CSRs ===== */
 
 /* Machine Information Registers */

@@ -674,6 +690,17 @@
 #define CSR_MVIEN                      0x308
 #define CSR_MVIP                       0x309
 
+/* Smstateen extension registers */
+/* Machine stateen CSRs */
+#define CSR_MSTATEEN0       0x30C
+#define CSR_MSTATEEN0H      0x31C
+#define CSR_MSTATEEN1       0x30D
+#define CSR_MSTATEEN1H      0x31D
+#define CSR_MSTATEEN2       0x30E
+#define CSR_MSTATEEN2H      0x31E
+#define CSR_MSTATEEN3       0x30F
+#define CSR_MSTATEEN3H      0x31F
+
 /* Machine-Level High-Half CSRs (AIA) */
 #define CSR_MIDELEGH                   0x313
 #define CSR_MIEH                       0x314

@@ -703,6 +730,16 @@
 #define CAUSE_VIRTUAL_INST_FAULT       0x16
 #define CAUSE_STORE_GUEST_PAGE_FAULT   0x17
 
+/* Common defines for all smstateen */
+#define SMSTATEEN_MAX_COUNT 4
+#define SMSTATEEN0_CS       0
+#define SMSTATEEN0_FCSR     0
+#define SMSTATEEN0_IMSIC    58
+#define SMSTATEEN0_AIA      59
+#define SMSTATEEN0_SVSLCT   60
+#define SMSTATEEN0_HSENVCFG 62
+#define SMSTATEEN_STATEN    63
+
 /* ===== Instruction Encodings ===== */
 
 #define INSN_MATCH_LB                  0x3
--

2.17.1

--
opensbi mailing list
opensbi at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/opensbi

Extend HART feature detection to discover Smstateen CSRs at boot-time and configure mstateen envcfg bit depending on availability of menvcfg CSR.

Signed-off-by Mayuresh Chitale <[email protected]>

---
 include/sbi/sbi_hart.h |  4 +++-
 lib/sbi/sbi_hart.c     | 20 +++++++++++++++++++-
 2 files changed, 22 insertions(+), 2 deletions(-)

include/sbi/sbi_hart.h +3 -1

index 93be7ed..b5345f4 100644
@@ -30,9 +30,11 @@ enum sbi_hart_features {
        SBI_HART_HAS_MENVCFG = (1 << 6),
        /** HART has SSTC extension implemented in hardware */
        SBI_HART_HAS_SSTC = (1 << 7),
+       /** HART has mstateen CSR **/
+       SBI_HART_HAS_SMSTATEEN = (1 << 8),
 
        /** Last index of Hart features*/
-       SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SSTC,
+       SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SMSTATEEN,
 };
 
 struct sbi_scratch;

lib/sbi/sbi_hart.c +19 -2

index 8c9cad2..9d0c435 100644
@@ -44,6 +44,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
        unsigned int num_mhpm = sbi_hart_mhpm_count(scratch);
        uint64_t mhpmevent_init_val = 0;
        unsigned long menvcfg_val = 0;
+       unsigned long mstateen_val = 0;
 
        /* Enable FPU */
        if (misa_extension('D') || misa_extension('F'))

@@ -72,6 +73,16 @@ static void mstatus_init(struct sbi_scratch *scratch)
 #endif
        }
 
+       if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SMSTATEEN)) {
+               mstateen_val = csr_read(CSR_MSTATEEN0);
+               mstateen_val |= (1UL << SMSTATEEN_STATEN);
+               if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MENVCFG))
+                       mstateen_val |= (1UL << SMSTATEEN0_HSENVCFG);
+               else
+                       mstateen_val &= ~(1UL << SMSTATEEN0_HSENVCFG);
+               csr_write(CSR_MSTATEEN0, mstateen_val);
+       }
+
        /* Disable user mode usage of all perf counters except default ones (CY, TM, IR) */
        if (misa_extension('S') &&
            sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))

@@ -324,6 +335,9 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
        case SBI_HART_HAS_SSTC:
                fstr = "sstc";
                break;
+       case SBI_HART_HAS_SMSTATEEN:
+               fstr = "smstateen";
+               break;
        default:
                break;
        }

@@ -552,7 +566,6 @@ __mhpm_skip:
        csr_read_allowed(CSR_MENVCFG, (unsigned long)&trap);
        if (!trap.cause)
                hfeatures->features |= SBI_HART_HAS_MENVCFG;
-
        /**
         * Detect if hart supports stimecmp CSR(Sstc extension) and menvcfg is
         * implemented.

@@ -561,6 +574,11 @@ __mhpm_skip:
        if (!trap.cause && sbi_hart_has_feature(scratch, SBI_HART_HAS_MENVCFG))
                hfeatures->features |= SBI_HART_HAS_SSTC;
 
+       /* Detect if hart supports mstateen CSRs */
+       val = csr_read_allowed(CSR_MSTATEEN0, (unsigned long)&trap);
+       if (!trap.cause)
+               hfeatures->features |= SBI_HART_HAS_SMSTATEEN;
+
        /* Detect if hart has AIA local interrupt CSRs */
        csr_read_allowed(CSR_MTOPI, (unsigned long)&trap);
        if (trap.cause)
--

2.17.1

--
opensbi mailing list
opensbi at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/opensbi

When mstateen registers are implemented, the AIA related configurations need to be done in mstateen for the IMSIC initialization to succeed.

Signed-off-by Mayuresh Chitale <[email protected]>

---
 lib/sbi/sbi_hart.c | 9 +++++++++
 1 file changed, 9 insertions(+)

lib/sbi/sbi_hart.c +0 -0

index 9d0c435..f5c44e1 100644
@@ -80,6 +80,15 @@ static void mstatus_init(struct sbi_scratch *scratch)
                        mstateen_val |= (1UL << SMSTATEEN0_HSENVCFG);
                else

lib/sbi/sbi_hart.c +0 -1

                csr_write(CSR_MSTATEEN0, mstateen_val);
        }
 
--

2.17.1

--
opensbi mailing list
opensbi at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/opensbi