riscv: dts: starfive: jh7110: More U-Boot downstream changes for JH7110
Status from this message: Applied to riscv-dt-for-next, thanks!
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v3 Latest posting 2/23 patches 8 repliesApplied
- v3 posting 1/23 patches 1 replySuperseded
- v23 patches 6 repliesSuperseded
Earlier versions · 1
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v1 | 3 patches | 4 replies | Superseded |
Changes in v3 from the cover letter
- patch 1/3 "add StarFive JH7110 SoC DMC": wrap at 80 col, clock-names const is 'pll'.
- patch 2/3 "add memory controller node": memory-controller node follows sorting style by reg address, between watchdog and crypto nodes. Update clock-names to 'pll'.
- patch 3/3 "bootph-pre-ram hinting needed by boot loader": add missing hints for syscrg dependencies 'gmac1_rgmii_rxin', 'gmac1_rmii_refin', and 'pllclk'.
Patches in v3 posting 2/2 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/3 | dt-bindings: memory-controllers: add StarFive JH7110 SoC DMCDocumentation/ | +74 | 3 replies | |
| 2/3 | riscv: dts: starfive: jh7110: add DMC memory controllerarch/ | +12 | 1 reply | |
| 3/3 | riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loaderarch/ | +12 | 1 reply |
Reviews trailers per patch
All 3 patches have a Reviewed-by or Acked-by of their own; the series has one for all of them.
| Patch | Hal Feng | Krzysztof Kozlowski | Emil Renner Berthing |
|---|---|---|---|
| Series | R-b | ||
| 1/3 | R-b | ||
| 2/3 | R-b | ||
| 3/3 | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 3 reviewers.
Cover letter [PATCH v3 RESEND 0/3] riscv: dts: starfive: jh7110: More U-Boot downstream changes for JH7110
Bring in additional downstream U-Boot boot loader changes for StarFive VisionFive2 board target (and related JH7110 common boards). Create a basic dt-binding (and not any Linux driver) in support of the memory-controller dts node used in mainline U-Boot. Also add bootph-pre-ram hinting to jh7110.dtsi needed at SPL boot phase.
Changes since v2:
- patch 1/3 "add StarFive JH7110 SoC DMC": wrap at 80 col, clock-names const is 'pll'.
- patch 2/3 "add memory controller node": memory-controller node follows sorting style by reg address, between watchdog and crypto nodes. Update clock-names to 'pll'.
- patch 3/3 "bootph-pre-ram hinting needed by boot loader": add missing hints for syscrg dependencies 'gmac1_rgmii_rxin', 'gmac1_rmii_refin', and 'pllclk'.
E Shattow (3):
dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC
riscv: dts: starfive: jh7110: add DMC memory controller
riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot
loader
.../starfive,jh7110-dmc.yaml | 74 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 24 ++++++ 2 files changed, 98 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml
base-commit: 481ee0fcbb9a0f0706d6d29de9570d1048aff631
Signature · 1 line
2.50.0