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at91: factorize soc init and switch to early platform

Ryan Mallon linux-arm-kernel 1 version New

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  1. v1 Latest12 of 14 patches 0 repliesNew

12 of 14 patches are in this archive. The cover letter announces 14.

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
2/14at91: introduce commom AT91_BASE_SYS+0 -01 reply
3/14at91: factorize at91 interrupts init to soc+0 -00 replies
5/14at91: use structure to store the current soc+0 -023 replies
5/14at91: use structure to store the current soc+0 -01 reply
5/14at91: use structure to store the current soc+0 -01 reply
5/14at91: use structure to store the current soc+0 -01 reply
5/14at91: use structure to store the current soc+0 -01 reply
5/14at91: use structure to store the current soc+0 -00 replies
7/14at91: switch gpio to early platfrom device+0 -01 reply
13/14at91: move register clocks to soc generic init+0 -00 replies
14/14at91: move clock subsystem init to soc generic init+0 -01 reply
14/14at91: move clock subsystem init to soc generic init+0 -01 reply

Reviews trailers per patch

2 of 12 patches have a Reviewed-by or Acked-by.

PatchRyan Mallon
2/14
3/14R-b
5/14
5/14
5/14
5/14
5/14
5/14
7/14
13/14R-b
14/14
14/14

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v1 thread

Cover letter [PATCH 0/14] at91: factorize soc init and switch to early platform
Quoted 8 lines · Jean-Christophe PLAGNIOL-VILLARD

Hi,

The following patch series start to factorize the soc init and switch gpio and timers to early platform

diff stat on arm

80 files changed, 1690 insertions(+), 2053 deletions(-)

I finally had a chance to test this. On our Snapper 9G20 board (AT91SAM9G20) the latest linux-next gives me:

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
<5>Linux version 2.6.39-rc4-next-20110427+ (ryan at okiwi) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #850 Thu Apr 28 09:07:43 NZST 2011
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: Bluewater Systems Snapper 9260/9G20 module
Memory policy: ECC disabled, Data cache writeback
<0>Kernel panic - not syncing: Impossible to detect the CPU type
[<c002fb1c>] (unwind_backtrace+0x0/0xe4) from [<c0230820>] (panic+0x50/0x178)
[<c0230820>] (panic+0x50/0x178) from [<c000d414>] (at91_initialize+0x18/0x20)
[<c000d414>] (at91_initialize+0x18/0x20) from [<c000e298>] (snapper9260_map_io+0xc/0x5c)
[<c000e298>] (snapper9260_map_io+0xc/0x5c) from [<c000d0ec>] (paging_init+0x668/0x728)
[<c000d0ec>] (paging_init+0x668/0x728) from [<c000b5cc>] (setup_arch+0x39c/0x620)
[<c000b5cc>] (setup_arch+0x39c/0x620) from [<c000873c>] (start_kernel+0x6c/0x2c8)

I'll have a better look at this later to see if I can find the problem, though I suspect the remapping of the AT91_DBGU location is to blame. What platforms have you tested this on?

~Ryan

Signature · 7 lines
Bluewater Systems Ltd - ARM Technology Solution Centre

Ryan Mallon         		5 Amuri Park, 404 Barbadoes St
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