Update the reset values of the Xilinx ZynqMP QSPI
Status from this message: Applied to target-arm.next, thanks.
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v3 Latest3 patches 1 replyApplied
- v23 patches 4 repliesSuperseded
- v13 patches 6 repliesSuperseded
Changes in v3 from the cover letter
- Match documented name
Patches in v3 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/3 | xilinx_spips: Update the QSPI Mod ID reset valuehw/ | +1 | 0 replies | |
| 2/3 | xilinx_spips: Set all of the reset valueshw/ include/ | +31 | 0 replies | |
| 3/3 | xilinx_spips: Use memset instead of a for loop to zero registershw/ | +3 | 0 replies |
Reviews trailers per patch
All 3 patches have a Reviewed-by or Acked-by.
| Patch | KONRAD Frederic | Francisco Iglesias |
|---|---|---|
| 1/3 | R-b | R-b |
| 2/3 | R-b | |
| 3/3 | R-b | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [Qemu-devel] [PATCH-2.12 v3 0/3] Update the reset values of the Xilinx ZynqMP QSPI
Update the reset values of the Xilinx ZynqMP QSPI device to match the resister spec here:
https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html
V3:
- Match documented name
V2:
- Don't double set registers
Based-on: [email protected]
Alistair Francis (3):
xilinx_spips: Update the QSPI Mod ID reset value
xilinx_spips: Set all of the reset values
xilinx_spips: Use memset instead of a for loop to zero registers
hw/ssi/xilinx_spips.c | 45 +++++++++++++++++++++++++++++++------------ include/hw/ssi/xilinx_spips.h | 2 +- 2 files changed, 34 insertions(+), 13 deletions(-)
Signature · 1 line
2.14.1