RFC PCI: rockchip: Improve quality of driver
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b4 am [email protected]Versions newest first
- v4 RFC Latest1 of 4 patches 1 replyIn review
1 of 4 patches is in this archive. The cover letter announces 4.
Patches in v4 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/4 | PCI: rockchip: Drop unused custom registers and bitfieldsdrivers/ | +1 | 0 replies |
Reviews trailers per patch
No Reviewed-by, Acked-by or Tested-by trailers for v4 yet.
Cover letter [RFC PATCH v4 0/4] PCI: rockchip: Improve quality of driver
During a 30-day debugging-run fighting quirky PCIe devices on RK3399 some quality improvements began to take form and this is my attempt at upstreaming it. It will ensure maximum chance of retraining to Gen2 5.0GT/s, on all four lanes and plus if anybody is debugging the PHY they'll now get real values from TEST_I[3:0] for every TEST_ADDR[4:0] without risk of locking up kernel like with present broken async strobe TEST_WRITE.
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V3 -> V4: fix TLS setting-up in Link Control and Status Register 2 and adjust commit titles
V2 -> V3: correctly clean-up with standard PCIe defines as per Bjorn's suggestion
V1 -> V2: use standard PCIe defines as suggested by Bjorn
Geraldo Nascimento (4):
PCI: rockchip: Drop unused custom registers and bitfields
PCI: rockchip: Set Target Link Speed before retraining
phy: rockchip-pcie: Enable all four lanes
phy: rockchip-pcie: Adjust read mask and write
drivers/pci/controller/pcie-rockchip-host.c | 4 ++++ drivers/pci/controller/pcie-rockchip.h | 11 +---------- drivers/phy/rockchip/phy-rockchip-pcie.c | 16 +++++++++------- 3 files changed, 14 insertions(+), 17 deletions(-)
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2.49.0