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MIPS: implement hardware perf event support

PATCH NAK Deng-Cheng Zhu 2 participants 4 messages Apr 15, 2010 – Apr 17, 2010

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#0 lore raw

PATCH 3/3 MIPS: implement hardware perf event support

This patch is the HW perf event support. To enable this feature, we can not choose the SMTC kernel; Oprofile should be disabled; kernel performance events be selected. Then we can enable it in the Kernel type menu.

Oprofile for MIPS platforms initializes irq at arch init time. Currently we do not change this logic to allow PMU reservation.

If a platform has EIC, we can use the irq base and perf counter irq offset defines for the interrupt controller in mipspmu_get_irq().

---
 arch/mips/Kconfig             |    8 +
 arch/mips/kernel/Makefile     |    2 +
 arch/mips/kernel/perf_event.c | 1468 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 1478 insertions(+), 0 deletions(-)
 create mode 100644 arch/mips/kernel/perf_event.c
arch/mips/Kconfig +8 -0
index cf33418..9aac9b5 100644
@@ -1857,6 +1857,14 @@ config NODES_SHIFT
 	default "6"
 	depends on NEED_MULTIPLE_NODES
 
+config HW_PERF_EVENTS
+	bool "Enable hardware performance counter support for perf events"
+	depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n
+	default y
+	help
+	  Enable hardware performance counter support for perf events. If
+	  disabled, perf events will use software events only.
+
 source "mm/Kconfig"
 
 config SMP
arch/mips/kernel/Makefile +2 -0
index 7a6ac50..c934ab7 100644
@@ -101,6 +101,8 @@ obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT)	+= 8250-platform.o
 
 obj-$(CONFIG_MIPS_CPUFREQ)	+= cpufreq/
 
+obj-$(CONFIG_HW_PERF_EVENTS)	+= perf_event.o
+
 EXTRA_CFLAGS += -Werror
 
 CPPFLAGS_vmlinux.lds		:= $(KBUILD_CFLAGS)
arch/mips/kernel/perf_event.c new file +1468 -0

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#1 lore raw

Hi, Deng-Cheng

Thanks very much for your Perf support of MIPS.

Quoted 17 lines · Deng-Cheng Zhu

This patch is the HW perf event support. To enable this feature, we can not choose the SMTC kernel; Oprofile should be disabled; kernel performance events be selected. Then we can enable it in the Kernel type menu.

Oprofile for MIPS platforms initializes irq at arch init time. Currently we do not change this logic to allow PMU reservation.

If a platform has EIC, we can use the irq base and perf counter irq offset defines for the interrupt controller in mipspmu_get_irq().

---
 arch/mips/Kconfig             |    8 +
 arch/mips/kernel/Makefile     |    2 +
 arch/mips/kernel/perf_event.c | 1468 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 1478 insertions(+), 0 deletions(-)
 create mode 100644 arch/mips/kernel/perf_event.c

[...]

Quoted 2 lines

+ * Copied from Oprofile -- BEGIN
+ */

[...]

Review

Quoted 2 lines
(quoted diff) +2 -0
+/* Copied from Oprofile -- END */
+

Seems you only copied the contents from arch/mips/oprofile/op_model_mipsxx.c and handle the mipsxx, what about rm9000(arch/mips/oprofile/op_model_rm9000.c) and loongson2(arch/mips/oprofile/op_model_loongson2.c)?

I think it will not work on rm9000 and loongson2 for their performance counters are different from mipsxx. so suggest you only enable this for mipsxxx(refer to arch/mips/oprofile/Makefile) via #ifdef and renaming the current perf_event.c to perf_event_mipsxx.c.

And to reduce the source code duplication, perhaps we need a solution to share the source code between Oprofile and Perf, and also among mipsxx, rm9000 and loongson2.

Thanks & Regards,
Wu Zhangjin

#2 lore raw

Hi, Zhangjin

Thanks for your feedback!

2010/4/16 Wu Zhangjin <[email protected]>:

Quoted 9 lines

Seems you only copied the contents from arch/mips/oprofile/op_model_mipsxx.c and handle the mipsxx, what about rm9000(arch/mips/oprofile/op_model_rm9000.c) and loongson2(arch/mips/oprofile/op_model_loongson2.c)?

I think it will not work on rm9000 and loongson2 for their performance counters are different from mipsxx. so suggest you only enable this for mipsxxx(refer to arch/mips/oprofile/Makefile) via #ifdef and renaming the current perf_event.c to perf_event_mipsxx.c.

OK, I'll try to move the control/count help functions/defines and the specific mips_pmu stuff into a file called perf_event_mipsxx.c, and leave the common things in perf_event.c, so that when we implement Perf for loongson2 or rm9000, we can simply add new files like perf_event_loongson2.c.

Quoted 3 lines

And to reduce the source code duplication, perhaps we need a solution to share the source code between Oprofile and Perf, and also among mipsxx, rm9000 and loongson2.

I think there is almost nothing for the count/control things which can be shared among mipsxx/rm9000/loongson2. As for sharing between Oprofile and Perf, how about moving mipsxx/rm9000/loongson2 count/control things into a new file asm/pmu.h, where we use #ifdef's.

Deng-Cheng

#3 lore raw

On Sat, 2010-04-17 at 09:49 +0800, dengcheng.zhu wrote:
[...]

Quoted 11 lines
Quoted 5 lines

I think it will not work on rm9000 and loongson2 for their performance counters are different from mipsxx. so suggest you only enable this for mipsxxx(refer to arch/mips/oprofile/Makefile) via #ifdef and renaming the current perf_event.c to perf_event_mipsxx.c.

OK, I'll try to move the control/count help functions/defines and the specific mips_pmu stuff into a file called perf_event_mipsxx.c, and leave the common things in perf_event.c, so that when we implement Perf for loongson2 or rm9000, we can simply add new files like perf_event_loongson2.c.

Quoted 8 lines
Quoted 3 lines

And to reduce the source code duplication, perhaps we need a solution to share the source code between Oprofile and Perf, and also among mipsxx, rm9000 and loongson2.

I think there is almost nothing for the count/control things which can be shared among mipsxx/rm9000/loongson2. As for sharing between Oprofile and Perf, how about moving mipsxx/rm9000/loongson2 count/control things into a new file asm/pmu.h, where we use #ifdef's.

It looks good, based on your work, I will try to add the loongson2 specific perf support, then we can get more details about the common parts.

Regards,
Wu Zhangjin