ASoC: rt5645: Add the HW EQ for the customized speaker output of Google Celes
Subsystems (3)
Oder Chiou
maintainerPATCH v2 1/1 ASoC: rt5645: Add the HW EQ for the customized speaker output of Google Celes
Signed-off-by Oder Chiou <[email protected]>
--- include/sound/rt5645.h | 1 + sound/soc/codecs/rt5645.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++- sound/soc/codecs/rt5645.h | 5 ++++ 3 files changed, 75 insertions(+), 1 deletion(-)
include/sound/rt5645.h +1 -0
@@ -23,6 +23,7 @@ struct rt5645_platform_data {unsigned int jd_mode;/* Invert JD when jack insert */ bool jd_invert; + unsigned int eq_mode; };#endif
sound/soc/codecs/rt5645.c +69 -1
109 lines not on this page · raw message
sound/soc/codecs/rt5645.h +5 -0
@@ -2187,6 +2187,11 @@ enum { RT5645_AD_MONO_R_FILTER = (0x1 << 5), }; +enum { +EQ_NONE , +EQ_GOOGLE_CELES , +}; +int rt5645_sel_asrc_clk_src (struct snd_soc_codec *codec,unsigned int filter_mask,unsigned int clk_src);
Signature · 1 line
1.8.1.1.439.g50a6b54
Mark Brown
maintainersound/soc/codecs/rt5645.c static const struct reg_default rt5645_reg[] = { · line 252
Quoted 8 lines · Oder Chiou
sound/soc/codecs/rt5645.c +8
-0+ { /* EQ_GOOGLE_CELES */ + { + {0x1c0, 0x04b8}, + {0x1c1, 0xfd02}, + {0x1c2, 0x04b8}, + {0x1c3, 0xfd02}, + {0, 0}, + },
This looks like binary parameters for a DSP algorithm which I'd expect to be exposed as a binary control. Userspace can then set whatever parameters it needs (perhaps after looking at DMI). Adding Dylan...