staging: olpc_dcon: drop support for DCON v1
PATCH 2/3 staging: olpc_dcon: drop support for DCON v1
The v1 DCONs only existed for XO-1 prototypes (and even then, very very early prototypes). Drop support for v1 DCON.
Signed-off-by Andres Salomon <[email protected]>
--- drivers/staging/olpc_dcon/olpc_dcon.c | 31 ++++++++++--------------------- 1 files changed, 10 insertions(+), 21 deletions(-)
drivers/staging/olpc_dcon/olpc_dcon.c +10 -21
@@ -88,29 +88,18 @@ static int dcon_hw_init(struct dcon_priv *dcon, int is_init) }if (ver <0xdc02 ) { -/* Initialize the DCON registers */ - -/* Start with work-arounds for DCON ASIC */ -i2c_smbus_write_word_data (client,0x4b ,0x00cc ); -i2c_smbus_write_word_data (client,0x4b ,0x00cc ); -i2c_smbus_write_word_data (client,0x4b ,0x00cc ); -i2c_smbus_write_word_data (client,0x0b ,0x007a ); -i2c_smbus_write_word_data (client,0x36 ,0x025c ); -i2c_smbus_write_word_data (client,0x37 ,0x025e ); - -/* Initialise SDRAM */ - -i2c_smbus_write_word_data (client,0x3b ,0x002b ); -i2c_smbus_write_word_data (client,0x41 ,0x0101 ); -i2c_smbus_write_word_data (client,0x42 ,0x0101 ); - }else { -/* SDRAM setup/hold time */ -i2c_smbus_write_word_data (client,0x3a ,0xc040 ); -i2c_smbus_write_word_data (client,0x41 ,0x0000 ); -i2c_smbus_write_word_data (client,0x41 ,0x0101 ); -i2c_smbus_write_word_data (client,0x42 ,0x0101 ); +dev_err (&dcon->client->dev, +"DCON v1 is unsupported, giving up..\n" ); + rc = -ENODEV ; + goto err; } +/* SDRAM setup/hold time */ +i2c_smbus_write_word_data (client,0x3a ,0xc040 ); +i2c_smbus_write_word_data (client,0x41 ,0x0000 ); +i2c_smbus_write_word_data (client,0x41 ,0x0101 ); +i2c_smbus_write_word_data (client,0x42 ,0x0101 ); +/* Colour swizzle, AA, no passthrough, backlight */ if (is_init) { dcon->disp_mode = MODE_PASSTHRU | MODE_BL_ENABLE |
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1.7.2.5