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Set VLD04 output to 2.8V in PMIC initialization.

PATCH Superseded Gautam Bhat 3 participants 8 messages Jun 21, 2017 – Jul 3, 2017

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v1 of 3 Superseded Latest is v3 →

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#0 lore raw

cover Set VLD04 output to 2.8V in PMIC initialization.

This change sets the VLDO4 settings output to 2.8V in PMIC initialization. I accidentally noticed this when I was testing the DSI voltage input which was 3.3V. Not setting the proper voltage can harm some of the voltage sensitive peripheral.

Gautam Bhat (1):
Set VLD04 output to 2.8V in PMIC initialization.

 board/freescale/mx7dsabresd/mx7dsabresd.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
Signature · 1 line
2.11.0
#1 lore raw

PATCH 1/1 Set VLD04 output to 2.8V in PMIC initialization.

This change sets the VLDO4 settings output to 2.8V in PMIC initialization so that the MIPI DSI and MIPI CSI input voltage is 2.8V as per the schematics.

---

 board/freescale/mx7dsabresd/mx7dsabresd.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
board/freescale/mx7dsabresd/mx7dsabresd.c +10 -0
index ecea5a529a..8df7ed575a 100644
@@ -341,6 +341,7 @@ int power_init_board(void)
 {
 	struct udevice *dev;
 	int ret, dev_id, rev_id;
+	uint regval;
 
 	ret = pmic_get("pfuze3000", &dev);
 	if (ret == -ENODEV)
@@ -354,6 +355,15 @@ int power_init_board(void)
 
 	pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
 
+	/*
+	 * Set the voltage of VLDO4 output to 2.8V which feeds
+	 * the MIPI DSI and MIPI CSI inputs.
+	 */
+	regval = pmic_reg_read(dev, PFUZE3000_VLD4CTL);
+	regval &= ~(0xF);
+	regval |= 0xA; /* Set to 2.8V */
+	pmic_reg_write(dev, PFUZE3000_VLD4CTL, regval);
+
 	return 0;
 }
 #endif
Signature · 1 line
2.11.0
#2 lore raw

PATCH 1/1 Set VLD04 output to 2.8V in PMIC initialization.

Hello Gautam,

Quoted 5 lines · Gautam Bhat

This change sets the VLDO4 settings output to 2.8V in PMIC initialization so that the MIPI DSI and MIPI CSI input voltage is 2.8V as per the schematics.

Thanks for the patch; Fabio, could you take a look at this?

Signature · 3 lines
Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750
reviewer
#3 lore raw

PATCH 1/1 Set VLD04 output to 2.8V in PMIC initialization.

In reply to Gautam Bhat

Hi Gautam,

Quoted 3 lines · Gautam Bhat

This change sets the VLDO4 settings output to 2.8V in PMIC initialization so that the MIPI DSI and MIPI CSI input voltage is 2.8V as per the schematics.

As we do not have MIPI DSI / MIPI CSI support in U-Boot, it is preferable to let the kernel configure the regulator.

You can do this is the device tree like this:

arch/arm/boot/dts/imx7d-sdb.dts +2 -2
index 54c4540..923aa755 100644
@@ -285,8 +285,8 @@
                        };
 
                        vgen6_reg: vldo4 {
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <3300000>;
+                               regulator-min-microvolt = <2800000>;
+                               regulator-max-microvolt = <2800000>;
                                regulator-always-on;
                        };
                };

Regards,

Fabio Estevam

#4 lore raw

PATCH 1/1 Set VLD04 output to 2.8V in PMIC initialization.

Quoted 30 lines · Fabio Estevam

Hi Gautam,

Quoted 3 lines · Gautam Bhat

This change sets the VLDO4 settings output to 2.8V in PMIC initialization so that the MIPI DSI and MIPI CSI input voltage is 2.8V as per the schematics.

As we do not have MIPI DSI / MIPI CSI support in U-Boot, it is preferable to let the kernel configure the regulator.

You can do this is the device tree like this:

arch/arm/boot/dts/imx7d-sdb.dts +2 -2
index 54c4540..923aa755 100644
@@ -285,8 +285,8 @@
                        };
 
                        vgen6_reg: vldo4 {
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <3300000>;
+                               regulator-min-microvolt = <2800000>;
+                               regulator-max-microvolt = <2800000>;
                                regulator-always-on;
                        };
                };
Quoted 4 lines

Regards,

Fabio Estevam

​Hi Fabio,

The patch for the kernel was supposed to be next. Should I send the kernel patch to mainline or some place else?

Coming to u-boot, the fact that even if there is no MIPI DSI/MIPI CSI support the voltage would still be 3.3V in those rails. In my case I do not attach the display after u-boot boots up. I keep the display attached and sometimes I leave it in u-boot command line without going over to the kernel. Since this is a development board this is often the case for many developers and there may be chances of the display getting damaged.

Thanks,
Gautam.

​

reviewer
#5 lore raw

PATCH 1/1 Set VLD04 output to 2.8V in PMIC initialization.

Hi Gautam,

Quoted 4 lines · mind entropy

Hi Fabio,

The patch for the kernel was supposed to be next. Should I send the kernel patch to mainline or some place else?

Do you have MIPI DSI working in mainline kernel? If you do, please share the patches.

You can use ./scripts/get_maintainer.pl to get the people and lists to put on Cc.

Quoted 6 lines

Coming to u-boot, the fact that even if there is no MIPI DSI/MIPI CSI support the voltage would still be 3.3V in those rails. In my case I do not attach the display after u-boot boots up. I keep the display attached and sometimes I leave it in u-boot command line without going over to the kernel. Since this is a development board this is often the case for many developers and there may be chances of the display getting damaged.

It makes sense now. Please send a v2 with the following changes:

1. Add mx7dsabresd to the Subject, so that it becomes: mx7dsabresd:
Set VLD04 output to 2.8V

2. Explain in the commit message why you are doing such change, just like you did above, where you explain that the default LDO4 output is 3.3V and that is beyond the MIPI DSI spec.

3. Remove the extra parentesis (0xF): regval &= ~0xF; is enough.

Thanks

#6 lore raw

PATCH 1/1 Set VLD04 output to 2.8V in PMIC initialization.

Quoted 5 lines · Fabio Estevam

Hi Gautam,

On Tue, Jun 27, 2017 at 11:32 PM, mind entropy <[email protected]> wrote:

Quoted 7 lines
Quoted 4 lines

Hi Fabio,

The patch for the kernel was supposed to be next. Should I send the kernel patch to mainline or some place else?

Do you have MIPI DSI working in mainline kernel? If you do, please share the patches.

I would really like to mainline the MIPI DSI support to the mainline kernel as well as u-boot.
In fact I think support for u-boot would be much simpler. I have already written a driver for the
HX8363 MIPI controller for the Truly displays and I would like to contribute it to the freescale tree
with some polishing but I don't have the hardware to test anymore i.e. the mx7dsabresd. Please note that
the freescale tree has support for the HX8369 controller.

Thanks,
Gautam.

reviewer
#7 lore raw

PATCH 1/1 Set VLD04 output to 2.8V in PMIC initialization.

Hi Gautam,

Quoted 9 lines · Gautam Bhat

I would really like to mainline the MIPI DSI support to the mainline kernel as well as u-boot.
In fact I think support for u-boot would be much simpler. I have already written a driver for the
HX8363 MIPI controller for the Truly displays and I would like to contribute it to the freescale tree
with some polishing but I don't have the hardware to test anymore i.e. the mx7dsabresd. Please note that
the freescale tree has support for the HX8369 controller.

Feel free to post the patches :-)