spi: cadence_spi: Adopt Linux DT bindings

index de208b3613..ad746c7311 100644
@@ -68,46 +68,45 @@
 &qspi {
 	status = "okay";
 
-        flash0: m25p80 at 0 {
-                compatible = "s25fl512s","spi-flash";
-                reg = <0>;
-                spi-tx-bus-width = <1>;
-                spi-rx-bus-width = <4>;
-                spi-max-frequency = <96000000>;
-                #address-cells = <1>;
-                #size-cells = <1>;
-                tshsl-ns = <392>;
-                tsd2d-ns = <392>;
-                tchsh-ns = <100>;
-                tslch-ns = <100>;
+	flash0: m25p80 at 0 {
+		compatible = "s25fl512s","spi-flash";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		cdns,tshsl-ns = <392>;
+		cdns,tsd2d-ns = <392>;
+		cdns,tchsh-ns = <100>;
+		cdns,tslch-ns = <100>;
 		block-size = <18>;
 
-
-                partition at 0 {
-                        label = "QSPI.u-boot-spl-os";
-                        reg = <0x00000000 0x00100000>;
-                };
-                partition at 1 {
-                        label = "QSPI.u-boot-env";
-                        reg = <0x00100000 0x00040000>;
-                };
-                partition at 2 {
-                        label = "QSPI.skern";
-                        reg = <0x00140000 0x0040000>;
-                };
-                partition at 3 {
-                        label = "QSPI.pmmc-firmware";
-                        reg = <0x00180000 0x0040000>;
-                };
-                partition at 4 {
-                        label = "QSPI.kernel";
-                        reg = <0x001C0000 0x0800000>;
-                };
-                partition at 5 {
-                        label = "QSPI.file-system";
-                        reg = <0x009C0000 0x3640000>;
-                };
-        };
+		partition at 0 {
+			label = "QSPI.u-boot-spl-os";
+			reg = <0x00000000 0x00100000>;
+		};
+		partition at 1 {
+			label = "QSPI.u-boot-env";
+			reg = <0x00100000 0x00040000>;
+		};
+		partition at 2 {
+			label = "QSPI.skern";
+			reg = <0x00140000 0x0040000>;
+		};
+		partition at 3 {
+			label = "QSPI.pmmc-firmware";
+			reg = <0x00180000 0x0040000>;
+		};
+		partition at 4 {
+			label = "QSPI.kernel";
+			reg = <0x001C0000 0x0800000>;
+		};
+		partition at 5 {
+			label = "QSPI.file-system";
+			reg = <0x009C0000 0x3640000>;
+		};
+	};
 };
 
 &mmc0 {

index 7b2fae6860..9bcfea6d86 100644
@@ -92,8 +92,9 @@
 			      <0x24000000 0x4000000>;
 			interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
 			num-cs = <4>;
-			fifo-depth = <256>;
-			sram-size = <256>;
+			cdns,fifo-depth = <256>;
+			cdns,fifo-width = <4>;
+			cdns,trigger-address = <0x24000000>;
 			status = "disabled";
 		};
 

index 8588221e57..7557aa01e5 100644
@@ -644,8 +644,9 @@
 			clocks = <&qspi_clk>;
 			ext-decoder = <0>;  /* external decoder */
 			num-cs = <4>;
-			fifo-depth = <128>;
-			sram-size = <128>;
+			cdns,fifo-depth = <128>;
+			cdns,fifo-width = <4>;
+			cdns,trigger-address = <0x00000000>;
 			bus-num = <2>;
 			status = "disabled";
 		};

index 377700df11..abfd0bc4f8 100644
@@ -734,8 +734,8 @@
 			clocks = <&l4_main_clk>;
 			ext-decoder = <0>;  /* external decoder */
 			num-chipselect = <4>;
-			fifo-depth = <128>;
-			sram-size = <512>;
+			cdns,fifo-depth = <128>;
+			cdns,fifo-width = <4>;
 			bus-num = <2>;
 			status = "disabled";
 		};

index 726505821f..1e91a65af6 100644
@@ -94,10 +94,9 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };

index 16a3283710..2e2b71fefb 100644
@@ -93,11 +93,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 

index f175ef2ead..95a8e653d7 100644
@@ -104,11 +104,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 

index e45c2abbc2..6f42b88130 100644
@@ -84,11 +84,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 

index bdd93248fb..e3ae8a8207 100644
@@ -74,11 +74,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 

index 739bbb7f3d..e24830af57 100644
@@ -92,10 +92,9 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };

index f168e4ff99..a0febe91b0 100644
@@ -79,11 +79,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 
 	flash1: n25q00 at 1 {

@@ -96,11 +95,10 @@
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */
-		read-delay = <4>;  /* delay value in read data capture register */
-		tshsl-ns = <50>;
-		tsd2d-ns = <50>;
-		tchsh-ns = <4>;
-		tslch-ns = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
 	};
 };
 

index fa3fd641b2..bceac09154 100644
@@ -32,7 +32,9 @@
 			reg = <0x80203000 0x100>,
 				<0x40000000 0x1000000>;
 			clocks = <3750000>;
-			sram-size = <256>;
+			cdns,fifo-depth = <256>;
+			cdns,fifo-width = <4>;
+			cdns,trigger-address = <0x40000000>;
 			status = "okay";
 
 			flash0: n25q32 at 0 {

@@ -44,10 +46,10 @@
 				m25p,fast-read;
 				page-size = <256>;
 				block-size = <16>; 	/* 2^16, 64KB */
-				tshsl-ns = <50>;
-				tsd2d-ns = <50>;
-				tchsh-ns = <4>;
-				tslch-ns = <4>;
+				cdns,tshsl-ns = <50>;
+				cdns,tsd2d-ns = <50>;
+				cdns,tchsh-ns = <4>;
+				cdns,tslch-ns = <4>;
 			};
 	};
 };

index c1e2233d7c..74c82080fc 100644
@@ -6,7 +6,10 @@ Required properties:
 - reg			: 1.Physical base address and size of SPI registers map.
 			  2. Physical base address & size of NOR Flash.
 - clocks		: Clock phandles (see clock bindings for details).
-- sram-size		: spi controller sram size.
+- cdns,fifo-depth	: Size of the data FIFO in words.
+- cdns,fifo-width	: Bus width of the data FIFO in bytes.
+- cdns,trigger-address	: 32-bit indirect AHB trigger address.
+- cdns,is-decoded-cs	: Flag to indicate whether decoder is used or not.
 - status		: enable in requried dts.
 
 connected flash properties

@@ -15,14 +18,14 @@ connected flash properties
 - spi-max-frequency	: Max supported spi frequency.
 - page-size		: Flash page size.
 - block-size		: Flash memory block size.
-- tshsl-ns		: Added delay in master reference clocks (ref_clk) for
+- cdns,tshsl-ns		: Added delay in master reference clocks (ref_clk) for
 			  the length that the master mode chip select outputs
 			  are de-asserted between transactions.
-- tsd2d-ns		: Delay in master reference clocks (ref_clk) between one
+- cdns,tsd2d-ns		: Delay in master reference clocks (ref_clk) between one
 			  chip select being de-activated and the activation of
 			  another.
-- tchsh-ns		: Delay in master reference clocks between last bit of
+- cdns,tchsh-ns		: Delay in master reference clocks between last bit of
 			  current transaction and de-asserting the device chip
 			  select (n_ss_out).
-- tslch-ns		: Delay in master reference clocks between setting
+- cdns,tslch-ns		: Delay in master reference clocks between setting
 			  n_ss_out low and first bit transfer