Add support for MIPS Creator CI20

PATCH Superseded Ezequiel Garcia 2 participants 8 messages Dec 16, 2018 – Dec 18, 2018

Subsystems (5)

Device tree bindings MIPS Common clk MMC, SD and SDIO +1 more subsystems

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Ezequiel Garcia

author

2018-12-16 22:25 UTC #0 lore raw

v3 cover Add support for MIPS Creator CI20

A new round, addressing feedback from Daniel.

Daniel: do you think this is acceptable as a first submission?

v3:
* Cleanup SoC reset logic.
* Move gpio driver to SoC specific code, to be used by SPL. A proper dm gpio driver will be added later.
* Cleaned up SPDX.
* Added myself as JZ4780 maintainer.
* Added TODO file.

v2:

* Replaced infinite while loop with wait_for_bit.
* Added a MAINTAINERS file. If anyone wants to co-maintain this, please let me know.

This is based on master and has been tested by SD-card booting both U-Boot and Linux. Booting Linux via TFTP was also tested.

I've pushed a branch to https://github.com/ezequielgarcia/u-boot/tree/ci20-v3
and started travis.

Note that Paul's contributions are recorded using his imgtec.com mail although it's no longer valid, and that we will rely on mailmap to map it to mips.com.

It would be terrific to fit this on the next release.

Thanks!

Paul Burton (5):
misc: Add JZ47xx efuse driver
mmc: Add JZ47xx SD/MMC controller driver
mips: Add SPL header
mips: jz47xx: Add JZ4780 SoC support
mips: jz47xx: Add Creator CI20 platform

 MAINTAINERS                                   |   6 +
 arch/mips/Kconfig                             |   7 +
 arch/mips/Makefile                            |   1 +
 arch/mips/dts/Makefile                        |   1 +
 arch/mips/dts/ci20.dts                        | 120 ++++
 arch/mips/dts/jz4780.dtsi                     | 162 ++++++
 arch/mips/include/asm/spl.h                   |  35 ++
 arch/mips/mach-jz47xx/Kconfig                 |  26 +
 arch/mips/mach-jz47xx/Makefile                |   7 +
 arch/mips/mach-jz47xx/include/mach/jz4780.h   | 103 ++++
 .../mach-jz47xx/include/mach/jz4780_dram.h    | 456 +++++++++++++++
 .../mach-jz47xx/include/mach/jz4780_gpio.h    |  12 +
 arch/mips/mach-jz47xx/jz4780/Makefile         |   5 +
 arch/mips/mach-jz47xx/jz4780/TODO             |   4 +
 arch/mips/mach-jz47xx/jz4780/gpio.c           |  39 ++
 arch/mips/mach-jz47xx/jz4780/jz4780.c         |  82 +++
 arch/mips/mach-jz47xx/jz4780/pll.c            | 527 ++++++++++++++++++
 arch/mips/mach-jz47xx/jz4780/reset.c          |  53 ++
 arch/mips/mach-jz47xx/jz4780/sdram.c          | 270 +++++++++
 arch/mips/mach-jz47xx/jz4780/timer.c          | 237 ++++++++
 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds   |  52 ++
 arch/mips/mach-jz47xx/start.S                 |  99 ++++
 board/imgtec/ci20/Kconfig                     |  15 +
 board/imgtec/ci20/MAINTAINERS                 |   6 +
 board/imgtec/ci20/Makefile                    |   5 +
 board/imgtec/ci20/README                      |  10 +
 board/imgtec/ci20/ci20.c                      | 362 ++++++++++++
 configs/ci20_defconfig                        |  46 ++
 drivers/misc/Kconfig                          |   6 +
 drivers/misc/Makefile                         |   1 +
 drivers/misc/jz4780_efuse.c                   | 104 ++++
 drivers/mmc/Kconfig                           |   6 +
 drivers/mmc/Makefile                          |   1 +
 drivers/mmc/jz_mmc.                           |   0
 drivers/mmc/jz_mmc.c                          | 489 ++++++++++++++++
 include/configs/ci20.h                        |  73 +++
 include/dt-bindings/clock/jz4780-cgu.h        |  88 +++
 37 files changed, 3516 insertions(+)
 create mode 100644 arch/mips/dts/ci20.dts
 create mode 100644 arch/mips/dts/jz4780.dtsi
 create mode 100644 arch/mips/include/asm/spl.h
 create mode 100644 arch/mips/mach-jz47xx/Kconfig
 create mode 100644 arch/mips/mach-jz47xx/Makefile
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_gpio.h
 create mode 100644 arch/mips/mach-jz47xx/jz4780/Makefile
 create mode 100644 arch/mips/mach-jz47xx/jz4780/TODO
 create mode 100644 arch/mips/mach-jz47xx/jz4780/gpio.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/jz4780.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/pll.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/reset.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/sdram.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/timer.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds
 create mode 100644 arch/mips/mach-jz47xx/start.S
 create mode 100644 board/imgtec/ci20/Kconfig
 create mode 100644 board/imgtec/ci20/MAINTAINERS
 create mode 100644 board/imgtec/ci20/Makefile
 create mode 100644 board/imgtec/ci20/README
 create mode 100644 board/imgtec/ci20/ci20.c
 create mode 100644 configs/ci20_defconfig
 create mode 100644 drivers/misc/jz4780_efuse.c
 create mode 100644 drivers/mmc/jz_mmc.
 create mode 100644 drivers/mmc/jz_mmc.c
 create mode 100644 include/configs/ci20.h
 create mode 100644 include/dt-bindings/clock/jz4780-cgu.h

Signature · 1 line

2.20.0

Ezequiel Garcia

author

2018-12-16 22:25 UTC #1 lore raw

PATCH v3 1/5 misc: Add JZ47xx efuse driver

From: Paul Burton <[email protected]>

Add driver for the efuse block in the JZ47xx SOC.

Cc Daniel Schwierzeck <[email protected]>

Signed-off-by Paul Burton <[email protected]>

Signed-off-by Marek Vasut <[email protected]>

Signed-off-by Ezequiel Garcia <[email protected]>

---
 drivers/misc/Kconfig        |   6 +++
 drivers/misc/Makefile       |   1 +
 drivers/misc/jz4780_efuse.c | 104 ++++++++++++++++++++++++++++++++++++
 3 files changed, 111 insertions(+)
 create mode 100644 drivers/misc/jz4780_efuse.c

drivers/misc/Kconfig +6 -0

index 48febc47d263..704c8dd1955f 100644
@@ -120,6 +120,12 @@ config FSL_SEC_MON
 	  Security Monitor can be transitioned on any security failures,
 	  like software violations or hardware security violations.
 
+config JZ4780_EFUSE
+	bool "Ingenic JZ4780 eFUSE support"
+	depends on ARCH_JZ47XX
+	help
+	  This selects support for the eFUSE on Ingenic JZ4780 SoCs.
+
 config MXC_OCOTP
 	bool "Enable MXC OCOTP Driver"
 	help

drivers/misc/Makefile +1 -0

index 302d44159274..6bdf5054f475 100644
@@ -62,3 +62,4 @@ obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
 obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
 obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
+obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o

drivers/misc/jz4780_efuse.c new file +104 -0

104 lines not on this page · raw message

Signature · 1 line

2.20.0

Ezequiel Garcia

author

2018-12-16 22:25 UTC #2 lore raw

PATCH v3 2/5 mmc: Add JZ47xx SD/MMC controller driver

In reply to Ezequiel Garcia

From: Paul Burton <[email protected]>

Add driver for the JZ47xx MSC controller.

Cc Daniel Schwierzeck <[email protected]>

Signed-off-by Paul Burton <[email protected]>

Signed-off-by Marek Vasut <[email protected]>

Signed-off-by Ezequiel Garcia <[email protected]>

---
 drivers/mmc/Kconfig  |   6 +
 drivers/mmc/Makefile |   1 +
 drivers/mmc/jz_mmc.  |   0
 drivers/mmc/jz_mmc.c | 489 +++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 496 insertions(+)
 create mode 100644 drivers/mmc/jz_mmc.
 create mode 100644 drivers/mmc/jz_mmc.c

drivers/mmc/Kconfig +6 -0

index fbd13964a084..496b2cba6405 100644
@@ -332,6 +332,12 @@ config MMC_BCM2835
 
 	  If unsure, say N.
 
+config JZ47XX_MMC
+	bool "Ingenic JZ47xx SD/MMC Host Controller support"
+	depends on ARCH_JZ47XX
+	help
+	  This selects support for the SD Card Controller on Ingenic JZ47xx SoCs.
+
 config MMC_SANDBOX
 	bool "Sandbox MMC support"
 	depends on SANDBOX

drivers/mmc/Makefile +1 -0

index 801a26d82192..7892c468f05c 100644
@@ -40,6 +40,7 @@ obj-$(CONFIG_MMC_SANDBOX)		+= sandbox_mmc.o
 obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
 obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
 obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
+obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
 
 # SDHCI
 obj-$(CONFIG_MMC_SDHCI)			+= sdhci.o

drivers/mmc/jz_mmc. new file +0 -0

new file mode 100644
index 000000000000..e69de29bb2d1

drivers/mmc/jz_mmc.c new file +489 -0

489 lines not on this page · raw message

Signature · 1 line

2.20.0

Ezequiel Garcia

author

2018-12-16 22:25 UTC #3 lore raw

PATCH v3 3/5 mips: Add SPL header

In reply to Ezequiel Garcia

From: Paul Burton <[email protected]>

Add header with SPL boot mode and type definitions.

Cc Daniel Schwierzeck <[email protected]>

Signed-off-by Paul Burton <[email protected]>

Signed-off-by Marek Vasut <[email protected]>

---
 arch/mips/include/asm/spl.h | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 arch/mips/include/asm/spl.h

arch/mips/include/asm/spl.h new file +35 -0

new file mode 100644
index 000000000000..01baab606606
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2012
+ * Texas Instruments, <www.ti.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef	_ASM_SPL_H_
+#define	_ASM_SPL_H_
+
+enum {
+	BOOT_DEVICE_RAM,
+	BOOT_DEVICE_MMC1,
+	BOOT_DEVICE_MMC2,
+	BOOT_DEVICE_MMC2_2,
+	BOOT_DEVICE_NAND,
+	BOOT_DEVICE_ONENAND,
+	BOOT_DEVICE_NOR,
+	BOOT_DEVICE_UART,
+	BOOT_DEVICE_SPI,
+	BOOT_DEVICE_USB,
+	BOOT_DEVICE_SATA,
+	BOOT_DEVICE_I2C,
+	BOOT_DEVICE_BOARD,
+	BOOT_DEVICE_NONE
+};
+
+/* Linker symbols. */
+extern char __bss_start[];
+extern ulong __bss_end;
+
+#ifndef CONFIG_DM
+extern gd_t gdata;
+#endif
+
+#endif

Signature · 1 line

2.20.0

Ezequiel Garcia

author

2018-12-16 22:25 UTC #4 lore raw

PATCH v3 4/5 mips: jz47xx: Add JZ4780 SoC support

In reply to Ezequiel Garcia

From: Paul Burton <[email protected]>

Add initial support for the Ingenic JZ47xx MIPS SoC.

Cc Daniel Schwierzeck <[email protected]>

Signed-off-by Paul Burton <[email protected]>

Signed-off-by Marek Vasut <[email protected]>

Signed-off-by Ezequiel Garcia <[email protected]>

---
 MAINTAINERS                                   |   6 +
 arch/mips/Kconfig                             |   7 +
 arch/mips/Makefile                            |   1 +
 arch/mips/dts/jz4780.dtsi                     | 162 ++++++
 arch/mips/mach-jz47xx/Kconfig                 |  15 +
 arch/mips/mach-jz47xx/Makefile                |   7 +
 arch/mips/mach-jz47xx/include/mach/jz4780.h   | 103 ++++
 .../mach-jz47xx/include/mach/jz4780_dram.h    | 456 +++++++++++++++
 .../mach-jz47xx/include/mach/jz4780_gpio.h    |  12 +
 arch/mips/mach-jz47xx/jz4780/Makefile         |   5 +
 arch/mips/mach-jz47xx/jz4780/TODO             |   4 +
 arch/mips/mach-jz47xx/jz4780/gpio.c           |  39 ++
 arch/mips/mach-jz47xx/jz4780/jz4780.c         |  82 +++
 arch/mips/mach-jz47xx/jz4780/pll.c            | 527 ++++++++++++++++++
 arch/mips/mach-jz47xx/jz4780/reset.c          |  53 ++
 arch/mips/mach-jz47xx/jz4780/sdram.c          | 270 +++++++++
 arch/mips/mach-jz47xx/jz4780/timer.c          | 237 ++++++++
 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds   |  52 ++
 arch/mips/mach-jz47xx/start.S                 |  99 ++++
 include/dt-bindings/clock/jz4780-cgu.h        |  88 +++
 20 files changed, 2225 insertions(+)
 create mode 100644 arch/mips/dts/jz4780.dtsi
 create mode 100644 arch/mips/mach-jz47xx/Kconfig
 create mode 100644 arch/mips/mach-jz47xx/Makefile
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_gpio.h
 create mode 100644 arch/mips/mach-jz47xx/jz4780/Makefile
 create mode 100644 arch/mips/mach-jz47xx/jz4780/TODO
 create mode 100644 arch/mips/mach-jz47xx/jz4780/gpio.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/jz4780.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/pll.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/reset.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/sdram.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/timer.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds
 create mode 100644 arch/mips/mach-jz47xx/start.S
 create mode 100644 include/dt-bindings/clock/jz4780-cgu.h

MAINTAINERS +6 -0

index 0cec39c542db..3809a12f9ee7 100644
@@ -512,6 +512,12 @@ S:	Maintained
 T:	git git://git.denx.de/u-boot-mips.git
 F:	arch/mips/
 
+MIPS JZ4780
+M:	Ezequiel Garcia <[email protected]>
+S:	Maintained
+T:	git git://git.denx.de/u-boot-mips.git
+F:	arch/mips/mach-jz47xx/
+
 MMC
 M:	Jaehoon Chung <[email protected]>
 S:	Maintained

arch/mips/Kconfig +7 -0

index 1b1b1d7d0031..44b25460b8cc 100644
@@ -88,6 +88,12 @@ config ARCH_MT7620
 	select SUPPORTS_LITTLE_ENDIAN
 	select SYSRESET
 
+config ARCH_JZ47XX
+	bool "Support Ingenic JZ47xx"
+	select SUPPORT_SPL
+	select OF_CONTROL
+	select DM
+
 config MACH_PIC32
 	bool "Support Microchip PIC32"
 	select DM

@@ -139,6 +145,7 @@ source "board/micronas/vct/Kconfig"
 source "board/qemu-mips/Kconfig"
 source "arch/mips/mach-ath79/Kconfig"
 source "arch/mips/mach-bmips/Kconfig"
+source "arch/mips/mach-jz47xx/Kconfig"
 source "arch/mips/mach-pic32/Kconfig"
 source "arch/mips/mach-mt7620/Kconfig"

arch/mips/Makefile +1 -0

index 802244a06e5d..a294e9b1e8b9 100644
@@ -13,6 +13,7 @@ libs-y += arch/mips/lib/
 
 machine-$(CONFIG_ARCH_ATH79) += ath79
 machine-$(CONFIG_ARCH_BMIPS) += bmips
+machine-$(CONFIG_ARCH_JZ47XX) += jz47xx
 machine-$(CONFIG_MACH_PIC32) += pic32
 machine-$(CONFIG_ARCH_MT7620) += mt7620

arch/mips/dts/jz4780.dtsi new file +162 -0

162 lines not on this page · raw message

arch/mips/mach-jz47xx/Kconfig new file +15 -0

new file mode 100644
index 000000000000..cd6944cfc252
@@ -0,0 +1,15 @@
+menu "Ingenic JZ47xx platforms"
+	depends on ARCH_JZ47XX
+
+config SYS_SOC
+	default "jz47xx"
+
+config SOC_JZ4780
+	bool
+	select SUPPORTS_LITTLE_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select SUPPORTS_CPU_MIPS32_R2
+	help
+	  Support for Ingenic JZ4780 family SoCs.
+
+endmenu

arch/mips/mach-jz47xx/Makefile new file +7 -0

new file mode 100644
index 000000000000..5eee9acf559d
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+extra-$(CONFIG_SPL_BUILD)	:= start.o
+
+obj-$(CONFIG_SOC_JZ4780)	+= jz4780/

arch/mips/mach-jz47xx/include/mach/jz4780.h new file +103 -0

103 lines not on this page · raw message

arch/mips/mach-jz47xx/include/mach/jz4780_dram.h new file +456 -0

456 lines not on this page · raw message

arch/mips/mach-jz47xx/include/mach/jz4780_gpio.h new file +12 -0

new file mode 100644
index 000000000000..19a39174349c
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __JZ4780_GPIO_H__
+#define __JZ4780_GPIO_H__
+
+#define JZ_GPIO(bank, pin) ((32 * (bank)) + (pin))
+
+int jz47xx_gpio_get_value(unsigned gpio);
+void jz47xx_gpio_direction_input(unsigned int gpio);
+void jz47xx_gpio_direction_output(unsigned int gpio, int value);
+
+#endif

arch/mips/mach-jz47xx/jz4780/Makefile new file +5 -0

new file mode 100644
index 000000000000..c9d5bf69b1a6
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y := gpio.o jz4780.o pll.o reset.o sdram.o timer.o

arch/mips/mach-jz47xx/jz4780/TODO new file +4 -0

new file mode 100644
index 000000000000..99ad6225b0cd
@@ -0,0 +1,4 @@
+- dm gpio driver
+- ethernet driver for the dm9000
+- reduce the hundreds of definitions of register addresses to the ones really needed in assembly or SPL.
+- define the remaining register base addresses as physical addresses and establish a mapping with ioremap_nocache()

arch/mips/mach-jz47xx/jz4780/gpio.c new file +39 -0

new file mode 100644
index 000000000000..43e4b3201d16
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <mach/jz4780.h>
+
+int jz47xx_gpio_get_value(unsigned gpio)
+{
+	void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
+	int port = gpio / 32;
+	int pin = gpio % 32;
+
+	return readl(gpio_regs + GPIO_PXPIN(port)) & BIT(pin);
+}
+
+void jz47xx_gpio_direction_input(unsigned int gpio)
+{
+	void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
+	int port = gpio / 32;
+	int pin = gpio % 32;
+
+	writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));
+	writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));
+	writel(BIT(pin), gpio_regs + GPIO_PXPAT1S(port));
+}
+
+void jz47xx_gpio_direction_output(unsigned int gpio, int value)
+{
+	void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
+	int port = gpio / 32;
+	int pin = gpio % 32;
+
+	writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));
+	writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));
+	writel(BIT(pin), gpio_regs + GPIO_PXPAT1C(port));
+	writel(BIT(pin), gpio_regs +
+			 (value ? GPIO_PXPAT0S(port) : GPIO_PXPAT0C(port)));
+}

arch/mips/mach-jz47xx/jz4780/jz4780.c new file +82 -0

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arch/mips/mach-jz47xx/jz4780/pll.c new file +527 -0

527 lines not on this page · raw message

arch/mips/mach-jz47xx/jz4780/reset.c new file +53 -0

53 lines not on this page · raw message

arch/mips/mach-jz47xx/jz4780/sdram.c new file +270 -0

270 lines not on this page · raw message

arch/mips/mach-jz47xx/jz4780/timer.c new file +237 -0

237 lines not on this page · raw message

arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds new file +52 -0

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arch/mips/mach-jz47xx/start.S new file +99 -0

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include/dt-bindings/clock/jz4780-cgu.h new file +88 -0

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Signature · 1 line

2.20.0

Ezequiel Garcia

author

2018-12-16 22:25 UTC #5 lore raw

PATCH v3 5/5 mips: jz47xx: Add Creator CI20 platform

In reply to Ezequiel Garcia

From: Paul Burton <[email protected]>

Add support for the Creator CI20 platform based on the JZ4780 SoC.

Cc Daniel Schwierzeck <[email protected]>

Signed-off-by Paul Burton <[email protected]>

Signed-off-by Marek Vasut <[email protected]>

Signed-off-by Ezequiel Garcia <[email protected]>

---
 arch/mips/dts/Makefile        |   1 +
 arch/mips/dts/ci20.dts        | 120 +++++++++++
 arch/mips/mach-jz47xx/Kconfig |  11 ++
 board/imgtec/ci20/Kconfig     |  15 ++
 board/imgtec/ci20/MAINTAINERS |   6 +
 board/imgtec/ci20/Makefile    |   5 +
 board/imgtec/ci20/README      |  10 +
 board/imgtec/ci20/ci20.c      | 362 ++++++++++++++++++++++++++++++++++
 configs/ci20_defconfig        |  46 +++++
 include/configs/ci20.h        |  73 +++++++
 10 files changed, 649 insertions(+)
 create mode 100644 arch/mips/dts/ci20.dts
 create mode 100644 board/imgtec/ci20/Kconfig
 create mode 100644 board/imgtec/ci20/MAINTAINERS
 create mode 100644 board/imgtec/ci20/Makefile
 create mode 100644 board/imgtec/ci20/README
 create mode 100644 board/imgtec/ci20/ci20.c
 create mode 100644 configs/ci20_defconfig
 create mode 100644 include/configs/ci20.h

arch/mips/dts/Makefile +1 -0

index b447141f8717..647d2bf0d53b 100644
@@ -16,6 +16,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
 dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
 dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
+dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
 
 targets += $(dtb-y)

arch/mips/dts/ci20.dts new file +120 -0

120 lines not on this page · raw message

arch/mips/mach-jz47xx/Kconfig +11 -0

index cd6944cfc252..dcaac0162866 100644
@@ -12,4 +12,15 @@ config SOC_JZ4780
 	help
 	  Support for Ingenic JZ4780 family SoCs.
 
+choice
+	prompt "Board select"
+
+config TARGET_JZ4780_CI20
+	bool "Creator CI20 Reference Board"
+	select SOC_JZ4780
+
+endchoice
+
+source "board/imgtec/ci20/Kconfig"
+
 endmenu

board/imgtec/ci20/Kconfig new file +15 -0

new file mode 100644
index 000000000000..82bf65d64f1e
@@ -0,0 +1,15 @@
+if TARGET_JZ4780_CI20
+
+config SYS_BOARD
+	default "ci20"
+
+config SYS_VENDOR
+	default "imgtec"
+
+config SYS_CONFIG_NAME
+	default "ci20"
+
+config SYS_TEXT_BASE
+	default 0x80000000
+
+endif

board/imgtec/ci20/MAINTAINERS new file +6 -0

new file mode 100644
index 000000000000..25971c31a789
@@ -0,0 +1,6 @@
+Creator CI20 BOARD
+M:      Ezequiel Garcia <[email protected]>
+S:      Maintained
+F:      board/imgtec/ci20/
+F:      include/configs/ci20.h
+F:      configs/ci20_defconfig

board/imgtec/ci20/Makefile new file +5 -0

new file mode 100644
index 000000000000..8c00081e660b
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y := ci20.o

board/imgtec/ci20/README new file +10 -0

new file mode 100644
index 000000000000..07d89d7e2b30
@@ -0,0 +1,10 @@
+CI20 U-Boot
+
+Installation to an SD card:
+  Repartition your card with an MBR such that the first partition starts at an
+  offset of no less than 270KB. Then install U-Boot SPL & the full U-Boot image
+  to the card like so:
+
+    dd if=spl/u-boot-spl.bin of=/dev/sdX obs=512 seek=1
+    dd if=u-boot-dtb.img of=/dev/sdX obs=1K seek=14
+    sync

board/imgtec/ci20/ci20.c new file +362 -0

362 lines not on this page · raw message

configs/ci20_defconfig new file +46 -0

46 lines not on this page · raw message

include/configs/ci20.h new file +73 -0

73 lines not on this page · raw message

Signature · 1 line

2.20.0

Daniel Schwierzeck

2018-12-18 00:05 UTC #6 lore raw

v3 cover Add support for MIPS Creator CI20

In reply to Ezequiel Garcia

Am 16.12.18 um 23:25 schrieb Ezequiel Garcia:

Quoted 30 lines

A new round, addressing feedback from Daniel.
Daniel: do you think this is acceptable as a first submission?
v3:
* Cleanup SoC reset logic.
* Move gpio driver to SoC specific code, to be used by SPL. A proper dm gpio driver will be added later.
* Cleaned up SPDX.
* Added myself as JZ4780 maintainer.
* Added TODO file.
v2:
* Replaced infinite while loop with wait_for_bit.
* Added a MAINTAINERS file. If anyone wants to co-maintain this, please let me know.
This is based on master and has been tested by SD-card booting both U-Boot and Linux. Booting Linux via TFTP was also tested.
I've pushed a branch to https://github.com/ezequielgarcia/u-boot/tree/ci20-v3
and started travis.
Note that Paul's contributions are recorded using his imgtec.com mail although it's no longer valid, and that we will rely on mailmap to map it to mips.com.
It would be terrific to fit this on the next release.

Quoted 8 lines

Thanks!
Paul Burton (5):
misc: Add JZ47xx efuse driver
mmc: Add JZ47xx SD/MMC controller driver
mips: Add SPL header
mips: jz47xx: Add JZ4780 SoC support
mips: jz47xx: Add Creator CI20 platform

applied to u-boot-mips, thanks.

I fixed some additional SPDX license identifiers because not all files got updated ;) I also fixed some minor checkpatch.pl issues.

I renamed the defconfig to ci20_mmc to clearly indicate the MMC boot mode in case someone wants to add boot from NAND or USB later. The latter could be useful for developing. I hope you don't mind ;)

I also moved CONFIG_MISC_INIT_R from ci20.h to defconfig as this option has been converted to Kconfig some time ago. Finally I enabled cmd_dm to quickly test current DM integration.

The updated series still booted on my rev1 board.

Maybe one of the next improvements should be to enable CONFIG_DISTRO_DEFAULTS and CONFIG_MIPS_BOOT_FDT.

Signature · 1 line

- Daniel

Ezequiel Garcia

author

2018-12-18 14:25 UTC #7 lore raw

v3 cover Add support for MIPS Creator CI20

Quoted 41 lines · Daniel Schwierzeck

Am 16.12.18 um 23:25 schrieb Ezequiel Garcia:
Quoted 30 lines
A new round, addressing feedback from Daniel.
Daniel: do you think this is acceptable as a first submission?
v3:
* Cleanup SoC reset logic.
* Move gpio driver to SoC specific code, to be used by SPL. A proper dm gpio driver will be added later.
* Cleaned up SPDX.
* Added myself as JZ4780 maintainer.
* Added TODO file.
v2:
* Replaced infinite while loop with wait_for_bit.
* Added a MAINTAINERS file. If anyone wants to co-maintain this, please let me know.
This is based on master and has been tested by SD-card booting both U-Boot and Linux. Booting Linux via TFTP was also tested.
I've pushed a branch to https://github.com/ezequielgarcia/u-boot/tree/ci20-v3
and started travis.
Note that Paul's contributions are recorded using his imgtec.com mail although it's no longer valid, and that we will rely on mailmap to map it to mips.com.
It would be terrific to fit this on the next release.
Quoted 8 lines
Thanks!
Paul Burton (5):
misc: Add JZ47xx efuse driver
mmc: Add JZ47xx SD/MMC controller driver
mips: Add SPL header
mips: jz47xx: Add JZ4780 SoC support
mips: jz47xx: Add Creator CI20 platform

Quoted 9 lines

applied to u-boot-mips, thanks.
I fixed some additional SPDX license identifiers because not all files got updated ;) I also fixed some minor checkpatch.pl issues.
I renamed the defconfig to ci20_mmc to clearly indicate the MMC boot mode in case someone wants to add boot from NAND or USB later. The latter could be useful for developing. I hope you don't mind ;)

Great. I had the intention to rename the defconfig, but then I forgot about it, so thanks.

Quoted 4 lines

I also moved CONFIG_MISC_INIT_R from ci20.h to defconfig as this option has been converted to Kconfig some time ago. Finally I enabled cmd_dm to quickly test current DM integration.

Cool.

Quoted 5 lines

The updated series still booted on my rev1 board.
Maybe one of the next improvements should be to enable CONFIG_DISTRO_DEFAULTS and CONFIG_MIPS_BOOT_FDT.

OK. Let me take a look at that.

Thanks,
Ezequiel