Skip to contentSkip to conversation

ARM: dts: imx6ul: phycore: Add phyCORE i.MX6 UL with eMMC

PATCH Superseded Yunus Bas 1 participant 1 message Sep 18, 2020

Subsystems (3)
Arm (32-bit) Arm i.MX and Layerscape Arm/actions semi architecture

v1 of 2 Superseded Latest is v2 →

lore
Share & tools
lore

Yunus Bas

author
#0 lore raw

PATCH 1/1 ARM: dts: imx6ul: phycore: Add phyCORE i.MX6 UL with eMMC

Add a phyCORE-i.MX 6UL with eMMC. It has following features:
- i.MX 6UL
- 512 MB RAM
- eMMC
- 10/100 MBits Ethernet
- USB OTG
- USB Host

Signed-off-by Yunus Bas <[email protected]>
---
 arch/arm/boards/phytec-som-imx6/lowlevel.c    |  1 +
 arch/arm/dts/Makefile                         |  1 +
 .../dts/imx6ul-phytec-phycore-som-emmc.dts    | 43 +++++++++++++++++++
 images/Makefile.imx                           |  2 +
 4 files changed, 47 insertions(+)
 create mode 100644 arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts
arch/arm/boards/phytec-som-imx6/lowlevel.c +1 -0
index 407115c2a..62a1c8de7 100644
@@ -110,6 +110,7 @@ PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_so
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true);
 
+PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_emmc_512mb, imx6ul_phytec_phycore_som_emmc, SZ_512M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_nand_512mb, imx6ul_phytec_phycore_som_nand, SZ_512M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_lc_nand_256mb, imx6ull_phytec_phycore_som_lc_nand, SZ_256M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_nand_512mb, imx6ull_phytec_phycore_som_nand, SZ_512M, false);
arch/arm/dts/Makefile +1 -0
index af061bd29..37e0f07b9 100644
@@ -67,6 +67,7 @@ lwl-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \
 				imx6dl-phytec-phycore-som-emmc.dtb.o \
 				imx6dl-phytec-phycore-som-lc-emmc.dtb.o \
 				imx6ul-phytec-phycore-som-nand.dtb.o \
+				imx6ul-phytec-phycore-som-emmc.dtb.o \
 				imx6ull-phytec-phycore-som-lc-nand.dtb.o \
 				imx6ull-phytec-phycore-som-nand.dtb.o \
 				imx6ull-phytec-phycore-som-emmc.dtb.o
arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts new file +43 -0

43 lines not on this page · raw message

images/Makefile.imx +2 -0
index 7b24e5fee..2327b8a0b 100644
@@ -346,6 +346,8 @@ $(call build_imx_habv4img, CONFIG_MACH_GRINN_LITEBOARD, start_imx6ul_liteboard_5
 
 $(call build_imx_habv4img, CONFIG_MACH_NXP_IMX6ULL_EVK, start_nxp_imx6ull_evk, nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk, nxp-imx6ull-evk)
 
+$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_emmc_512mb, phytec-som-imx6/flash-header-phytec-pcl063-512mb, phytec-phycore-imx6ul-emmc-512mb)
+
 $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_nand_512mb, phytec-som-imx6/flash-header-phytec-pcl063-512mb, phytec-phycore-imx6ul-nand-512mb)
 
 $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ull_som_lc_nand_256mb, phytec-som-imx6/flash-header-phytec-pcl063-256mb, phytec-phycore-imx6ull-lc-nand-256mb)
Signature · 7 lines
2.17.1


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox