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ARM: dts: imx6ul: phycore: Add phyCORE i.MX6 UL with eMMC

PATCH Applied Yunus Bas 2 participants 4 messages Oct 1, 2020 – Oct 7, 2020

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Arm (32-bit) Arm i.MX and Layerscape Arm/actions semi architecture
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Yunus Bas

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#0 lore raw

PATCH v2 1/1 ARM: dts: imx6ul: phycore: Add phyCORE i.MX6 UL with eMMC

Add a phyCORE-i.MX 6UL with eMMC. It has following features:
- i.MX 6UL
- 512 MB RAM
- eMMC
- 10/100 MBits Ethernet
- USB OTG
- USB Host

Signed-off-by Yunus Bas <[email protected]>

---
Changes in v2:
- Added missing include for the FIT-Image verification

---
 arch/arm/boards/phytec-som-imx6/lowlevel.c    |  1 +
 arch/arm/dts/Makefile                         |  1 +
 .../dts/imx6ul-phytec-phycore-som-emmc.dts    | 45 +++++++++++++++++++
 images/Makefile.imx                           |  2 +
 4 files changed, 49 insertions(+)
 create mode 100644 arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts
arch/arm/boards/phytec-som-imx6/lowlevel.c +1 -0
index 407115c2a..62a1c8de7 100644
@@ -110,6 +110,7 @@ PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_so
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true);
 
+PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_emmc_512mb, imx6ul_phytec_phycore_som_emmc, SZ_512M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_nand_512mb, imx6ul_phytec_phycore_som_nand, SZ_512M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_lc_nand_256mb, imx6ull_phytec_phycore_som_lc_nand, SZ_256M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_nand_512mb, imx6ull_phytec_phycore_som_nand, SZ_512M, false);
arch/arm/dts/Makefile +1 -0
index af061bd29..37e0f07b9 100644
@@ -67,6 +67,7 @@ lwl-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \
 				imx6dl-phytec-phycore-som-emmc.dtb.o \
 				imx6dl-phytec-phycore-som-lc-emmc.dtb.o \
 				imx6ul-phytec-phycore-som-nand.dtb.o \
+				imx6ul-phytec-phycore-som-emmc.dtb.o \
 				imx6ull-phytec-phycore-som-lc-nand.dtb.o \
 				imx6ull-phytec-phycore-som-nand.dtb.o \
 				imx6ull-phytec-phycore-som-emmc.dtb.o
arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts new file +45 -0

45 lines not on this page · raw message

images/Makefile.imx +2 -0
index 7b24e5fee..2327b8a0b 100644
@@ -346,6 +346,8 @@ $(call build_imx_habv4img, CONFIG_MACH_GRINN_LITEBOARD, start_imx6ul_liteboard_5
 
 $(call build_imx_habv4img, CONFIG_MACH_NXP_IMX6ULL_EVK, start_nxp_imx6ull_evk, nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk, nxp-imx6ull-evk)
 
+$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_emmc_512mb, phytec-som-imx6/flash-header-phytec-pcl063-512mb, phytec-phycore-imx6ul-emmc-512mb)
+
 $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_nand_512mb, phytec-som-imx6/flash-header-phytec-pcl063-512mb, phytec-phycore-imx6ul-nand-512mb)
 
 $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ull_som_lc_nand_256mb, phytec-som-imx6/flash-header-phytec-pcl063-256mb, phytec-phycore-imx6ull-lc-nand-256mb)
Signature · 7 lines
2.17.1


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#1 lore raw
Quoted 8 lines · Yunus Bas

Add a phyCORE-i.MX 6UL with eMMC. It has following features:
- i.MX 6UL
- 512 MB RAM
- eMMC
- 10/100 MBits Ethernet
- USB OTG
- USB Host

Quoted 5 lines
Signed-off-by Yunus Bas <[email protected]>

---
Changes in v2:
- Added missing include for the FIT-Image verification
---

Applied, thanks

Sascha

Quoted 104 lines
 arch/arm/boards/phytec-som-imx6/lowlevel.c    |  1 +
 arch/arm/dts/Makefile                         |  1 +
 .../dts/imx6ul-phytec-phycore-som-emmc.dts    | 45 +++++++++++++++++++
 images/Makefile.imx                           |  2 +
 4 files changed, 49 insertions(+)
 create mode 100644 arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts
arch/arm/boards/phytec-som-imx6/lowlevel.c +1 -0
index 407115c2a..62a1c8de7 100644
@@ -110,6 +110,7 @@ PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_so
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true);
 
+PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_emmc_512mb, imx6ul_phytec_phycore_som_emmc, SZ_512M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_nand_512mb, imx6ul_phytec_phycore_som_nand, SZ_512M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_lc_nand_256mb, imx6ull_phytec_phycore_som_lc_nand, SZ_256M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_nand_512mb, imx6ull_phytec_phycore_som_nand, SZ_512M, false);
arch/arm/dts/Makefile +1 -0
index af061bd29..37e0f07b9 100644
@@ -67,6 +67,7 @@ lwl-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \
 				imx6dl-phytec-phycore-som-emmc.dtb.o \
 				imx6dl-phytec-phycore-som-lc-emmc.dtb.o \
 				imx6ul-phytec-phycore-som-nand.dtb.o \
+				imx6ul-phytec-phycore-som-emmc.dtb.o \
 				imx6ull-phytec-phycore-som-lc-nand.dtb.o \
 				imx6ull-phytec-phycore-som-nand.dtb.o \
 				imx6ull-phytec-phycore-som-emmc.dtb.o
arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts new file +45 -0
new file mode 100644
index 000000000..7d29c329a
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2020 PHYTEC Messtechnik GmbH
+ * Author: Yunus Bas <[email protected]>
+ */
+
+/dts-v1/;
+#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY
+#include CONFIG_BOOTM_FITIMAGE_PUBKEY
+#endif
+#include <arm/imx6ul.dtsi>
+#include "imx6ul-phytec-phycore-som.dtsi"
+
+/ {
+	model = "PHYTEC phyCORE-i.MX6 Ultra Light SOM with eMMC";
+	compatible = "phytec,imx6ul-pcl063-emmc", "fsl,imx6ul";
+};
+
+&fec1 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&usdhc1 {
+	status = "okay";
+};
+
+&usdhc2 {
+	status = "okay";
+};
+
+&usbotg1 {
+	status = "okay";
+};
+
+&usbotg2 {
+	status = "okay";
+};
images/Makefile.imx +2 -0
index 7b24e5fee..2327b8a0b 100644
@@ -346,6 +346,8 @@ $(call build_imx_habv4img, CONFIG_MACH_GRINN_LITEBOARD, start_imx6ul_liteboard_5
 
 $(call build_imx_habv4img, CONFIG_MACH_NXP_IMX6ULL_EVK, start_nxp_imx6ull_evk, nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk, nxp-imx6ull-evk)
 
+$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_emmc_512mb, phytec-som-imx6/flash-header-phytec-pcl063-512mb, phytec-phycore-imx6ul-emmc-512mb)
+
 $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_nand_512mb, phytec-som-imx6/flash-header-phytec-pcl063-512mb, phytec-phycore-imx6ul-nand-512mb)
 
 $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ull_som_lc_nand_256mb, phytec-som-imx6/flash-header-phytec-pcl063-256mb, phytec-phycore-imx6ull-lc-nand-256mb)
Signature · 7 lines
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Signature · 9 lines
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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#2 lore raw
In reply to Yunus Bas
Quoted 100 lines · Yunus Bas

Add a phyCORE-i.MX 6UL with eMMC. It has following features:
- i.MX 6UL
- 512 MB RAM
- eMMC
- 10/100 MBits Ethernet
- USB OTG
- USB Host

Signed-off-by Yunus Bas <[email protected]>

---
Changes in v2:
- Added missing include for the FIT-Image verification

---
 arch/arm/boards/phytec-som-imx6/lowlevel.c    |  1 +
 arch/arm/dts/Makefile                         |  1 +
 .../dts/imx6ul-phytec-phycore-som-emmc.dts    | 45 +++++++++++++++++++
 images/Makefile.imx                           |  2 +
 4 files changed, 49 insertions(+)
 create mode 100644 arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts
arch/arm/boards/phytec-som-imx6/lowlevel.c +1 -0
index 407115c2a..62a1c8de7 100644
@@ -110,6 +110,7 @@ PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_so
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true);
 
+PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_emmc_512mb, imx6ul_phytec_phycore_som_emmc, SZ_512M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_nand_512mb, imx6ul_phytec_phycore_som_nand, SZ_512M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_lc_nand_256mb, imx6ull_phytec_phycore_som_lc_nand, SZ_256M, false);
 PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_nand_512mb, imx6ull_phytec_phycore_som_nand, SZ_512M, false);
arch/arm/dts/Makefile +1 -0
index af061bd29..37e0f07b9 100644
@@ -67,6 +67,7 @@ lwl-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \
 				imx6dl-phytec-phycore-som-emmc.dtb.o \
 				imx6dl-phytec-phycore-som-lc-emmc.dtb.o \
 				imx6ul-phytec-phycore-som-nand.dtb.o \
+				imx6ul-phytec-phycore-som-emmc.dtb.o \
 				imx6ull-phytec-phycore-som-lc-nand.dtb.o \
 				imx6ull-phytec-phycore-som-nand.dtb.o \
 				imx6ull-phytec-phycore-som-emmc.dtb.o
arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts new file +45 -0
new file mode 100644
index 000000000..7d29c329a
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2020 PHYTEC Messtechnik GmbH
+ * Author: Yunus Bas <[email protected]>
+ */
+
+/dts-v1/;
+#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY
+#include CONFIG_BOOTM_FITIMAGE_PUBKEY
+#endif
+#include <arm/imx6ul.dtsi>
+#include "imx6ul-phytec-phycore-som.dtsi"
+
+/ {
+	model = "PHYTEC phyCORE-i.MX6 Ultra Light SOM with eMMC";
+	compatible = "phytec,imx6ul-pcl063-emmc", "fsl,imx6ul";
+};
+
+&fec1 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&usdhc1 {
+	status = "okay";
+};
+
+&usdhc2 {
+	status = "okay";
+};
+
+&usbotg1 {
+	status = "okay";
+};
+
+&usbotg2 {
+	status = "okay";
+};
images/Makefile.imx +0 -0
index 7b24e5fee..2327b8a0b 100644

images/Makefile.imx $(call build_imx_habv4img, CONFIG_MACH_GRINN_LITEBOARD, start_imx6ul_liteboard_5 · line 350

Quoted 5 lines
images/Makefile.imx +2 -0
@@ -346,6 +346,8 @@ $(call build_imx_habv4img, CONFIG_MACH_GRINN_LITEBOARD, start_imx6ul_liteboard_5
 
 $(call build_imx_habv4img, CONFIG_MACH_NXP_IMX6ULL_EVK, start_nxp_imx6ull_evk, nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk, nxp-imx6ull-evk)
 
+$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_emmc_512mb, phytec-som-imx6/flash-header-phytec-pcl063-512mb, phytec-phycore-imx6ul-emmc-512mb)
+

There is a 'ul' missing for mainline, should be:

phytec-som-imx6/flash-header-phytec-pcl063ul-512mb

I fixed this up here, please check -next branch if the result matches your expectations.

Sascha

Signature · 9 lines
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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author
#3 lore raw

Hi Sascha,

Am 02.10.20 um 09:18 schrieb Sascha Hauer:

Quoted 108 lines · Yunus Bas
Quoted 100 lines

Add a phyCORE-i.MX 6UL with eMMC. It has following features:
- i.MX 6UL
- 512 MB RAM
- eMMC
- 10/100 MBits Ethernet
- USB OTG
- USB Host

Signed-off-by Yunus Bas <[email protected]>

---
Changes in v2:
- Added missing include for the FIT-Image verification

---
  arch/arm/boards/phytec-som-imx6/lowlevel.c    |  1 +
  arch/arm/dts/Makefile                         |  1 +
  .../dts/imx6ul-phytec-phycore-som-emmc.dts    | 45 +++++++++++++++++++
  images/Makefile.imx                           |  2 +
  4 files changed, 49 insertions(+)

create mode 100644 arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts

arch/arm/boards/phytec-som-imx6/lowlevel.c +1 -0
index 407115c2a..62a1c8de7 100644
@@ -110,6 +110,7 @@ PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_so
  PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true);
  PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true);
 
+PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_emmc_512mb, imx6ul_phytec_phycore_som_emmc, SZ_512M, false);
  PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_nand_512mb, imx6ul_phytec_phycore_som_nand, SZ_512M, false);
  PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_lc_nand_256mb, imx6ull_phytec_phycore_som_lc_nand, SZ_256M, false);
  PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_nand_512mb, imx6ull_phytec_phycore_som_nand, SZ_512M, false);
arch/arm/dts/Makefile +1 -0
index af061bd29..37e0f07b9 100644
@@ -67,6 +67,7 @@ lwl-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \
  				imx6dl-phytec-phycore-som-emmc.dtb.o \
  				imx6dl-phytec-phycore-som-lc-emmc.dtb.o \
  				imx6ul-phytec-phycore-som-nand.dtb.o \
+				imx6ul-phytec-phycore-som-emmc.dtb.o \
  				imx6ull-phytec-phycore-som-lc-nand.dtb.o \
  				imx6ull-phytec-phycore-som-nand.dtb.o \
  				imx6ull-phytec-phycore-som-emmc.dtb.o
arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts new file +45 -0
new file mode 100644
index 000000000..7d29c329a
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2020 PHYTEC Messtechnik GmbH
+ * Author: Yunus Bas <[email protected]>
+ */
+
+/dts-v1/;
+#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY
+#include CONFIG_BOOTM_FITIMAGE_PUBKEY
+#endif
+#include <arm/imx6ul.dtsi>
+#include "imx6ul-phytec-phycore-som.dtsi"
+
+/ {
+	model = "PHYTEC phyCORE-i.MX6 Ultra Light SOM with eMMC";
+	compatible = "phytec,imx6ul-pcl063-emmc", "fsl,imx6ul";
+};
+
+&fec1 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&usdhc1 {
+	status = "okay";
+};
+
+&usdhc2 {
+	status = "okay";
+};
+
+&usbotg1 {
+	status = "okay";
+};
+
+&usbotg2 {
+	status = "okay";
+};
images/Makefile.imx +0 -0
index 7b24e5fee..2327b8a0b 100644

images/Makefile.imx $(call build_imx_habv4img, CONFIG_MACH_GRINN_LITEBOARD, start_imx6ul_liteboard_5 · line 350

Quoted 5 lines
images/Makefile.imx +2 -0
@@ -346,6 +346,8 @@ $(call build_imx_habv4img, CONFIG_MACH_GRINN_LITEBOARD, start_imx6ul_liteboard_5
 
  $(call build_imx_habv4img, CONFIG_MACH_NXP_IMX6ULL_EVK, start_nxp_imx6ull_evk, nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk, nxp-imx6ull-evk)
 
+$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_emmc_512mb, phytec-som-imx6/flash-header-phytec-pcl063-512mb, phytec-phycore-imx6ul-emmc-512mb)
+

There is a 'ul' missing for mainline, should be:

Quoted 6 lines

phytec-som-imx6/flash-header-phytec-pcl063ul-512mb

I fixed this up here, please check -next branch if the result matches your expectations.

Sascha

Thank you for the fix. The split-up of flash-header-phytec-pcl063-512mb.imxcfg was sent one day prior to my patch. It was my fault for not noticing.

Yunus

Quoted 1 line
Signature · 16 lines
Yunus Bas
- Software Entwicklung -
Tel.: +49 6131 92 21 0
[email protected]
<http://www.phytec.de/>


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