arm64/arm: dts: qcom: Drop bogus interrupt flags cell on MDSS nodes
Rob Herring
maintainerPATCH v2 1/1 arm64/arm: dts: qcom: Drop bogus interrupt flags cell on MDSS nodes
The MDSS interrupt provider is a single cell, so specifying interrupt flags on the consumers is incorrect.
Signed-off-by Rob Herring <[email protected]>
---
v2:
- Add a bunch of missed cases
--- arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/sdm630.dtsi | 5 ++--- arch/arm64/boot/dts/qcom/sdm660.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 +++--- 6 files changed, 14 insertions(+), 15 deletions(-)
arch/arm/boot/dts/qcom-msm8974.dtsi +2 -2
@@ -1495,7 +1495,7 @@ mdp: mdp@fd900000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 0>; + interrupts = <0>; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>,
@@ -1530,7 +1530,7 @@ dsi0: dsi@fd922800 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
arch/arm64/boot/dts/qcom/msm8996.dtsi +3 -3
@@ -788,7 +788,7 @@ mdp: mdp@901000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>,
@@ -834,7 +834,7 @@ dsi0: dsi@994000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_BYTE0_CLK>,
@@ -904,7 +904,7 @@ hdmi: hdmi-tx@9a0000 { "hdcp_physical"; interrupt-parent = <&mdss>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <8>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_AHB_CLK>,
arch/arm64/boot/dts/qcom/sdm630.dtsi +2 -3
@@ -1453,7 +1453,7 @@ mdp: mdp@c901000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; assigned-clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_VSYNC_CLK>;
@@ -1530,7 +1530,7 @@ dsi0: dsi@c994000 { power-domains = <&rpmpd SDM660_VDDCX>; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
@@ -2487,4 +2487,3 @@ timer { <GIC_PPI 0 0xf08>; }; }; -
arch/arm64/boot/dts/qcom/sdm660.dtsi +1 -1
@@ -163,7 +163,7 @@ dsi1: dsi@c996000 { power-domains = <&rpmpd SDM660_VDDCX>; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
arch/arm64/boot/dts/qcom/sdm845.dtsi +3 -3
@@ -4281,7 +4281,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SDM845_CX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>;
@@ -4333,7 +4333,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
@@ -4405,7 +4405,7 @@ dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,
arch/arm64/boot/dts/qcom/sm8250.dtsi +3 -3
@@ -3200,7 +3200,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SM8250_MMCX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>;
@@ -3252,7 +3252,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
@@ -3325,7 +3325,7 @@ dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,
Signature · 1 line
2.32.0
Quoted 5 lines · Rob Herring
The MDSS interrupt provider is a single cell, so specifying interrupt flags on the consumers is incorrect.
Signed-off-by Rob Herring <[email protected]>
Reviewed-by Dmitry Baryshkov <[email protected]>
Quoted 170 lines
---
v2:
- Add a bunch of missed cases--- arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/sdm630.dtsi | 5 ++--- arch/arm64/boot/dts/qcom/sdm660.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 +++--- 6 files changed, 14 insertions(+), 15 deletions(-)arch/arm/boot/dts/qcom-msm8974.dtsi +2
-2@@ -1495,7 +1495,7 @@ mdp: mdp@fd900000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 0>; + interrupts = <0>; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>,@@ -1530,7 +1530,7 @@ dsi0: dsi@fd922800 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;arch/arm64/boot/dts/qcom/msm8996.dtsi +3
-3@@ -788,7 +788,7 @@ mdp: mdp@901000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>,@@ -834,7 +834,7 @@ dsi0: dsi@994000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_BYTE0_CLK>,@@ -904,7 +904,7 @@ hdmi: hdmi-tx@9a0000 { "hdcp_physical"; interrupt-parent = <&mdss>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <8>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_AHB_CLK>,arch/arm64/boot/dts/qcom/sdm630.dtsi +2
-3@@ -1453,7 +1453,7 @@ mdp: mdp@c901000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; assigned-clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_VSYNC_CLK>;@@ -1530,7 +1530,7 @@ dsi0: dsi@c994000 { power-domains = <&rpmpd SDM660_VDDCX>; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;@@ -2487,4 +2487,3 @@ timer { <GIC_PPI 0 0xf08>; }; }; -arch/arm64/boot/dts/qcom/sdm660.dtsi +1
-1@@ -163,7 +163,7 @@ dsi1: dsi@c996000 { power-domains = <&rpmpd SDM660_VDDCX>; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;arch/arm64/boot/dts/qcom/sdm845.dtsi +3
-3@@ -4281,7 +4281,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SDM845_CX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>;@@ -4333,7 +4333,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,@@ -4405,7 +4405,7 @@ dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,arch/arm64/boot/dts/qcom/sm8250.dtsi +3
-4@@ -3200,7 +3200,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SM8250_MMCX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>;@@ -3252,7 +3252,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,@@ -3325,7 +3325,7 @@ dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, --2.32.0
Signature · 2 lines
With best wishes Dmitry
Marijn Suijten
Reviewed-byQuoted 8 lines · Dmitry Baryshkov
Quoted 5 lines · Rob Herring
The MDSS interrupt provider is a single cell, so specifying interrupt flags on the consumers is incorrect.
Signed-off-by Rob Herring <[email protected]>Reviewed-by Dmitry Baryshkov <[email protected]>
Reviewed-by Marijn Suijten <[email protected]>
Dmitry, it seems you sent a similar change - albeit split across one patch per DTSI file and omitting arm qcom-msm8974 - inbetween v1 and v2 of this patch. To me that only makes sense if every patch includes the appropriate, individual Fixes: tag but the patches lack those too. Which approach should be reviewed and applied going forward?
- Marijn
Quoted 175 lines
Quoted 170 lines
---
v2:
- Add a bunch of missed cases--- arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/sdm630.dtsi | 5 ++--- arch/arm64/boot/dts/qcom/sdm660.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 +++--- 6 files changed, 14 insertions(+), 15 deletions(-)arch/arm/boot/dts/qcom-msm8974.dtsi +2
-2@@ -1495,7 +1495,7 @@ mdp: mdp@fd900000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 0>; + interrupts = <0>; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>,@@ -1530,7 +1530,7 @@ dsi0: dsi@fd922800 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;arch/arm64/boot/dts/qcom/msm8996.dtsi +3
-3@@ -788,7 +788,7 @@ mdp: mdp@901000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>,@@ -834,7 +834,7 @@ dsi0: dsi@994000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_BYTE0_CLK>,@@ -904,7 +904,7 @@ hdmi: hdmi-tx@9a0000 { "hdcp_physical"; interrupt-parent = <&mdss>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <8>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_AHB_CLK>,arch/arm64/boot/dts/qcom/sdm630.dtsi +2
-3@@ -1453,7 +1453,7 @@ mdp: mdp@c901000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; assigned-clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_VSYNC_CLK>;@@ -1530,7 +1530,7 @@ dsi0: dsi@c994000 { power-domains = <&rpmpd SDM660_VDDCX>; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;@@ -2487,4 +2487,3 @@ timer { <GIC_PPI 0 0xf08>; }; }; -arch/arm64/boot/dts/qcom/sdm660.dtsi +1
-1@@ -163,7 +163,7 @@ dsi1: dsi@c996000 { power-domains = <&rpmpd SDM660_VDDCX>; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;arch/arm64/boot/dts/qcom/sdm845.dtsi +3
-3@@ -4281,7 +4281,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SDM845_CX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>;@@ -4333,7 +4333,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,@@ -4405,7 +4405,7 @@ dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,arch/arm64/boot/dts/qcom/sm8250.dtsi +3
-4@@ -3200,7 +3200,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SM8250_MMCX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>;@@ -3252,7 +3252,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,@@ -3325,7 +3325,7 @@ dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, --2.32.0
Signature · 2 lines
With best wishes Dmitry
Quoted 11 lines · Marijn Suijten
Quoted 8 lines · Dmitry Baryshkov
Quoted 5 lines · Rob Herring
The MDSS interrupt provider is a single cell, so specifying interrupt flags on the consumers is incorrect.
Signed-off-by Rob Herring <[email protected]>Reviewed-by Dmitry Baryshkov <[email protected]>
Quoted 7 lines
Reviewed-by Marijn Suijten <[email protected]>Dmitry, it seems you sent a similar change - albeit split across one patch per DTSI file and omitting arm qcom-msm8974 - inbetween v1 and v2 of this patch. To me that only makes sense if every patch includes the appropriate, individual
Fixes:tag but the patches lack those too. Which approach should be reviewed and applied going forward?
Probably it's up to Bjorn to decide. I can resend my series including the Fixes tags (and msm8974) if he thinks it's the better approach
Quoted 178 lines
- Marijn
Quoted 175 lines
Quoted 168 lines
---
v2:
- Add a bunch of missed cases--- arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/sdm630.dtsi | 5 ++--- arch/arm64/boot/dts/qcom/sdm660.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 +++--- 6 files changed, 14 insertions(+), 15 deletions(-)arch/arm/boot/dts/qcom-msm8974.dtsi +2
-2@@ -1495,7 +1495,7 @@ mdp: mdp@fd900000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 0>; + interrupts = <0>; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>,@@ -1530,7 +1530,7 @@ dsi0: dsi@fd922800 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;arch/arm64/boot/dts/qcom/msm8996.dtsi +3
-3@@ -788,7 +788,7 @@ mdp: mdp@901000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>,@@ -834,7 +834,7 @@ dsi0: dsi@994000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_BYTE0_CLK>,@@ -904,7 +904,7 @@ hdmi: hdmi-tx@9a0000 { "hdcp_physical"; interrupt-parent = <&mdss>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <8>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_AHB_CLK>,arch/arm64/boot/dts/qcom/sdm630.dtsi +2
-3@@ -1453,7 +1453,7 @@ mdp: mdp@c901000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; assigned-clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_VSYNC_CLK>;@@ -1530,7 +1530,7 @@ dsi0: dsi@c994000 { power-domains = <&rpmpd SDM660_VDDCX>; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;@@ -2487,4 +2487,3 @@ timer { <GIC_PPI 0 0xf08>; }; }; -arch/arm64/boot/dts/qcom/sdm660.dtsi +1
-1@@ -163,7 +163,7 @@ dsi1: dsi@c996000 { power-domains = <&rpmpd SDM660_VDDCX>; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;arch/arm64/boot/dts/qcom/sdm845.dtsi +3
-3@@ -4281,7 +4281,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SDM845_CX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>;@@ -4333,7 +4333,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,@@ -4405,7 +4405,7 @@ dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,arch/arm64/boot/dts/qcom/sm8250.dtsi +3
-4@@ -3200,7 +3200,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SM8250_MMCX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>;@@ -3252,7 +3252,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,@@ -3325,7 +3325,7 @@ dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, --Quoted 2 lines
2.32.0
--
With best wishes
Dmitry
Signature · 2 lines
With best wishes Dmitry