dt-bindings: display: bridge: ldb: Add i.MX6SX support

PATCH Superseded Fabio Estevam 4 participants 6 messages Mar 30, 2023 – Apr 4, 2023

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Device tree bindings DRM drivers DRM misc DRM drivers for bridge chips

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Fabio Estevam

author

2023-03-30 10:42 UTC #0 lore raw

PATCH v2 1/2 dt-bindings: display: bridge: ldb: Add i.MX6SX support

From: Fabio Estevam <[email protected]>

i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout with i.MX8MP and i.MX93.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v1:
- Do not duplicate the entire if. (Krzysztof)

 .../devicetree/bindings/display/bridge/fsl,ldb.yaml          | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml +4 -1

index 6e0e3ba9b49e..07388bf2b90d 100644
@@ -17,6 +17,7 @@ description: |
 properties:
   compatible:
     enum:
+      - fsl,imx6sx-ldb
       - fsl,imx8mp-ldb
       - fsl,imx93-ldb

@@ -64,7 +65,9 @@ allOf:
       properties:
         compatible:
           contains:
-            const: fsl,imx93-ldb
+            enum:
+              - fsl,imx6sx-ldb
+              - fsl,imx93-ldb
     then:
       properties:
         ports:

Signature · 1 line

2.34.1

Fabio Estevam

author

2023-03-30 10:42 UTC #1 lore raw

PATCH v2 2/2 drm/bridge: fsl-ldb: Add i.MX6SX support

From: Fabio Estevam <[email protected]>

i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout with i.MX8MP and i.MX93.

There is no LVDS CTRL register on the i.MX6SX, so only write to this register on the appropriate SoCs.

Add support for the i.MX6SX LDB.

Tested on a imx6sx-sdb board with a Hannstar HSD100PXN1 LVDS panel and also on a custom i.MX6SX-based board.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v1:
- None

 drivers/gpu/drm/bridge/fsl-ldb.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

drivers/gpu/drm/bridge/fsl-ldb.c +13 -1

index 450b352914f4..f8e5d8ab98e3 100644
@@ -56,6 +56,7 @@
 #define LVDS_CTRL_VBG_ADJ_MASK			GENMASK(19, 17)
 
 enum fsl_ldb_devtype {
+	IMX6SX_LDB,
 	IMX8MP_LDB,
 	IMX93_LDB,
 };

@@ -64,9 +65,14 @@ struct fsl_ldb_devdata {
 	u32 ldb_ctrl;
 	u32 lvds_ctrl;
 	bool lvds_en_bit;
+	bool not_lvds_ctrl;
 };
 
 static const struct fsl_ldb_devdata fsl_ldb_devdata[] = {
+	[IMX6SX_LDB] = {
+		.ldb_ctrl = 0x18,
+		.not_lvds_ctrl = true,
+	},
 	[IMX8MP_LDB] = {
 		.ldb_ctrl = 0x5c,
 		.lvds_ctrl = 0x128,

@@ -202,6 +208,9 @@ static void fsl_ldb_atomic_enable(struct drm_bridge *bridge,
 
 	regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->ldb_ctrl, reg);
 
+	if (fsl_ldb->devdata->not_lvds_ctrl)
+		return;
+
 	/* Program LVDS_CTRL */
 	reg = LVDS_CTRL_CC_ADJ(2) | LVDS_CTRL_PRE_EMPH_EN |
 	      LVDS_CTRL_PRE_EMPH_ADJ(3) | LVDS_CTRL_VBG_EN;

@@ -228,7 +237,8 @@ static void fsl_ldb_atomic_disable(struct drm_bridge *bridge,
 		regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl,
 			     LVDS_CTRL_LVDS_EN);
 	else
-		regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl, 0);
+		if (!fsl_ldb->devdata->not_lvds_ctrl)
+			regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl, 0);
 	regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->ldb_ctrl, 0);
 
 	clk_disable_unprepare(fsl_ldb->clk);

@@ -355,6 +365,8 @@ static void fsl_ldb_remove(struct platform_device *pdev)
 }
 
 static const struct of_device_id fsl_ldb_match[] = {
+	{ .compatible = "fsl,imx6sx-ldb",
+	  .data = &fsl_ldb_devdata[IMX6SX_LDB], },
 	{ .compatible = "fsl,imx8mp-ldb",
 	  .data = &fsl_ldb_devdata[IMX8MP_LDB], },
 	{ .compatible = "fsl,imx93-ldb",

Signature · 1 line

2.34.1

[email protected]

maintainer Reviewed-by on v2 2/2

2023-03-31 08:58 UTC #2 lore raw

Re: [PATCH v2 2/2] drm/bridge: fsl-ldb: Add i.MX6SX support

Quoted 69 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout with i.MX8MP and i.MX93.

There is no LVDS CTRL register on the i.MX6SX, so only write to this register on the appropriate SoCs.

Add support for the i.MX6SX LDB.

Tested on a imx6sx-sdb board with a Hannstar HSD100PXN1 LVDS panel and also on a custom i.MX6SX-based board.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v1:
- None

  drivers/gpu/drm/bridge/fsl-ldb.c | 14 +++++++++++++-
  1 file changed, 13 insertions(+), 1 deletion(-)

drivers/gpu/drm/bridge/fsl-ldb.c +11 -1

index 450b352914f4..f8e5d8ab98e3 100644
@@ -56,6 +56,7 @@
  #define LVDS_CTRL_VBG_ADJ_MASK			GENMASK(19, 17)
 
  enum fsl_ldb_devtype {
+	IMX6SX_LDB,
  	IMX8MP_LDB,
  	IMX93_LDB,
  };

@@ -64,9 +65,14 @@ struct fsl_ldb_devdata {
  	u32 ldb_ctrl;
  	u32 lvds_ctrl;
  	bool lvds_en_bit;
+	bool not_lvds_ctrl;
  };
 
  static const struct fsl_ldb_devdata fsl_ldb_devdata[] = {
+	[IMX6SX_LDB] = {
+		.ldb_ctrl = 0x18,
+		.not_lvds_ctrl = true,
+	},
  	[IMX8MP_LDB] = {
  		.ldb_ctrl = 0x5c,
  		.lvds_ctrl = 0x128,

@@ -202,6 +208,9 @@ static void fsl_ldb_atomic_enable(struct drm_bridge *bridge,
 
  	regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->ldb_ctrl, reg);
 
+	if (fsl_ldb->devdata->not_lvds_ctrl)
+		return;
+
  	/* Program LVDS_CTRL */
  	reg = LVDS_CTRL_CC_ADJ(2) | LVDS_CTRL_PRE_EMPH_EN |
  	      LVDS_CTRL_PRE_EMPH_ADJ(3) | LVDS_CTRL_VBG_EN;

@@ -228,7 +237,8 @@ static void fsl_ldb_atomic_disable(struct drm_bridge *bridge,
  		regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl,
  			     LVDS_CTRL_LVDS_EN);
  	else
-		regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl, 0);
+		if (!fsl_ldb->devdata->not_lvds_ctrl)
+			regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->lvds_ctrl, 0);
  	regmap_write(fsl_ldb->regmap, fsl_ldb->devdata->ldb_ctrl, 0);
 
  	clk_disable_unprepare(fsl_ldb->clk);

drivers/gpu/drm/bridge/fsl-ldb.c static void fsl_ldb_remove(struct platform_device *pdev) · line 372

Quoted 8 lines

drivers/gpu/drm/bridge/fsl-ldb.c +2 -0

@@ -355,6 +365,8 @@ static void fsl_ldb_remove(struct platform_device *pdev)
  }
 
  static const struct of_device_id fsl_ldb_match[] = {
+	{ .compatible = "fsl,imx6sx-ldb",
+	  .data = &fsl_ldb_devdata[IMX6SX_LDB], },
  	{ .compatible = "fsl,imx8mp-ldb",
  	  .data = &fsl_ldb_devdata[IMX8MP_LDB], },
  	{ .compatible = "fsl,imx93-ldb",

Reviewed-by Neil Armstrong <[email protected]>

Marek Vasut

Reviewed-by on v2 2/2

2023-04-04 01:28 UTC #3 lore raw

Re: [PATCH v2 2/2] drm/bridge: fsl-ldb: Add i.MX6SX support

In reply to Fabio Estevam

Quoted 34 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout with i.MX8MP and i.MX93.
There is no LVDS CTRL register on the i.MX6SX, so only write to this register on the appropriate SoCs.
Add support for the i.MX6SX LDB.
Tested on a imx6sx-sdb board with a Hannstar HSD100PXN1 LVDS panel and also on a custom i.MX6SX-based board.
Signed-off-by Fabio Estevam <[email protected]>
---
Changes since v1:
- None
  drivers/gpu/drm/bridge/fsl-ldb.c | 14 +++++++++++++-
  1 file changed, 13 insertions(+), 1 deletion(-)
drivers/gpu/drm/bridge/fsl-ldb.c +1 -0
index 450b352914f4..f8e5d8ab98e3 100644
@@ -56,6 +56,7 @@
  #define LVDS_CTRL_VBG_ADJ_MASK			GENMASK(19, 17)
 
  enum fsl_ldb_devtype {
+	IMX6SX_LDB,
  	IMX8MP_LDB,
  	IMX93_LDB,
  };

drivers/gpu/drm/bridge/fsl-ldb.c struct fsl_ldb_devdata { · line 68

Quoted 4 lines

drivers/gpu/drm/bridge/fsl-ldb.c +1 -0

@@ -64,9 +65,14 @@ struct fsl_ldb_devdata {
  	u32 ldb_ctrl;
  	u32 lvds_ctrl;
  	bool lvds_en_bit;
+	bool not_lvds_ctrl;

You might want to rename this one to something like "composite_control_reg" since the MX6SX only has one LDB control register instead of two like the newer SoCs. But that's optional change.

Reviewed-by Marek Vasut <[email protected]>

Krzysztof Kozlowski

Reviewed-by on v2 1/2

2023-03-31 08:50 UTC #4 lore raw

In reply to Fabio Estevam

Quoted 9 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout with i.MX8MP and i.MX93.
Signed-off-by Fabio Estevam <[email protected]>
---
Changes since v1:
- Do not duplicate the entire if. (Krzysztof)

Reviewed-by Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof

Marek Vasut

Reviewed-by on v2 1/2

2023-04-04 01:29 UTC #5 lore raw

In reply to Fabio Estevam

Quoted 6 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout with i.MX8MP and i.MX93.
Signed-off-by Fabio Estevam <[email protected]>

Nit: you are not adding 'support' for the IP here, you are documenting bindings in this patch. The support is added in 2/2 .

Reviewed-by Marek Vasut <[email protected]>