arm:dts: am3517-evm: Fix LED3/4 pinmux
Subsystems (2)
PATCH v3 1/2 arm:dts: am3517-evm: Fix LED3/4 pinmux
The pinmux for LED3 and LED4 are incorrectly attached to the omap3_pmx_core when they should be connected to the omap3_pmx_wkup pin mux. This was likely masked by the fact that the bootloader used to do all the pinmuxing.
---
V3: No Change V2: Use current device tree naming convention for led-pins
This likely will require a separate patch to apply to previous file location.
arch/arm/boot/dts/ti/omap/am3517-evm.dts +9 -7
@@ -271,13 +271,6 @@ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ >; }; - leds_pins: leds-pins { - pinctrl-single,pins = < - OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 */ - OMAP3_WKUP_IOPAD(0x2a26, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu1.gpio_31 */ - >; - }; - mmc1_pins: mmc1-pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
@@ -355,3 +348,12 @@ OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */ >; }; }; + +&omap3_pmx_wkup { + leds_pins: leds-pins { + pinctrl-single,pins = < + OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 */ + OMAP3_WKUP_IOPAD(0x2a26, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu1.gpio_31 */ + >; + }; +};
Signature · 1 line
2.40.1
PATCH v3 2/2 arm: dts: am3517-evm: Enable Ethernet PHY Interrupt
The Ethernet PHY interrupt pin is routed to GPIO_58. Create a PHY node to configure this GPIO for the interrupt to avoid polling.
---
V3: Fix issue where V2 wasn't properly properly commit-ammended, so V2 patch didn't properly generate
V2: Attempted (but failed) to fix ethernet-phy-pins naming
arch/arm/boot/dts/ti/omap/am3517-evm.dts +19 -0
@@ -172,11 +172,24 @@ hsusb1_phy: hsusb1_phy { &davinci_emac { pinctrl-names = "default"; pinctrl-0 = <ðernet_pins>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; status = "okay"; }; &davinci_mdio { + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + + ethphy0: ethernet-phy@0 { + pinctrl-names = "default"; + pinctrl-0 = <&enet_phy_pins>; + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; /* gpio_58 */ + }; }; &dss {
@@ -257,6 +270,12 @@ OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50mhz_clk */ >; }; + enet_phy_pins: ethernet-phy-pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x20bc, PIN_INPUT | MUX_MODE4) /* gpmc_ncs7.gpio_57 */ + >; + }; + i2c2_pins: i2c2-pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
Signature · 1 line
2.40.1
Tony Lindgren
maintainerRe: [PATCH V3 2/2] arm: dts: am3517-evm: Enable Ethernet PHY Interrupt
Quoted 2 lines · Adam Ford
The Ethernet PHY interrupt pin is routed to
GPIO_58. Create a PHY node to configure this GPIO for the interrupt to avoid polling.
Thanks applying both into omap-for-v6.7/dt.
Tony