arm64: dts: rockchip: Enable DisplayPort for rk3588-evb2
Subsystems (2)
PATCH 1/1 arm64: dts: rockchip: Enable DisplayPort for rk3588-evb2
From: Chaoyi Chen <[email protected]>
The rk3588 evb2 board has a full size DisplayPort connector, enable for it.
--- .../boot/dts/rockchip/rk3588-evb2-v10.dts | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+)
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +39 -0
@@ -25,6 +25,18 @@ chosen { stdout-path = "serial2:1500000n8"; }; + dp-con { + compatible = "dp-connector"; + label = "DP OUT"; + type = "full size"; + + port { + dp_con_in: endpoint { + remote-endpoint = <&dp0_out_con>; + }; + }; + }; + hdmi-con { compatible = "hdmi-connector"; type = "a";
@@ -106,6 +118,24 @@ vcc5v0_usbdcin: regulator-vcc5v0-usbdcin { }; }; +&dp0 { + pinctrl-0 = <&dp0m0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&dp0_in { + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <&dp_con_in>; + }; +}; + &gpu { mali-supply = <&vdd_gpu_s0>; sram-supply = <&vdd_gpu_mem_s0>;
@@ -916,6 +946,8 @@ &usb_host1_xhci { }; &vop { + assigned-clocks = <&cru DCLK_VOP2_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>; status = "okay"; };
@@ -929,3 +961,10 @@ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { remote-endpoint = <&hdmi0_in_vp0>; }; }; + +&vp2 { + vp2_out_dp0: endpoint@a { + reg = <ROCKCHIP_VOP2_EP_DP0>; + remote-endpoint = <&dp0_in_vp2>; + }; +};
Signature · 7 lines
2.49.0 _______________________________________________ Linux-rockchip mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-rockchip
Hi Chaoyi Chen,
Quoted 15 lines · Chaoyi Chen
From: Chaoyi Chen <[email protected]>
The rk3588 evb2 board has a full size DisplayPort connector, enable for it.
Signed-off-by Chaoyi Chen <[email protected]>--- .../boot/dts/rockchip/rk3588-evb2-v10.dts | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+)arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +0
-0
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts chosen { · line 31
Quoted 7 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +4
-0@@ -25,6 +25,18 @@ chosen { stdout-path = "serial2:1500000n8"; }; + dp-con { + compatible = "dp-connector"; + label = "DP OUT"; + type = "full size";
This isn't valid according to the dt binding. It should be "full-size" instead.
Quoted 37 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +26
-0+ + port { + dp_con_in: endpoint { + remote-endpoint = <&dp0_out_con>; + }; + }; + }; + hdmi-con { compatible = "hdmi-connector"; type = "a";@@ -106,6 +118,24 @@ vcc5v0_usbdcin: regulator-vcc5v0-usbdcin { }; }; +&dp0 { + pinctrl-0 = <&dp0m0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&dp0_in { + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <&dp_con_in>; + }; +}; + &gpu { mali-supply = <&vdd_gpu_s0>; sram-supply = <&vdd_gpu_mem_s0>;
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts &usb_host1_xhci { · line 950
Quoted 5 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +2
-0@@ -916,6 +946,8 @@ &usb_host1_xhci { }; &vop { + assigned-clocks = <&cru DCLK_VOP2_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>;
This is surprising, the only other board which has the DP0 enabled (the CoolPi 4B) doesn't set these two.
Does HDMI still work as well as it used to with these new properties? Why are those needed? Some context in the commit log or as a comment in the DT would be most welcome!
Cheers,
Quentin
Hi Quentin,
Quoted 13 lines · Quentin Schulz
Hi Chaoyi Chen,
Quoted 10 lines · Chaoyi Chen
From: Chaoyi Chen <[email protected]>
The rk3588 evb2 board has a full size DisplayPort connector, enable for it.
Signed-off-by Chaoyi Chen <[email protected]>---
.../boot/dts/rockchip/rk3588-evb2-v10.dts | 39 +++++++++++++++++++1 file changed, 39 insertions(+)
Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts chosen { · line 30
Quoted 11 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +3
-0@@ -25,6 +25,18 @@ chosen { stdout-path = "serial2:1500000n8"; }; + dp-con { + compatible = "dp-connector"; + label = "DP OUT"; + type = "full size";This isn't valid according to the dt binding. It should be "full-size" instead.
Will fix in v2.
Quoted 44 lines
Quoted 37 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +25
-0+ + port { + dp_con_in: endpoint { + remote-endpoint = <&dp0_out_con>; + }; + }; + }; + hdmi-con { compatible = "hdmi-connector"; type = "a";@@ -106,6 +118,24 @@ vcc5v0_usbdcin: regulator-vcc5v0-usbdcin { }; }; +&dp0 { + pinctrl-0 = <&dp0m0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&dp0_in { + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <&dp_con_in>; + }; +}; + &gpu { mali-supply = <&vdd_gpu_s0>; sram-supply = <&vdd_gpu_mem_s0>;arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts &usb_host1_xhci { · line 949
Quoted 4 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +2
-0@@ -916,6 +946,8 @@ &usb_host1_xhci { }; &vop { + assigned-clocks = <&cru DCLK_VOP2_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>;This is surprising, the only other board which has the DP0 enabled (the CoolPi 4B) doesn't set these two.
Quoted 1 line
Does HDMI still work as well as it used to with these new properties? Why are those needed? Some context in the commit log or as a comment in the DT would be most welcome!
Yes, HDMI and DP can work normally whether these new properties removed or not.
The key point is that when using V0PLL, we can get more usable resolution because DP requires a precise clock. If V0PLL is not explicitly specified here, then dclk_vop2 (VP2) may be divided down on GPLL, CPLL, etc. In this case, only a few frequency points are available. In my case, when V0PLL is not used, only resolutions such as 1024x768 and 640x480 are available.
For HDMI, I think it will use clk_hdmiphy_pixel0/1 as clock parent which is provided by the HDMI PHY when it work on TMDS mode so that we don't need to set it .
I will add more comment in v2.
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Quoted 77 lines · Chaoyi Chen
Hi Quentin,
Quoted 13 lines · Quentin Schulz
Hi Chaoyi Chen,
Quoted 10 lines · Chaoyi Chen
From: Chaoyi Chen <[email protected]>
The rk3588 evb2 board has a full size DisplayPort connector, enable for it.
Signed-off-by Chaoyi Chen <[email protected]>---
.../boot/dts/rockchip/rk3588-evb2-v10.dts | 39 +++++++++++++++++++1 file changed, 39 insertions(+)Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts chosen { · line 30
Quoted 11 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +3
-0@@ -25,6 +25,18 @@ chosen { stdout-path = "serial2:1500000n8"; }; + dp-con { + compatible = "dp-connector"; + label = "DP OUT"; + type = "full size";This isn't valid according to the dt binding. It should be "full-size" instead.
Will fix in v2.
Quoted 44 lines
Quoted 37 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +25
-0+ + port { + dp_con_in: endpoint { + remote-endpoint = <&dp0_out_con>; + }; + }; + }; + hdmi-con { compatible = "hdmi-connector"; type = "a";@@ -106,6 +118,24 @@ vcc5v0_usbdcin: regulator-vcc5v0-usbdcin { }; }; +&dp0 { + pinctrl-0 = <&dp0m0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&dp0_in { + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <&dp_con_in>; + }; +}; + &gpu { mali-supply = <&vdd_gpu_s0>; sram-supply = <&vdd_gpu_mem_s0>;arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts &usb_host1_xhci { · line 949
Quoted 4 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +2
-0@@ -916,6 +946,8 @@ &usb_host1_xhci { }; &vop { + assigned-clocks = <&cru DCLK_VOP2_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>;This is surprising, the only other board which has the DP0 enabled (the CoolPi 4B) doesn't set these two.
Quoted 8 lines
Quoted 1 line
Does HDMI still work as well as it used to with these new properties? Why are those needed? Some context in the commit log or as a comment in the DT would be most welcome!
Yes, HDMI and DP can work normally whether these new properties removed or not.
The key point is that when using V0PLL, we can get more usable resolution because DP requires a precise clock. If V0PLL is not explicitly specified here, then
dclk_vop2(VP2) may be divided down on GPLL, CPLL, etc. In this case, only a few frequency points are available. In my case, when V0PLL is not used, only resolutions such as 1024x768 and 640x480 are available.For HDMI, I think it will use clk_hdmiphy_pixel0/1 as clock parent which is provided by the HDMI PHY when it work on TMDS mode so that we don't need to set it .
Considering the clocks are all internal to the SoC, shouldn't all you have explained be applicable to the CoolPi 4B too (and other boards with DP)? I'm trying to understand if we should add something similar to CoolPi 4B DTS as well?
@Andy, you're the one who added support for DP to CoolPi 4B, without these properties, is there something we need to do there as well?
Thanks!
Quentin
Quoted 78 lines · Quentin Schulz
Quoted 77 lines · Chaoyi Chen
Hi Quentin,
Quoted 13 lines · Quentin Schulz
Hi Chaoyi Chen,
Quoted 10 lines · Chaoyi Chen
From: Chaoyi Chen <[email protected]>
The rk3588 evb2 board has a full size DisplayPort connector, enable for it.
Signed-off-by Chaoyi Chen <[email protected]>---
.../boot/dts/rockchip/rk3588-evb2-v10.dts | 39 +++++++++++++++++++1 file changed, 39 insertions(+)Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts chosen { · line 30
Quoted 11 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +3
-0@@ -25,6 +25,18 @@ chosen { stdout-path = "serial2:1500000n8"; }; + dp-con { + compatible = "dp-connector"; + label = "DP OUT"; + type = "full size";This isn't valid according to the dt binding. It should be "full-size" instead.
Will fix in v2.
Quoted 44 lines
Quoted 37 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +25
-0+ + port { + dp_con_in: endpoint { + remote-endpoint = <&dp0_out_con>; + }; + }; + }; + hdmi-con { compatible = "hdmi-connector"; type = "a";@@ -106,6 +118,24 @@ vcc5v0_usbdcin: regulator-vcc5v0-usbdcin { }; }; +&dp0 { + pinctrl-0 = <&dp0m0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&dp0_in { + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <&dp_con_in>; + }; +}; + &gpu { mali-supply = <&vdd_gpu_s0>; sram-supply = <&vdd_gpu_mem_s0>;arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts &usb_host1_xhci { · line 949
Quoted 4 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +2
-0@@ -916,6 +946,8 @@ &usb_host1_xhci { }; &vop { + assigned-clocks = <&cru DCLK_VOP2_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>;This is surprising, the only other board which has the DP0 enabled (the CoolPi 4B) doesn't set these two.
Quoted 5 lines
Quoted 5 lines
Quoted 1 line
Does HDMI still work as well as it used to with these new properties? Why are those needed? Some context in the commit log or as a comment in the DT would be most welcome!
Yes, HDMI and DP can work normally whether these new properties removed or not.
The key point is that when using V0PLL, we can get more usable resolution because DP requires a precise clock. If V0PLL is not explicitly specified here, then
dclk_vop2(VP2) may be divided down on GPLL, CPLL, etc. In this case, only a few frequency points are available. In my case, when V0PLL is not used, only resolutions such as 1024x768 and 640x480 are available.
Oh! This is because GPLL was not initialized to the correct frequency during the U-Boot stage. It should support typical frequencies such as 1080P (148.5M), 4K (594M) .
Quoted 5 lines
Quoted 3 lines
For HDMI, I think it will use clk_hdmiphy_pixel0/1 as clock parent which is provided by the HDMI PHY when it work on TMDS mode so that we don't need to set it .
Considering the clocks are all internal to the SoC, shouldn't all you have explained be applicable to the CoolPi 4B too (and other boards with DP)? I'm trying to understand if we should add something similar to CoolPi 4B DTS as well?
Yes, I think this modification is necessary because some resolutions use special frequencies.
Quoted 7 lines
@Andy, you're the one who added support for DP to CoolPi 4B, without these properties, is there something we need to do there as well?
Thanks!
Quentin
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Linux-rockchip mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-rockchip
Hello Quentin,
Quoted 90 lines · 在 2025-09-16 17:48:41,"Chaoyi Chen" <[email protected]> 写道:
Quoted 78 lines · Quentin Schulz
Quoted 77 lines · Chaoyi Chen
Hi Quentin,
Quoted 13 lines · Quentin Schulz
Hi Chaoyi Chen,
Quoted 10 lines · Chaoyi Chen
From: Chaoyi Chen <[email protected]>
The rk3588 evb2 board has a full size DisplayPort connector, enable for it.
Signed-off-by Chaoyi Chen <[email protected]>---
.../boot/dts/rockchip/rk3588-evb2-v10.dts | 39 +++++++++++++++++++1 file changed, 39 insertions(+)Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts chosen { · line 30
Quoted 11 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +3
-0@@ -25,6 +25,18 @@ chosen { stdout-path = "serial2:1500000n8"; }; + dp-con { + compatible = "dp-connector"; + label = "DP OUT"; + type = "full size";This isn't valid according to the dt binding. It should be "full-size" instead.
Will fix in v2.
Quoted 44 lines
Quoted 37 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +25
-0+ + port { + dp_con_in: endpoint { + remote-endpoint = <&dp0_out_con>; + }; + }; + }; + hdmi-con { compatible = "hdmi-connector"; type = "a";@@ -106,6 +118,24 @@ vcc5v0_usbdcin: regulator-vcc5v0-usbdcin { }; }; +&dp0 { + pinctrl-0 = <&dp0m0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&dp0_in { + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <&dp_con_in>; + }; +}; + &gpu { mali-supply = <&vdd_gpu_s0>; sram-supply = <&vdd_gpu_mem_s0>;arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts &usb_host1_xhci { · line 949
Quoted 4 lines
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +2
-0@@ -916,6 +946,8 @@ &usb_host1_xhci { }; &vop { + assigned-clocks = <&cru DCLK_VOP2_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>;This is surprising, the only other board which has the DP0 enabled (the CoolPi 4B) doesn't set these two.
Quoted 5 lines
Quoted 5 lines
Quoted 1 line
Does HDMI still work as well as it used to with these new properties? Why are those needed? Some context in the commit log or as a comment in the DT would be most welcome!
Yes, HDMI and DP can work normally whether these new properties removed or not.
The key point is that when using V0PLL, we can get more usable resolution because DP requires a precise clock. If V0PLL is not explicitly specified here, then
dclk_vop2(VP2) may be divided down on GPLL, CPLL, etc. In this case, only a few frequency points are available. In my case, when V0PLL is not used, only resolutions such as 1024x768 and 640x480 are available.Oh! This is because GPLL was not initialized to the correct frequency during the U-Boot stage. It should support typical frequencies such as 1080P (148.5M), 4K (594M) .
Quoted 1 line
Quoted 1 line
Quoted 10 lines
Quoted 4 lines
Quoted 2 lines
For HDMI, I think it will use clk_hdmiphy_pixel0/1 as clock parent which is provided by the HDMI PHY when it work on TMDS mode so that we don't need to set it .
Considering the clocks are all internal to the SoC, shouldn't all you have explained be applicable to the CoolPi 4B too (and other boards with DP)? I'm trying to understand if we should add something similar to CoolPi 4B DTS as well?
Yes, I think this modification is necessary because some resolutions use special frequencies.
Quoted 2 lines
@Andy, you're the one who added support for DP to CoolPi 4B, without these properties, is there something we need to do there as well?
On the CoolPI 4B, since no dedicated PLL was specified, the GPLL would be automatically assigned as the PLL source for dclk_vop2. As the frequency of GPLL is 1188 MHz, we can only get typical clock frequencies such as 74.25, 148.5, 297, 594MHz, which correspond to typical resolutions of 720P, 1080P, 4K30/60. If there are some more special resolutions, such as a 3840x2160 59.94Hz DP resolution that requires a dclk clock of 593.407 MHz, then it cannot be supported.
I will conduct more tests later and then submit a patch to specify V0PLL for CoolPi 4B's VP2.
And Chaoyi's patch is correct.
Quoted 5 lines
Quoted 5 lines
Thanks!
Quentin
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[email protected]
http://lists.infradead.org/mailman/listinfo/linux-rockchip
Rob Herring (Arm)
maintainerQuoted 10 lines · Chaoyi Chen
From: Chaoyi Chen <[email protected]>
The rk3588 evb2 board has a full size DisplayPort connector, enable for it.
Signed-off-by Chaoyi Chen <[email protected]>--- .../boot/dts/rockchip/rk3588-evb2-v10.dts | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+)
My bot found new DTB warnings on the .dts files added or changed in this series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date:
pip3 install dtschema --upgrade
This patch series was applied (using b4) to base:
Base: attempting to guess base-commit...
Base: tags/next-20250915 (exact match)
If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically)
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/rockchip/' for [email protected]:
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dtb: dp-con (dp-connector): type:0: 'full size' is not one of ['full-size', 'mini']
from schema $id: http://devicetree.org/schemas/display/connector/dp-connector.yaml#