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ARM: dts: r9a06g032: Add #address-cells in the GIC node

PATCH Superseded Herve Codina (Schneider Electric) 4 participants 10 messages Mar 3 – Mar 24

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PATCH 1/1 ARM: dts: r9a06g032: Add #address-cells in the GIC node

When checking dts involving the r9a06g032.dtsi file, the following kind of warnings are reported:
Missing property '#address-cells' in node xxx, using 0 as fallback

Indeed, #address-cells is not present in the GIC interrupt controller node.

Fix it adding the missing property.

No functional change.

---
 arch/arm/boot/dts/renesas/r9a06g032.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/renesas/r9a06g032.dtsi +1 -0
index f4f760aff28b..6acf524174c7 100644
@@ -507,6 +507,7 @@ gic: interrupt-controller@44101000 {
 			compatible = "arm,gic-400", "arm,cortex-a7-gic";
 			interrupt-controller;
 			#interrupt-cells = <3>;
+			#address-cells = <0>;
 			reg = <0x44101000 0x1000>, /* Distributer */
 			      <0x44102000 0x2000>, /* CPU interface */
 			      <0x44104000 0x2000>, /* Virt interface control */
Signature · 1 line
2.53.0
#1 lore raw
Quoted 4 lines · Herve Codina (Schneider Electric)

When checking dts involving the r9a06g032.dtsi file, the following kind of warnings are reported:
Missing property '#address-cells' in node xxx, using 0 as fallback

Quoted 8 lines

Indeed, #address-cells is not present in the GIC interrupt controller node.

Fix it adding the missing property.

No functional change.

How did you trigger this? It doesn't show up with the upstream DTs for N1D. Can you share the snippet which causes the problem for you?

#2 lore raw

Hi Wolfram,

Quoted 8 lines · On Tue, 10 Mar 2026 23:06:57 +0100 Wolfram Sang…
Quoted 7 lines · Herve Codina (Schneider Electric)

When checking dts involving the r9a06g032.dtsi file, the following kind of warnings are reported:
Missing property '#address-cells' in node xxx, using 0 as fallback

Indeed, #address-cells is not present in the GIC interrupt controller node.

Quoted 9 lines
Quoted 5 lines

Fix it adding the missing property.

No functional change.

How did you trigger this? It doesn't show up with the upstream DTs for N1D. Can you share the snippet which causes the problem for you?

I compiled the dtb with W=1 and CHECK_DTBS=1

$ touch arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
$ make ARCH=arm CROSS_COMPILE=... W=1 CHECK_DTBS=1 renesas/r9a06g032-rzn1d400-eb.dtb
  DTC [C] arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb
arch/arm/boot/dts/renesas/r9a06g032.dtsi:156.4-158.33: Warning (interrupt_map): /soc/pci@40030000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@44101000, using 0 as fallback
arch/arm/boot/dts/renesas/r9a06g032.dtsi:156.4-158.33: Warning (interrupt_map): /soc/pci@40030000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@44101000, using 0 as fallback
arch/arm/boot/dts/renesas/r9a06g032.dtsi:156.4-158.33: Warning (interrupt_map): /soc/pci@40030000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@44101000, using 0 as fallback
arch/arm/boot/dts/renesas/r9a06g032.dtsi:672.4-37: Warning (interrupt_map): /soc/interrupt-controller@51000480:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@44101000, using 0 as fallback
$

Best regards,
Hervé

#3 lore raw
Quoted 2 lines

I compiled the dtb with W=1 and CHECK_DTBS=1

W=1 adds extra warnings? I am surprised I didn't know this yet. Updated my build scripts, thanks! Confirming the issue.

#4 lore raw
In reply to Wolfram Sang
Quoted 8 lines · Wolfram Sang
Quoted 7 lines · Herve Codina (Schneider Electric)

When checking dts involving the r9a06g032.dtsi file, the following kind of warnings are reported:
Missing property '#address-cells' in node xxx, using 0 as fallback

Indeed, #address-cells is not present in the GIC interrupt controller node.

Quoted 8 lines
Quoted 5 lines

Fix it adding the missing property.

No functional change.

How did you trigger this? It doesn't show up with the upstream DTs for N1D. Can you share the snippet which causes the problem for you?

That's just standard DTC warning. I was fixing most of the arm64 platforms already:

https://lore.kernel.org/all/?q=f%3Akrzysztof+%22Add+default+GIC+address+cells%22

Best regards,
Krzysztof

Reviewed-by on v1 1/1
#5 lore raw
In reply to Herve Codina (Schneider Electric)
Quoted 4 lines · Herve Codina (Schneider Electric)

When checking dts involving the r9a06g032.dtsi file, the following kind of warnings are reported:
Missing property '#address-cells' in node xxx, using 0 as fallback

Quoted 8 lines

Indeed, #address-cells is not present in the GIC interrupt controller node.

Fix it adding the missing property.

No functional change.

I like Krzysztof's explanation "Value '0' is correct because GIC interrupt controller does not have children." Maybe it can be added to the commit message?

#6 lore raw

Hi Wolfram,

Quoted 12 lines · Wolfram Sang
Quoted 11 lines · Herve Codina (Schneider Electric)

When checking dts involving the r9a06g032.dtsi file, the following kind of warnings are reported:
Missing property '#address-cells' in node xxx, using 0 as fallback

Indeed, #address-cells is not present in the GIC interrupt controller node.

Fix it adding the missing property.

No functional change.

Quoted 7 lines
Quoted 1 line

I like Krzysztof's explanation "Value '0' is correct because GIC interrupt controller does not have children." Maybe it can be added to the commit message?

Some of the examples in the GIC DT bindings, do?
But #address-cells is not a required property in the GIC DT bindings, so why should it be added at all?

BTW, I never understood why an interrupt-controller should have #address-cells (according to dtc)?

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
#7 lore raw

Hi Geert,

Quoted 24 lines · On Wed, 11 Mar 2026 09:39:40 +0100 Geert Uytterhoeven <[email protected]>…

Hi Wolfram,

Quoted 12 lines · Wolfram Sang
Quoted 11 lines · Herve Codina (Schneider Electric)

When checking dts involving the r9a06g032.dtsi file, the following kind of warnings are reported:
Missing property '#address-cells' in node xxx, using 0 as fallback

Indeed, #address-cells is not present in the GIC interrupt controller node.

Fix it adding the missing property.

No functional change.

Quoted 7 lines
Quoted 1 line

I like Krzysztof's explanation "Value '0' is correct because GIC interrupt controller does not have children." Maybe it can be added to the commit message?

Quoted 6 lines

Some of the examples in the GIC DT bindings, do?
But #address-cells is not a required property in the GIC DT bindings, so why should it be added at all?

BTW, I never understood why an interrupt-controller should have #address-cells (according to dtc)?

I think this comes from the interrupt-map definition:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#interrupt-map

Best regards,
Hervé

#8 lore raw
In reply to Wolfram Sang

Hi Wolfram,

Quoted 12 lines · On Wed, 11 Mar 2026 09:32:53 +0100 Wolfram Sang…
Quoted 11 lines · Herve Codina (Schneider Electric)

When checking dts involving the r9a06g032.dtsi file, the following kind of warnings are reported:
Missing property '#address-cells' in node xxx, using 0 as fallback

Indeed, #address-cells is not present in the GIC interrupt controller node.

Fix it adding the missing property.

No functional change.

Quoted 8 lines
Quoted 1 line

I like Krzysztof's explanation "Value '0' is correct because GIC interrupt controller does not have children." Maybe it can be added to the commit message?

I will update the commit log on the v2 iteration.

Should I keep your reviewed-by tag for this v2. Indeed, you don't have seen yet the new commit log :)

Best regards,
Hervé

Signature · 3 lines
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
#9 lore raw
Quoted 3 lines

Should I keep your reviewed-by tag for this v2. Indeed, you don't have seen yet the new commit log :)

I trust you ;)