dt-bindings: pinctrl: convert nsp-gpio binding

PATCH Superseded Rosen Penev 2 participants 2 messages Sep 23

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Device tree bindings GPIO Pin control

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Rosen Penev

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2026-09-23 18:53 UTC #0 lore raw

PATCH 1/1 dt-bindings: pinctrl: convert nsp-gpio binding

The brcm,nsp-gpio-a compatible used by the NSP GPIO controller was only documented in the legacy text binding, so dtbs_check reported 'failed to match any schema' for the gpio@20 node present in every bcm958625 and related board DTS.

Convert Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.txt to a YAML schema and drop the text binding. Keep the existing required and optional properties (reg, #gpio-cells, gpio-controller, ngpios, and the optional interrupt/gpio-ranges support), including the generic pinconf child nodes with pin bias and drive-strength.

Assisted-by LLM

Signed-off-by Rosen Penev <[email protected]>

---
 .../bindings/pinctrl/brcm,nsp-gpio.txt        |  80 --------------
 .../bindings/pinctrl/brcm,nsp-gpio.yaml       | 101 ++++++++++++++++++
 2 files changed, 101 insertions(+), 80 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.txt
 create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.txt deleted +0 ~~-80~~

deleted file mode 100644
index 0844168a6dd4..000000000000
@@ -1,80 +0,0 @@
-Broadcom Northstar plus (NSP) GPIO/PINCONF Controller
-
-Required properties:
-- compatible:
-    Must be "brcm,nsp-gpio-a"
-
-- reg:
-    Should contain the register physical address and length for each of
-    GPIO base, IO control registers
-
-- #gpio-cells:
-    Must be two. The first cell is the GPIO pin number (within the
-    controller's pin space) and the second cell is used for the following:
-    bit[0]: polarity (0 for active high and 1 for active low)
-
-- gpio-controller:
-    Specifies that the node is a GPIO controller
-
-- ngpios:
-    Number of gpios supported (58x25 supports 32 and 58x23 supports 24)
-
-Optional properties:
-- interrupts:
-    Interrupt ID
-
-- interrupt-controller:
-    Specifies that the node is an interrupt controller
-
-- gpio-ranges:
-    Specifies the mapping between gpio controller and pin-controllers pins.
-    This requires 4 fields in cells defined as -
-    1. Phandle of pin-controller.
-    2. GPIO base pin offset.
-    3  Pin-control base pin offset.
-    4. number of gpio pins which are linearly mapped from pin base.
-
-Supported generic PINCONF properties in child nodes:
-- pins:
-    The list of pins (within the controller's own pin space) that properties
-    in the node apply to. Pin names are "gpio-<pin>"
-
-- bias-disable:
-    Disable pin bias
-
-- bias-pull-up:
-    Enable internal pull up resistor
-
-- bias-pull-down:
-    Enable internal pull down resistor
-
-- drive-strength:
-    Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA)
-
-Example:
-
-	gpioa: gpio@18000020 {
-		compatible = "brcm,nsp-gpio-a";
-		reg = <0x18000020 0x100>,
-		      <0x1803f1c4 0x1c>;
-		#gpio-cells = <2>;
-		gpio-controller;
-		ngpios = <32>;
-		gpio-ranges = <&pinctrl 0 0 31>;
-		interrupt-controller;
-		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
-
-		/* Hog a few default settings */
-		pinctrl-names = "default";
-		pinctrl-0 = <&led>;
-		led: led {
-			pins = "gpio-1";
-			bias-pull-up;
-		};
-
-		pwr: pwr {
-			gpio-hog;
-			gpios = <3 1>;
-			output-high;
-		};
-	};

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml new file +101 -0

101 lines not on this page · raw message

Signature · 1 line

2.55.0

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AI review

2026-09-23 19:02 UTC #1 lore raw

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] dt-bindings: pinctrl: brcm,nsp-gpio drops gpio-hog and forces double nesting --

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dt-bindings: pinctrl: brcm,nsp-gpio drops gpio-hog and forces double nesting --

commit 25a9276749a1169691e6667beb90f7132674e886
Author: Rosen Penev <[email protected]>

dt-bindings: pinctrl: convert nsp-gpio binding

Quoted 4 lines

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml new file +0 -0
new file mode 100644

[ ... ]

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml line 58

Quoted 7 lines

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml new file +7 -0

+patternProperties:
+  '-pins$':
+    type: object
+    additionalProperties:
+      description: Pin configuration child nodes.
+      allOf:
+        - $ref: pincfg-node.yaml#

[Severity: Medium]
Does this pattern property enforce a double-level nesting by treating -pins nodes as wrapper objects where the properties are the actual pin configuration nodes?

This breaks documented single-level dts configurations from the previous text binding.

[ ... ]

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml line 77

Quoted 7 lines

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml new file +7 -0
+        drive-strength:
+          enum: [ 2, 4, 6, 8, 10, 12, 14, 16 ]
+
+      required:
+        - pins
+
+additionalProperties: false

[Severity: Medium]
Does using strict additionalProperties: false without referencing core schemas like gpio-hog or using unevaluatedProperties: false cause standard gpio-hog nodes and root pinctrl properties to be improperly rejected?

Quoted 9 lines

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml new file +9 -0

+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    gpio@18000020 {
+        compatible = "brcm,nsp-gpio-a";
+        reg = <0x18000020 0x100>,
+              <0x1803f1c4 0x1c>;

[ ... ]

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml line 101

Quoted 11 lines

Documentation/devicetree/bindings/pinctrl/brcm,nsp-gpio.yaml new file +11 -0

+        interrupt-controller;
+        #interrupt-cells = <2>;
+        interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+
+        led-pins {
+            led {
+                pins = "gpio-1";
+                bias-pull-up;
+            };
+        };
+    };

[Severity: Medium]
Does altering the example to drop the gpio-hog node and pinctrl-0 properties, while artificially wrapping the led node, bypass schema validation errors that would have otherwise caught the above issues?

Signature · 1 line

Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1