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dt-bindings: crypto: qcom,inline-crypto-engine: Add IPQ5210, IPQ5424 and IPQ9650

PATCH In review Varadarajan Narayanan 2 participants 2 messages Oct 21 – Nov 11

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PATCH v2 1/1 dt-bindings: crypto: qcom,inline-crypto-engine: Add IPQ5210, IPQ5424 and IPQ9650

Document the Inline Crypto Engine compatibles for the Qualcomm IPQ5210, IPQ5424 and IPQ9650 SoCs.

Separate the power-domains requirement from the two-clock requirement. IPQ5210/IPQ5424/IPQ9650 require two clocks but intentionally do not require power-domains because they have no RPM.

Preserve the existing requirements for other platforms.

---
Changes in v2:
- Fix sort order in the !power-domains block
- Pick R-b Krzysztof
- Link to v1: https://lore.kernel.org/r/[email protected]

---
 .../bindings/crypto/qcom,inline-crypto-engine.yaml | 27 +++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml +26 -1
index 23bf98c2b9fa..b98c4c6b77f0 100644
@@ -15,6 +15,9 @@ properties:
       - enum:
           - qcom,eliza-inline-crypto-engine
           - qcom,hawi-inline-crypto-engine
+          - qcom,ipq5210-inline-crypto-engine
+          - qcom,ipq5424-inline-crypto-engine
+          - qcom,ipq9650-inline-crypto-engine
           - qcom,kaanapali-inline-crypto-engine
           - qcom,maili-inline-crypto-engine
           - qcom,milos-inline-crypto-engine
@@ -81,7 +84,6 @@ allOf:
 
     then:
       required:
-        - power-domains
         - clock-names
       properties:
         clocks:
@@ -89,6 +91,29 @@ allOf:
         clock-names:
           minItems: 2
 
+  - if:
+      not:
+        properties:
+          compatible:
+            contains:
+              enum:
+                - qcom,ipq5210-inline-crypto-engine
+                - qcom,ipq5424-inline-crypto-engine
+                - qcom,ipq9650-inline-crypto-engine
+                - qcom,kaanapali-inline-crypto-engine
+                - qcom,qcs8300-inline-crypto-engine
+                - qcom,sa8775p-inline-crypto-engine
+                - qcom,sc7180-inline-crypto-engine
+                - qcom,sc7280-inline-crypto-engine
+                - qcom,sm8450-inline-crypto-engine
+                - qcom,sm8550-inline-crypto-engine
+                - qcom,sm8650-inline-crypto-engine
+                - qcom,sm8750-inline-crypto-engine
+
+    then:
+      required:
+        - power-domains
+
 examples:
   - |
     #include <dt-bindings/clock/qcom,sm8550-gcc.h>

---
base-commit: aff5f30d65bddca7e5eb635119057688e6c04135
change-id: 20261016-ice-e1d8ba304436

Best regards,

Signature · 1 line
Varadarajan Narayanan <[email protected]>
maintainer
#1 lore raw
Quoted 11 lines · Varadarajan Narayanan

Document the Inline Crypto Engine compatibles for the Qualcomm IPQ5210, IPQ5424 and IPQ9650 SoCs.

Separate the power-domains requirement from the two-clock requirement. IPQ5210/IPQ5424/IPQ9650 require two clocks but intentionally do not require power-domains because they have no RPM.

Preserve the existing requirements for other platforms.

Quoted 8 lines

---
Changes in v2:
- Fix sort order in the !power-domains block
- Pick R-b Krzysztof
- Link to v1: https://lore.kernel.org/r/[email protected]

---
 .../bindings/crypto/qcom,inline-crypto-engine.yaml | 27 +++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

Patch applied. Thanks.

Signature · 3 lines
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt