ARM: rockchip: add smp functionality
Subsystems (6)
Heiko Stübner
maintainerv7 cover ARM: rockchip: add smp functionality
This series enables the use of the additional cores on Rockchip Cortex-A9 SoCs.
To achieve this, add the scu, the needed sram and power-management-unit.
Tested on both a BQ Curie2 (rk3066a / dual core) and on a Radxa Rock (rk3188 / quad core).
changes since v6:
- address comments from Mark Rutland
- using of_property_read_u32_index instead of parsing the list manually
- include v4 of "of: add functions to count number of elements in a property" to not have to count property-elements manually anymore
changes since v5:
- Grant Likely liked it better to "specify reserved regions of the memory instead of the valid ranges", so go back to the mmio-sram-reserved property originally suggested by Rob Herring
changes since v4:
- rebase on top of the recent rk3188 board support
- implement suggestion from Matt Sealey in moving the sram-limit from marking reserved regions to marking available regions - hopefully I got the usage right
- remove __CPUINIT as suggested by Fabio Estevam
changes since v3:
- address comments from Rob Herring:
- split the gathering of the reserve-data into a separate loop
- spelling and style fixes
- first patch only included for reference, already part of the char-misc git tree
changes since v2:
- rework the sram allocation following the suggestion from Philipp Zabel
changes since v1:
- add reserved block feature for mmio-sram, to not use two logical sram nodes
- the sram content is kept intact while the device is running, so copying the trampoline is only needed once
Heiko Stuebner (7):
of: add functions to count number of elements in a property
dt-bindings: sram: describe option to reserve parts of the memory
misc: sram: implement mmio-sram-reserved option
ARM: rockchip: add snoop-control-unit
ARM: rockchip: add sram dt nodes and documentation
ARM: rockchip: add power-management-unit
ARM: rockchip: add smp bringup code
.../devicetree/bindings/arm/rockchip/pmu.txt | 16 ++ .../devicetree/bindings/arm/rockchip/smp-sram.txt | 23 +++ Documentation/devicetree/bindings/misc/sram.txt | 8 + arch/arm/boot/dts/rk3066a.dtsi | 6 + arch/arm/boot/dts/rk3188.dtsi | 6 + arch/arm/boot/dts/rk3xxx.dtsi | 10 + arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/core.h | 22 +++ arch/arm/mach-rockchip/headsmp.S | 30 +++ arch/arm/mach-rockchip/platsmp.c | 208 ++++++++++++++++++++ arch/arm/mach-rockchip/rockchip.c | 2 + drivers/misc/sram.c | 121 +++++++++++- drivers/of/base.c | 32 +++ include/linux/of.h | 76 +++++++ 15 files changed, 554 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.txt create mode 100644 Documentation/devicetree/bindings/arm/rockchip/smp-sram.txt create mode 100644 arch/arm/mach-rockchip/core.h create mode 100644 arch/arm/mach-rockchip/headsmp.S create mode 100644 arch/arm/mach-rockchip/platsmp.c
Signature · 1 line
1.7.10.4
Heiko Stübner
maintainerPATCH v7 1/7 of: add functions to count number of elements in a property
The need to know the number of array elements in a property is a common pattern. To prevent duplication of open-coded implementations add a helper static function that also centralises strict sanity checking and DTB format details, as well as a set of wrapper functions for u8, u16, u32 and u64.
---
This is the same as v4 when this patch was separate, that was a result of the discussion in in v6 of the rockchip-smp series.
drivers/of/base.c | 32 ++++++++++++++++++++++ include/linux/of.h | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+)
drivers/of/base.c +32 -0
@@ -883,6 +883,38 @@ struct device_node *of_find_node_by_phandle(phandle handle)EXPORT_SYMBOL (of_find_node_by_phandle);/** +* of_property_count_elems_of_size - Count the number of elements in a property +* +* @np: device node from which the property value is to be read. +* @propname: name of the property to be searched. +* @elem_size: size of the individual element +* +* Search for a property in a device node and count the number of elements of +* size elem_size in it. Returns number of elements on sucess, -EINVAL if the +* property does not exist or its length does not match a multiple of elem_size +* and -ENODATA if the property does not have a value. +*/ +int of_property_count_elems_of_size (const struct device_node *np, +const char *propname,int elem_size) +{ +struct property *prop =of_find_property (np, propname,NULL ); + +if (!prop) +return -EINVAL ; +if (!prop->value) +return -ENODATA ; + +if (prop->length % elem_size !=0 ) { +pr_err ("size of %s in node %s is not a multiple of %d\n" , + propname, np->full_name, elem_size); +return -EINVAL ; + } + +return prop->length / elem_size; +} +EXPORT_SYMBOL_GPL (of_property_count_elems_of_size); + +/** * of_find_property_value_of_size * * @np: device node from which the property value is to be read.
include/linux/of.h +76 -0
94 lines not on this page · raw message
Signature · 1 line
1.7.10.4
Heiko Stübner
maintainerPATCH v7 2/7 dt-bindings: sram: describe option to reserve parts of the memory
In reply to Heiko StübnerSome SoCs need parts of their sram for special purposes. So while being part of the peripheral, it should not be part of the genpool controlling the sram.
Therefore add an option mmio-sram-reserved to keep arbitrary portions of the sram from general usage.
--- Documentation/devicetree/bindings/misc/sram.txt | 8 ++++++++ 1 file changed, 8 insertions(+)
Documentation/devicetree/bindings/misc/sram.txt +8 -0
@@ -8,9 +8,17 @@ Required properties: - reg : SRAM iomem address range +Optional properties: + +- mmio-sram-reserved: ordered list of reserved chunks inside the sram that + should not be used by the operating system. + Format is <base size>, <base size>, ...; with base being relative to the + reg property base. + Example: sram: sram at 5c000000 { compatible = "mmio-sram"; reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */ + mmio-sram-reserved = <0x0 0x100>; /* reserve 0x5c000000-0x5c000100 */ };
Signature · 1 line
1.7.10.4
PATCH v7 2/7 dt-bindings: sram: describe option to reserve parts of the memory
Quoted 19 lines · Heiko St??bner
Some SoCs need parts of their sram for special purposes. So while being part of the peripheral, it should not be part of the genpool controlling the sram.
Therefore add an option mmio-sram-reserved to keep arbitrary portions of the sram from general usage.
Suggested-by Rob Herring <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>Tested-by Ulrich Prinz <[email protected]>Acked-by Rob Herring <[email protected]>--- Documentation/devicetree/bindings/misc/sram.txt | 8 ++++++++ 1 file changed, 8 insertions(+)Documentation/devicetree/bindings/misc/sram.txt +0
-0
Documentation/devicetree/bindings/misc/sram.txt Required properties: · line 17
Quoted 10 lines
Documentation/devicetree/bindings/misc/sram.txt +7
-0@@ -8,9 +8,17 @@ Required properties: - reg : SRAM iomem address range +Optional properties: + +- mmio-sram-reserved: ordered list of reserved chunks inside the sram that + should not be used by the operating system. + Format is <base size>, <base size>, ...; with base being relative to the + reg property base. +
We've now got a draft binding for reserved memory. Can you use the format here? Basically each reserved region is a sub node with either a reg property or a size property.
This is specifically for sram, so I won't make a big deal about it, but it would be good to have some commonality.
g.
Heiko Stübner
maintainerRe: [PATCH v7 2/7] dt-bindings: sram: describe option to reserve parts of the memory
Am Mittwoch, 5. Februar 2014, 11:12:47 schrieb Grant Likely:
Quoted 40 lines · Heiko St??bner
Quoted 32 lines
Some SoCs need parts of their sram for special purposes. So while being part of the peripheral, it should not be part of the genpool controlling the sram.
Therefore add an option mmio-sram-reserved to keep arbitrary portions of the sram from general usage.
Suggested-by Rob Herring <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>Tested-by Ulrich Prinz <[email protected]>Acked-by Rob Herring <[email protected]>---
Documentation/devicetree/bindings/misc/sram.txt | 8 ++++++++ 1 file changed, 8 insertions(+)(quoted diff) +0
-0
b/Documentation/devicetree/bindings/misc/sram.txtindex 4d0a00e..09ee7a3 100644Documentation/devicetree/bindings/misc/sram.txt +3
-0@@ -8,9 +8,17 @@ Required properties: - reg : SRAM iomem address range +Optional properties: + +- mmio-sram-reserved: ordered list of reserved chunks inside the sramthat
Documentation/devicetree/bindings/misc/sram.txt +2
-0+ should not be used by the operating system. + Format is <base size>, <base size>, ...; with base being relative tothe
Documentation/devicetree/bindings/misc/sram.txt Required properties: · line 17
Quoted 2 lines
Documentation/devicetree/bindings/misc/sram.txt +2
-0+ reg property base. +We've now got a draft binding for reserved memory. Can you use the format here? Basically each reserved region is a sub node with either a reg property or a size property.
Quoted 2 lines
This is specifically for sram, so I won't make a big deal about it, but it would be good to have some commonality.
I guess you're talking about "[PATCH v2 0/5] reserved-memory regions/CMA in devicetree, again", right?
In general I'm all for commonality :-). So I guess you mean it to look something like the following:
sram: sram at 10080000 {
compatible = "rockchip,rk3066-sram", "mmio-sram";
reg = <0x10080000 0x8000>;
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
smp at 200 {
/* hmm, relative or absolute, aka 0x200 or 0x10080200? */
reg = <0x200 0x50>;
};
};
};As it looks like only a slight modification of my "parsing" code this should be doable. Do you suggest more changes to the example above?
Heiko
PATCH v7 2/7 dt-bindings: sram: describe option to reserve parts of the memory
Quoted 65 lines · Heiko St??bner
Am Mittwoch, 5. Februar 2014, 11:12:47 schrieb Grant Likely:
Quoted 40 lines · Heiko St????bner
Quoted 32 lines
Some SoCs need parts of their sram for special purposes. So while being part of the peripheral, it should not be part of the genpool controlling the sram.
Therefore add an option mmio-sram-reserved to keep arbitrary portions of the sram from general usage.
Suggested-by Rob Herring <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>Tested-by Ulrich Prinz <[email protected]>Acked-by Rob Herring <[email protected]>---
Documentation/devicetree/bindings/misc/sram.txt | 8 ++++++++ 1 file changed, 8 insertions(+)(quoted diff) +0
-0
b/Documentation/devicetree/bindings/misc/sram.txtindex 4d0a00e..09ee7a3 100644Documentation/devicetree/bindings/misc/sram.txt +3
-0@@ -8,9 +8,17 @@ Required properties: - reg : SRAM iomem address range +Optional properties: + +- mmio-sram-reserved: ordered list of reserved chunks inside the sramthat
Documentation/devicetree/bindings/misc/sram.txt +2
-0+ should not be used by the operating system. + Format is <base size>, <base size>, ...; with base being relative tothe
Documentation/devicetree/bindings/misc/sram.txt Required properties: · line 17
Quoted 2 lines
Documentation/devicetree/bindings/misc/sram.txt +2
-0+ reg property base. +We've now got a draft binding for reserved memory. Can you use the format here? Basically each reserved region is a sub node with either a reg property or a size property.
Quoted 2 lines
This is specifically for sram, so I won't make a big deal about it, but it would be good to have some commonality.
I guess you're talking about "[PATCH v2 0/5] reserved-memory regions/CMA in devicetree, again", right?
In general I'm all for commonality :-). So I guess you mean it to look something like the following:
sram: sram at 10080000 { compatible = "rockchip,rk3066-sram", "mmio-sram"; reg = <0x10080000 0x8000>; reserved-memory { #address-cells = <1>; #size-cells = <1>; smp at 200 { /* hmm, relative or absolute, aka 0x200 or 0x10080200? */ reg = <0x200 0x50>; }; }; };
Quoted 2 lines
As it looks like only a slight modification of my "parsing" code this should be doable. Do you suggest more changes to the example above?
I think the reserved-memory node can actually be dropped in this case. The only reason we had it for main memory is to deal with regions that traverse multiple memory nodes. You don't have that case so you can make the smp at 200 node a direct child of SRAM. All the semantics would be the same otherwise.
It would be useful to allow compatible values or phandle references to the reserved regions, and the SRAM driver would be responsible to avoid any region defined unless told explicitly that the region can be used. Not using a child region is a sensible default for any SRAM driver when it doesn't have any information otherwise.
g.
Heiko Stübner
maintainerPATCH v7 3/7 misc: sram: implement mmio-sram-reserved option
In reply to Heiko StübnerThis implements support for the mmio-sram-reserved option to keep the genpool from using these areas.
--- drivers/misc/sram.c | 121 +++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 113 insertions(+), 8 deletions(-)
drivers/misc/sram.c +113 -8
@@ -36,13 +36,23 @@ struct sram_dev {struct clk *clk; }; +struct sram_reserve { +u32 start; +u32 size; +}; +static int sram_probe (struct platform_device *pdev) {void __iomem *virt_base;struct sram_dev *sram;struct resource *res; -unsigned long size; -int ret; +struct device_node *np = pdev->dev.of_node; +unsigned long size, cur_start, cur_size; +int reserved_size =0 ; +struct sram_reserve *rblocks; +unsigned int nblocks; +int ret =0 ; +int i; res =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); virt_base =devm_ioremap_resource (&pdev->dev, res);
@@ -65,19 +75,114 @@ static int sram_probe(struct platform_device *pdev)if (!sram->pool)return -ENOMEM ; - ret =gen_pool_add_virt (sram->pool, (unsigned long )virt_base, - res->start, size,-1 ); -if (ret <0 ) { -if (sram->clk) -clk_disable_unprepare (sram->clk); -return ret; +if (np) { + reserved_size =of_property_count_u32_elems (np, +"mmio-sram-reserved" ); + +/* mmio-sram-reserved is optional, so its absence is no error */ +if (reserved_size <0 ) + reserved_size =0 ; + +if (reserved_size %2 ) { +dev_warn (&pdev->dev,"wrong number of arguments in mmio-sram-reserved\n" ); + reserved_size =0 ; + } + } + +/* +* We need an additional block to mark the end of the memory region +* after the reserved blocks from the dt are processed. +*/ + nblocks = reserved_size /2 +1 ; + rblocks =kmalloc ((nblocks) *sizeof (*rblocks),GFP_KERNEL ); +if (!rblocks) { + ret = -ENOMEM ; + goto err_alloc; + } + + cur_start =0 ; +for (i =0 ; i < nblocks -1 ; i++) { +/* checked the property exists above so can skip return vals */ +of_property_read_u32_index (np,"mmio-sram-reserved" , +2 * i, &rblocks[i].start); +of_property_read_u32_index (np,"mmio-sram-reserved" , +2 * i +1 , &rblocks[i].size); + +if (rblocks[i].start < cur_start) { +dev_err (&pdev->dev, +"unsorted reserved list (0x%x before current 0x%lx)\n" , + rblocks[i].start, cur_start); + ret = -EINVAL ; + goto err_chunks; + } + +if (rblocks[i].start >= size) { +dev_err (&pdev->dev, +"reserved block at 0x%x outside the sram size 0x%lx\n" , + rblocks[i].start, size); + ret = -EINVAL ; + goto err_chunks; + } + +if (rblocks[i].start + rblocks[i].size > size) { +dev_warn (&pdev->dev, +"reserved block at 0x%x to large, trimming\n" , + rblocks[i].start); + rblocks[i].size = size - rblocks[i].start; + } + + cur_start = rblocks[i].start + rblocks[i].size; + +dev_dbg (&pdev->dev,"found reserved block 0x%x-0x%x\n" , + rblocks[i].start, + rblocks[i].start + rblocks[i].size); + } + +/* the last chunk marks the end of the region */ + rblocks[nblocks -1 ].start = size; + rblocks[nblocks -1 ].size =0 ; + + cur_start =0 ; +for (i =0 ; i < nblocks; i++) { +/* current start is in a reserved block, so continue after it */ +if (rblocks[i].start == cur_start) { + cur_start = rblocks[i].start + rblocks[i].size; +continue ; + } + +/* +* allocate the space between the current starting +* address and the following reserved block, or the +* end of the region. +*/ + cur_size = rblocks[i].start - cur_start; + +dev_dbg (&pdev->dev,"adding chunk 0x%lx-0x%lx\n" , + cur_start, cur_start + cur_size); + ret =gen_pool_add_virt (sram->pool, + (unsigned long )virt_base + cur_start, + res->start + cur_start, cur_size,-1 ); +if (ret <0 ) + goto err_chunks; + +/* next allocation after this reserved block */ + cur_start = rblocks[i].start + rblocks[i].size; } +kfree (rblocks); +platform_set_drvdata (pdev, sram);dev_dbg (&pdev->dev,"SRAM pool: %ld KiB @ 0x%p\n" , size /1024 , virt_base);return 0 ; + +err_chunks: +kfree (rblocks); +err_alloc: +if (sram->clk) +clk_disable_unprepare (sram->clk); +return ret; }static int sram_remove (struct platform_device *pdev)
Signature · 1 line
1.7.10.4
Heiko Stübner
maintainerPATCH v7 4/7 ARM: rockchip: add snoop-control-unit
In reply to Heiko StübnerThis adds the device-node and config select to enable the scu in all Rockchip Cortex-A9 SoCs.
--- arch/arm/boot/dts/rk3xxx.dtsi | 5 +++++ arch/arm/mach-rockchip/Kconfig | 1 + 2 files changed, 6 insertions(+)
arch/arm/boot/dts/rk3xxx.dtsi +5 -0
@@ -26,6 +26,11 @@ compatible = "simple-bus"; ranges; + scu at 1013c000 { + compatible = "arm,cortex-a9-scu"; + reg = <0x1013c000 0x100>; + }; + gic: interrupt-controller at 1013d000 { compatible = "arm,cortex-a9-gic"; interrupt-controller;
arch/arm/mach-rockchip/Kconfig +1 -0
@@ -5,6 +5,7 @@ config ARCH_ROCKCHIP select ARCH_REQUIRE_GPIOLIB select ARM_GIC select CACHE_L2X0 + select HAVE_ARM_SCU select HAVE_ARM_TWD if SMP select HAVE_SMP select COMMON_CLK
Signature · 1 line
1.7.10.4
Heiko Stübner
maintainerPATCH v7 5/7 ARM: rockchip: add sram dt nodes and documentation
In reply to Heiko StübnerAdd dt-nodes for the sram on rk3066 and rk3188 including the reserved section needed for smp bringup.
--- .../devicetree/bindings/arm/rockchip/smp-sram.txt | 23 ++++++++++++++++++++ arch/arm/boot/dts/rk3066a.dtsi | 6 +++++ arch/arm/boot/dts/rk3188.dtsi | 6 +++++ 3 files changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rockchip/smp-sram.txt
Documentation/devicetree/bindings/arm/rockchip/smp-sram.txt new file +23 -0
@@ -0,0 +1,23 @@ +Rockchip SRAM for smp bringup: +------------------------------ + +Rockchip's smp-capable SoCs use the first part of the sram for the bringup +of the cores. Once the core gets powered up it executes the code that is +residing at the very beginning of the sram. + +Therefore a reserved section has to be added to the mmio-sram declaration. + +Required node properties: +- compatible : should contain both "rockchip,rk3066-sram", "mmio-sram" + so that the smp code can select the correct sram node. + +The rest of the properties should follow the generic mmio-sram discription +found in ../../misc/sram.txt + +Example: + + sram: sram at 10080000 { + compatible = "rockchip,rk3066-sram", "mmio-sram"; + reg = <0x10080000 0x10000>; + mmio-sram-reserved = <0x0 0x50>; + };
arch/arm/boot/dts/rk3066a.dtsi +6 -0
@@ -64,6 +64,12 @@ clock-names = "timer", "pclk"; }; + sram: sram at 10080000 { + compatible = "rockchip,rk3066-sram", "mmio-sram"; + reg = <0x10080000 0x10000>; + mmio-sram-reserved = <0x0 0x50>; + }; + pinctrl at 20008000 { compatible = "rockchip,rk3066a-pinctrl"; reg = <0x20008000 0x150>;
arch/arm/boot/dts/rk3188.dtsi +6 -0
@@ -60,6 +60,12 @@ interrupts = <GIC_PPI 13 0xf04>; }; + sram: sram at 10080000 { + compatible = "rockchip,rk3066-sram", "mmio-sram"; + reg = <0x10080000 0x8000>; + mmio-sram-reserved = <0x0 0x50>; + }; + pinctrl at 20008000 { compatible = "rockchip,rk3188-pinctrl"; reg = <0x20008000 0xa0>,
Signature · 1 line
1.7.10.4
Heiko Stübner
maintainerPATCH v7 6/7 ARM: rockchip: add power-management-unit
In reply to Heiko StübnerThe pmu is needed to bring up the cores during smp operations and later also other system parts. Therefore add a node and documentation for it.
--- Documentation/devicetree/bindings/arm/rockchip/pmu.txt | 16 ++++++++++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 5 +++++ 2 files changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.txt
Documentation/devicetree/bindings/arm/rockchip/pmu.txt new file +16 -0
@@ -0,0 +1,16 @@ +Rockchip power-management-unit: +------------------------------- + +The pmu is used to turn off and on different power domains of the SoCs +This includes the power to the CPU cores. + +Required node properties: +- compatible value : = "rockchip,rk3066-pmu"; +- reg : physical base address and the size of the registers window + +Example: + + pmu at 20004000 { + compatible = "rockchip,rk3066-pmu"; + reg = <0x20004000 0x100>; + };
arch/arm/boot/dts/rk3xxx.dtsi +5 -0
@@ -31,6 +31,11 @@ reg = <0x1013c000 0x100>; }; + pmu at 20004000 { + compatible = "rockchip,rk3066-pmu"; + reg = <0x20004000 0x100>; + }; + gic: interrupt-controller at 1013d000 { compatible = "arm,cortex-a9-gic"; interrupt-controller;
Signature · 1 line
1.7.10.4
Heiko Stübner
maintainerPATCH v7 7/7 ARM: rockchip: add smp bringup code
In reply to Heiko StübnerThis adds the necessary smp-operations and startup code to use additional cores on Rockchip SoCs.
We currently hog the power management unit in the smp code, as it is necessary to control the power to the cpu core and nothing else is currently using it, so a generic implementation can be done later.
--- arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/core.h | 22 ++++ arch/arm/mach-rockchip/headsmp.S | 30 ++++++ arch/arm/mach-rockchip/platsmp.c | 208 +++++++++++++++++++++++++++++++++++++ arch/arm/mach-rockchip/rockchip.c | 2 + 5 files changed, 263 insertions(+) create mode 100644 arch/arm/mach-rockchip/core.h create mode 100644 arch/arm/mach-rockchip/headsmp.S create mode 100644 arch/arm/mach-rockchip/platsmp.c
arch/arm/mach-rockchip/Makefile +1 -0
@@ -1 +1,2 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip.o +obj-$(CONFIG_SMP) += headsmp.o platsmp.o
arch/arm/mach-rockchip/core.h new file +22 -0
@@ -0,0 +1,22 @@ +/* +* Copyright (c) 2013 MundoReader S.L. +* Author: Heiko Stuebner <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +extern char rockchip_secondary_trampoline; +extern char rockchip_secondary_trampoline_end; + +extern unsigned long rockchip_boot_fn; +extern void rockchip_secondary_startup (void ); + +extern struct smp_operations rockchip_smp_ops;
arch/arm/mach-rockchip/headsmp.S new file +30 -0
@@ -0,0 +1,30 @@ +/* + * Copyright (c) 2013 MundoReader S.L. + * Author: Heiko Stuebner <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <linux/linkage.h> +#include <linux/init.h> + +ENTRY(rockchip_secondary_startup) + bl v7_invalidate_l1 + b secondary_startup +ENDPROC(rockchip_secondary_startup) + +ENTRY(rockchip_secondary_trampoline) + ldr pc, 1f +ENDPROC(rockchip_secondary_trampoline) + .globl rockchip_boot_fn +rockchip_boot_fn: +1: .space 4 + +ENTRY(rockchip_secondary_trampoline_end)
arch/arm/mach-rockchip/platsmp.c new file +208 -0
208 lines not on this page · raw message
arch/arm/mach-rockchip/rockchip.c +2 -0
@@ -22,6 +22,7 @@#include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/hardware/cache-l2x0.h> +#include "core.h" static void __init rockchip_dt_init (void ) {
@@ -38,6 +39,7 @@ static const char * const rockchip_board_dt_compat[] = { };DT_MACHINE_START (ROCKCHIP_DT ,"Rockchip Cortex-A9 (Device Tree)" ) + .smp = smp_ops(rockchip_smp_ops), .init_machine = rockchip_dt_init, .dt_compat = rockchip_board_dt_compat,MACHINE_END
Signature · 1 line
1.7.10.4
Heiko Stübner
maintainerPATCH v7 7/7 ARM: rockchip: add smp bringup code
This adds the necessary smp-operations and startup code to use additional cores on Rockchip SoCs.
We currently hog the power management unit in the smp code, as it is necessary to control the power to the cpu core and nothing else is currently using it, so a generic implementation can be done later.
---
As somehow was to be expected, I forgot to change the second user of the mmio-reserved data to use of_property_read_u32_index and the newly introduced element count function.
arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/core.h | 22 +++++ arch/arm/mach-rockchip/headsmp.S | 30 ++++++ arch/arm/mach-rockchip/platsmp.c | 196 +++++++++++++++++++++++++++++++++++++ arch/arm/mach-rockchip/rockchip.c | 2 + 5 files changed, 251 insertions(+) create mode 100644 arch/arm/mach-rockchip/core.h create mode 100644 arch/arm/mach-rockchip/headsmp.S create mode 100644 arch/arm/mach-rockchip/platsmp.c
arch/arm/mach-rockchip/Makefile +1 -0
@@ -1 +1,2 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip.o +obj-$(CONFIG_SMP) += headsmp.o platsmp.o
arch/arm/mach-rockchip/core.h new file +22 -0
@@ -0,0 +1,22 @@ +/* +* Copyright (c) 2013 MundoReader S.L. +* Author: Heiko Stuebner <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +extern char rockchip_secondary_trampoline; +extern char rockchip_secondary_trampoline_end; + +extern unsigned long rockchip_boot_fn; +extern void rockchip_secondary_startup (void ); + +extern struct smp_operations rockchip_smp_ops;
arch/arm/mach-rockchip/headsmp.S new file +30 -0
@@ -0,0 +1,30 @@ +/* + * Copyright (c) 2013 MundoReader S.L. + * Author: Heiko Stuebner <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <linux/linkage.h> +#include <linux/init.h> + +ENTRY(rockchip_secondary_startup) + bl v7_invalidate_l1 + b secondary_startup +ENDPROC(rockchip_secondary_startup) + +ENTRY(rockchip_secondary_trampoline) + ldr pc, 1f +ENDPROC(rockchip_secondary_trampoline) + .globl rockchip_boot_fn +rockchip_boot_fn: +1: .space 4 + +ENTRY(rockchip_secondary_trampoline_end)
arch/arm/mach-rockchip/platsmp.c new file +196 -0
196 lines not on this page · raw message
arch/arm/mach-rockchip/rockchip.c +2 -0
@@ -22,6 +22,7 @@#include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/hardware/cache-l2x0.h> +#include "core.h" static void __init rockchip_dt_init (void ) {
@@ -38,6 +39,7 @@ static const char * const rockchip_board_dt_compat[] = { };DT_MACHINE_START (ROCKCHIP_DT ,"Rockchip Cortex-A9 (Device Tree)" ) + .smp = smp_ops(rockchip_smp_ops), .init_machine = rockchip_dt_init, .dt_compat = rockchip_board_dt_compat,MACHINE_END
Signature · 1 line
1.7.10.4
Quoted 2 lines · On Monday, 20. January 2014 16:41:43 Heiko St?bner wrote:
This series enables the use of the additional cores on Rockchip Cortex-A9 SoCs.
So, two weeks without any general complaints, but I guess part of the more general patches could use an ack.
Going forward, what would be best way to merge them?
As one pull request to arm-soc, or for example splitting them into the first three patches going through the misc tree and the rockchip specific stuff going through arm-soc? Or something else altogether?
Quoted 2 lines
Heiko Stuebner (7):
of: add functions to count number of elements in a property
One of the intermediate versions of this patch got a
Mark, is this still true for this variant addressing some additional wished from Rob?
And this final version got a "Looks good" from Rob Herring in the original thread, but a more formal "ack" might be nice :-) .
Quoted 2 lines
dt-bindings: sram: describe option to reserve parts of the memory
misc: sram: implement mmio-sram-reserved option
Philipp, you acked an intermediate version, and this v7 now should also contain the two separate loops (1st gathering data and 2nd creating the pool parts) you asked for.
Could I persuade you to take a look again?
Thanks
Heiko
Quoted 28 lines
ARM: rockchip: add snoop-control-unit
ARM: rockchip: add sram dt nodes and documentation
ARM: rockchip: add power-management-unit
ARM: rockchip: add smp bringup code.../devicetree/bindings/arm/rockchip/pmu.txt | 16 ++ .../devicetree/bindings/arm/rockchip/smp-sram.txt | 23 +++ Documentation/devicetree/bindings/misc/sram.txt | 8 + arch/arm/boot/dts/rk3066a.dtsi | 6 + arch/arm/boot/dts/rk3188.dtsi | 6 + arch/arm/boot/dts/rk3xxx.dtsi | 10 + arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/core.h | 22 +++ arch/arm/mach-rockchip/headsmp.S | 30 +++ arch/arm/mach-rockchip/platsmp.c | 208 ++++++++++++++++++++ arch/arm/mach-rockchip/rockchip.c | 2 + drivers/misc/sram.c | 121 +++++++++++- drivers/of/base.c | 32 +++ include/linux/of.h | 76 +++++++ 15 files changed, 554 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.txt create mode 100644 Documentation/devicetree/bindings/arm/rockchip/smp-sram.txt create mode 100644 arch/arm/mach-rockchip/core.h create mode 100644 arch/arm/mach-rockchip/headsmp.S create mode 100644 arch/arm/mach-rockchip/platsmp.c
Rob Herring
Acked-byQuoted 16 lines · Heiko St?bner
Quoted 2 lines · On Monday, 20. January 2014 16:41:43 Heiko St?bner wrote:
This series enables the use of the additional cores on Rockchip Cortex-A9 SoCs.
So, two weeks without any general complaints, but I guess part of the more general patches could use an ack.
Going forward, what would be best way to merge them?
As one pull request to arm-soc, or for example splitting them into the first three patches going through the misc tree and the rockchip specific stuff going through arm-soc? Or something else altogether?Quoted 2 lines
Heiko Stuebner (7):
of: add functions to count number of elements in a property
Quoted 7 lines
One of the intermediate versions of this patch got a
Reviewed-by Mark Rutland <[email protected]> .Mark, is this still true for this variant addressing some additional wished from Rob?
And this final version got a "Looks good" from Rob Herring in the original thread, but a more formal "ack" might be nice :-) .
Rob
Quoted 45 lines
Quoted 4 lines
dt-bindings: sram: describe option to reserve parts of the memory
misc: sram: implement mmio-sram-reserved optionPhilipp, you acked an intermediate version, and this v7 now should also contain the two separate loops (1st gathering data and 2nd creating the pool parts) you asked for.
Could I persuade you to take a look again?
Thanks
HeikoQuoted 28 lines
ARM: rockchip: add snoop-control-unit
ARM: rockchip: add sram dt nodes and documentation
ARM: rockchip: add power-management-unit
ARM: rockchip: add smp bringup code.../devicetree/bindings/arm/rockchip/pmu.txt | 16 ++ .../devicetree/bindings/arm/rockchip/smp-sram.txt | 23 +++ Documentation/devicetree/bindings/misc/sram.txt | 8 + arch/arm/boot/dts/rk3066a.dtsi | 6 + arch/arm/boot/dts/rk3188.dtsi | 6 + arch/arm/boot/dts/rk3xxx.dtsi | 10 + arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/core.h | 22 +++ arch/arm/mach-rockchip/headsmp.S | 30 +++ arch/arm/mach-rockchip/platsmp.c | 208 ++++++++++++++++++++ arch/arm/mach-rockchip/rockchip.c | 2 + drivers/misc/sram.c | 121 +++++++++++- drivers/of/base.c | 32 +++ include/linux/of.h | 76 +++++++ 15 files changed, 554 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.txt create mode 100644 Documentation/devicetree/bindings/arm/rockchip/smp-sram.txt create mode 100644 arch/arm/mach-rockchip/core.h create mode 100644 arch/arm/mach-rockchip/headsmp.S create mode 100644 arch/arm/mach-rockchip/platsmp.c
Philipp Zabel
Acked-byHi Heiko,
Quoted 25 lines · Heiko St?bner
Quoted 2 lines · On Monday, 20. January 2014 16:41:43 Heiko St?bner wrote:
This series enables the use of the additional cores on Rockchip Cortex-A9 SoCs.
So, two weeks without any general complaints, but I guess part of the more general patches could use an ack.
Going forward, what would be best way to merge them?
As one pull request to arm-soc, or for example splitting them into the first three patches going through the misc tree and the rockchip specific stuff going through arm-soc? Or something else altogether?Quoted 2 lines
Heiko Stuebner (7):
of: add functions to count number of elements in a propertyOne of the intermediate versions of this patch got a
Reviewed-by Mark Rutland <[email protected]> .Mark, is this still true for this variant addressing some additional wished from Rob?
And this final version got a "Looks good" from Rob Herring in the original thread, but a more formal "ack" might be nice :-) .
Quoted 8 lines
Quoted 2 lines
dt-bindings: sram: describe option to reserve parts of the memory
misc: sram: implement mmio-sram-reserved optionPhilipp, you acked an intermediate version, and this v7 now should also contain the two separate loops (1st gathering data and 2nd creating the pool parts) you asked for.
Could I persuade you to take a look again?
regards
Philipp