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dmaengine: sh: Add Support SuperH DMA Engine driver

PATCH Superseded Nobuhiro Iwamatsu 2 participants 2 messages Sep 4, 2009 – Sep 5, 2009

Subsystems (2)
SuperH dmaengine

v6 of 7 Superseded Latest is v7 →

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Nobuhiro Iwamatsu

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PATCH v6 1/1 dmaengine: sh: Add Support SuperH DMA Engine driver

Hi, Dan.

Quoted 26 lines · Nobuhiro Iwamatsu

Hi, Dan.

Thank you for your check.

Quoted 12 lines · Dan Williams
Quoted 11 lines · Nobuhiro Iwamatsu

This supported all DMA channels, and it was tested in SH7722, SH7780 and SH7763.
This can not use with SH DMA API.

Signed-off-by Nobuhiro Iwamatsu <[email protected]>
Reviewed-by Matt Fleming <[email protected]>
Reviewed-by Dan Williams <[email protected]>
Acked-by Maciej Sosnowski <[email protected]>

---
v5: Fix some bug.
Add Cyclic extention API (got hint from dw_dmac.c)

Quoted 8 lines

Have you run this with CONFIG_PROVE_LOCKING=y? I suspect it will find some issues. It looks like desc_lock in the interrupt handler is only protecting updates to the CHCR register. In other places desc_lock is protecting descriptor chain updates. And the code varies from spin_lock to spin_lock_bh? If you can't move all register manipulations to bh or process context then you will most likely need a separate register_lock which can be taken with spin_lock_irq... see what CONFIG_PROVE_LOCKING reports.

Quoted 1 line

OK, I check this point, and send report.

I checked this.
Work fine.

I send update patch.

Best regards,
Nobuhiro

------

This supported all DMA channels, and it was tested in SH7722, SH7780, SH7785 and SH7763.
This can not use with SH DMA API.

Signed-off-by Nobuhiro Iwamatsu <[email protected]>
Reviewed-by Matt Fleming <[email protected]>
Reviewed-by Dan Williams <[email protected]>
Acked-by Maciej Sosnowski <[email protected]>
---
 arch/sh/drivers/dma/Kconfig  |   12 +-
 arch/sh/drivers/dma/Makefile |    3 +-
 arch/sh/include/asm/dma-sh.h |   13 +
 drivers/dma/Kconfig          |    8 +
 drivers/dma/Makefile         |    1 +
 drivers/dma/shdma.c          |  782 ++++++++++++++++++++++++++++++++++++++++++
 drivers/dma/shdma.h          |   63 ++++
 7 files changed, 877 insertions(+), 5 deletions(-)
 create mode 100644 drivers/dma/shdma.c
 create mode 100644 drivers/dma/shdma.h
arch/sh/drivers/dma/Kconfig +9 -3
index b91fa8d..4d58eb0 100644
@@ -1,12 +1,9 @@
 menu "DMA support"
 
-config SH_DMA_API
-	bool
 
 config SH_DMA
 	bool "SuperH on-chip DMA controller (DMAC) support"
 	depends on CPU_SH3 || CPU_SH4
-	select SH_DMA_API
 	default n
 
 config SH_DMA_IRQ_MULTI

@@ -19,6 +16,15 @@ config SH_DMA_IRQ_MULTI
 		     CPU_SUBTYPE_SH7780  || CPU_SUBTYPE_SH7785  || \
 		     CPU_SUBTYPE_SH7760
 
+config SH_DMA_API
+	depends on SH_DMA
+	bool "SuperH DMA API support"
+	default n
+	help
+	  SH_DMA_API always enabled DMA API of used SuperH.
+	  If you want to use DMA ENGINE, you must not enable this.
+	  Please enable DMA_ENGINE and SH_DMAE.
+
 config NR_ONCHIP_DMA_CHANNELS
 	int
 	depends on SH_DMA
arch/sh/drivers/dma/Makefile +1 -2
index c606813..d88c948 100644
@@ -2,8 +2,7 @@
 # Makefile for the SuperH DMA specific kernel interface routines under Linux.
 #
 
-obj-$(CONFIG_SH_DMA_API)	+= dma-api.o dma-sysfs.o
-obj-$(CONFIG_SH_DMA)		+= dma-sh.o
+obj-$(CONFIG_SH_DMA_API)	+= dma-sh.o dma-api.o dma-sysfs.o
 obj-$(CONFIG_PVR2_DMA)		+= dma-pvr2.o
 obj-$(CONFIG_G2_DMA)		+= dma-g2.o
 obj-$(CONFIG_SH_DMABRG)		+= dmabrg.o
arch/sh/include/asm/dma-sh.h +13 -0
index 68a5f4c..78eed3e 100644
@@ -116,4 +116,17 @@ static u32 dma_base_addr[] __maybe_unused = {
 #define CHCR    0x0C
 #define DMAOR	0x40
 
+/*
+ * for dma engine
+ *
+ * SuperH DMA mode
+ */
+#define SHDMA_MIX_IRQ	(1 << 1)
+#define SHDMA_DMAOR1	(1 << 2)
+#define SHDMA_DMAE1		(1 << 3)
+
+struct sh_dmae_pdata {
+	unsigned int mode;
+};
+
 #endif /* __DMA_SH_H */
drivers/dma/Kconfig +8 -0
index 377bd07..69341a8 100644
@@ -97,6 +97,14 @@ config TXX9_DMAC
 	  Support the TXx9 SoC internal DMA controller.  This can be
 	  integrated in chips such as the Toshiba TX4927/38/39.
 
+config SH_DMAE
+	tristate "Renesas SuperH DMAC support"
+	depends on SUPERH && SH_DMA
+	depends on !SH_DMA_API
+	select DMA_ENGINE
+	help
+	  Enable support for the Renesas SuperH DMA controllers.
+
 config DMA_ENGINE
 	bool
drivers/dma/Makefile +1 -0
index 40e1e00..af30516 100644
@@ -10,3 +10,4 @@ obj-$(CONFIG_DW_DMAC) += dw_dmac.o
 obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
 obj-$(CONFIG_MX3_IPU) += ipu/
 obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
+obj-$(CONFIG_SH_DMAE) += shdma.o
drivers/dma/shdma.c new file +780 -0

780 lines not on this page · raw message

drivers/dma/shdma.h new file +63 -0

63 lines not on this page · raw message

Signature · 1 line
1.6.3.3
#1 lore raw
Quoted 28 lines · Nobuhiro Iwamatsu

Hi, Dan.

Quoted 25 lines · Nobuhiro Iwamatsu

Hi, Dan.

Thank you for your check.

Quoted 20 lines · Dan Williams
Quoted 11 lines · Nobuhiro Iwamatsu

This supported all DMA channels, and it was tested in SH7722, SH7780 and SH7763.
This can not use with SH DMA API.

Signed-off-by Nobuhiro Iwamatsu <[email protected]>
Reviewed-by Matt Fleming <[email protected]>
Reviewed-by Dan Williams <[email protected]>
Acked-by Maciej Sosnowski <[email protected]>

---
v5: Fix some bug.
Add Cyclic extention API (got hint from dw_dmac.c)

Have you run this with CONFIG_PROVE_LOCKING=y? I suspect it will find some issues. It looks like desc_lock in the interrupt handler is only protecting updates to the CHCR register. In other places desc_lock is protecting descriptor chain updates. And the code varies from spin_lock to spin_lock_bh? If you can't move all register manipulations to bh or process context then you will most likely need a separate register_lock which can be taken with spin_lock_irq... see what CONFIG_PROVE_LOCKING reports.

Quoted 6 lines
Quoted 1 line

OK, I check this point, and send report.

I checked this.
Work fine.

I send update patch.

Yes, the locking looks better in this version. Can you respin this patch against async_tx.git/next [1]? The 'tx_list' field of struct dma_async_tx_descriptor is set to be removed in 2.6.32, so you need to define it locally in struct sh_desc. Once that is done and you get an ack from Paul I will add this to the queue for 2.6.32.

Thanks,
Dan

[1]:
git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx.git next