: EXYNOS: display 32bpp bitmap TIZEN logo
Subsystems (2)
PATCH v3 3/3 : EXYNOS: display 32bpp bitmap TIZEN logo
This patches support drawing 32bpp bitmap TIZEN logo in exynos fb. trats_logo.h data is compressed from trats_logo.bmp to trats_logo.bmp.gz by gzip and converted to trats_logo.h header file format by some application. And then it is decomressed at the exynos fb driver by gunzip_bmp().
---
Changes for v1:
- set CONFIG_SYS_VIDEO_LOGO_MAX_SIZE bigger than BMP header file size.
- drawing logo when boot_logo_on variable sets in board file.
- move trats_logo* header file to another patch.
- set RGB order depending on file format in board file.
- and so on.
Changes for v2:
- move fb_rgb_mode_t variable to include/lcd.h
- some bug fixes.
- define CONFIG_TIZEN
- use bmp_display() common display function
Changes for v3:
- use logo resulution variable.
- get logo info through get_tizen_logo_info()
- change draw_tizen_logo() to common draw_logo()
- and so on.
board/samsung/trats/trats.c | 5 +++++ drivers/video/exynos_fb.c | 27 +++++++++++++++++++++++++++ drivers/video/exynos_fb.h | 7 ------- drivers/video/exynos_fimd.c | 2 +- include/configs/trats.h | 6 +++++- include/lcd.h | 13 +++++++++++++ 6 files changed, 51 insertions(+), 9 deletions(-)
board/samsung/trats/trats.c +5 -0
@@ -37,6 +37,7 @@#include <pmic.h> #include <usb/s3c_udc.h> #include <max8997_pmic.h> +#include <libtizen.h> #include "setup.h"
@@ -489,10 +490,14 @@ vidinfo_t panel_info = { .reset_delay = 0, .interface_mode = FIMD_RGB_INTERFACE, .mipi_enabled = 1, + .logo_on = 1, + .resolution = HD_RESOLUTION, + .rgb_mode = MODE_BGR_P, };void init_panel_info (vidinfo_t *vid) { +get_tizen_logo_info ();strcpy (s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name); s6e8ax0_platform_data.lcd_power = lcd_power; s6e8ax0_platform_data.mipi_power = mipi_power;
drivers/video/exynos_fb.c +27 -0
@@ -64,6 +64,26 @@ static void exynos_lcd_init(vidinfo_t *vid)exynos_fimd_lcd_init (vid); } +static void draw_logo (void ) +{ +int x, y; +bmp_image_t *bmp; +ulong addr, len; + + x = ((panel_width - panel_info.logo_width) >>1 ); + y = ((panel_height - panel_info.logo_height) >>1 ) -4 ; + + addr = panel_info.logo_addr; + bmp = (bmp_image_t *)addr; + +if (!((bmp->header.signature[0 ]=='B' ) && + (bmp->header.signature[1 ]=='M' ))) { + addr = (ulong )gunzip_bmp (addr, &len); + } + +bmp_display ((ulong )addr, x, y); +} +static void lcd_panel_on (vidinfo_t *vid) {udelay (vid->init_delay);
@@ -115,6 +135,13 @@ void lcd_ctrl_init(void *lcdbase)void lcd_enable (void ) { +if (panel_info.logo_on) { +memset (lcd_base,0 , panel_width * panel_height * + (NBITS (panel_info.vl_bpix) >>3 )); + +draw_logo (); + } +lcd_panel_on (&panel_info); }
drivers/video/exynos_fb.h +0 -7
@@ -27,13 +27,6 @@#define MAX_CLOCK (86 * 1000000) -enum exynos_fb_rgb_mode_t { -MODE_RGB_P =0 , -MODE_BGR_P =1 , -MODE_RGB_S =2 , -MODE_BGR_S =3 , -}; -enum exynos_cpu_auto_cmd_rate {DISABLE_AUTO_FRM ,PER_TWO_FRM ,
drivers/video/exynos_fimd.c +1 -1
@@ -273,7 +273,7 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)/* store panel info to global variable */ pvid = vid; - rgb_mode =MODE_RGB_P ; + rgb_mode = vid->rgb_mode;if (vid->interface_mode ==FIMD_RGB_INTERFACE ) { cfg |=EXYNOS_VIDCON0_VIDOUT_RGB ;
include/configs/trats.h +5 -1
@@ -34,6 +34,7 @@#define CONFIG_S5P /* which is in a S5P Family */ #define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */ #define CONFIG_TRATS /* working with TRATS */ +#define CONFIG_TIZEN /* TIZEN lib */ #include <asm/arch/cpu.h> /* get chip and board defs */
@@ -216,9 +217,12 @@/* LCD */ #define CONFIG_EXYNOS_FB #define CONFIG_LCD +#define CONFIG_CMD_BMP +#define CONFIG_BMP_32BPP #define CONFIG_FB_ADDR 0x52504000#define CONFIG_S6E8AX0 #define CONFIG_EXYNOS_MIPI_DSIM -#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1280 * 720 * 4) +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12))#endif /* __CONFIG_H */
include/lcd.h +13 -0
@@ -190,6 +190,13 @@ enum { FIMD_CPU_INTERFACE = 2, }; +enum exynos_fb_rgb_mode_t { +MODE_RGB_P =0 , +MODE_BGR_P =1 , +MODE_RGB_S =2 , +MODE_BGR_S =3 , +}; + typedef struct vidinfo { ushort vl_col; /* Number of columns (i.e. 640) */ ushort vl_row; /* Number of rows (i.e. 480) */
@@ -235,6 +242,12 @@ typedef struct vidinfo {unsigned int wr_setup;unsigned int wr_act;unsigned int wr_hold; +unsigned int logo_on; +unsigned int logo_width; +unsigned int logo_height; +unsigned long logo_addr; +unsigned int rgb_mode; +unsigned int resolution;/* parent clock name(MPLL, EPLL or VPLL) */ unsigned int pclk_name;
Signature · 1 line
1.7.4.1