MXC: Add NAND support for i.MX31
Subsystems (3)
cover MXC: Add NAND support for i.MX31
Hi all,
This series adds NAND support for i.MX31 using the mxc_nand driver that was added for i.MX27. The same NAND flash controller is used in i.MX31.
Tested on i.MX31 Litekit. MAKEALL ARM11&ARM9 performed.
Regards, Magnus
Magnus Lilja (3):
MX31: Add struct definition for clock control module in i.MX31.
mxc_nand: Update driver to work with i.MX31.
MX31: Activate NAND support for i.MX31 Litekit board.
drivers/mtd/nand/mxc_nand.c | 34 ++++++++++++++++++++++++++-- include/asm-arm/arch-mx31/mx31-regs.h | 39 +++++++++++++++++++++++++++++++++ include/configs/imx31_litekit.h | 10 ++++++++ 3 files changed, 80 insertions(+), 3 deletions(-)
PATCH 1/3 MX31: Add struct definition for clock control module in i.MX31.
--- include/asm-arm/arch-mx31/mx31-regs.h | 39 +++++++++++++++++++++++++++++++++ 1 files changed, 39 insertions(+), 0 deletions(-)
include/asm-arm/arch-mx31/mx31-regs.h +39 -0
@@ -24,6 +24,45 @@#ifndef __ASM_ARCH_MX31_REGS_H#define __ASM_ARCH_MX31_REGS_H +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +#include <asm/types.h> + +/* Clock control module registers */ +struct clock_control_regs { +u32 ccmr; +u32 pdr0; +u32 pdr1; +u32 rcsr; +u32 mpctl; +u32 upctl; +u32 spctl; +u32 cosr; +u32 cgr0; +u32 cgr1; +u32 cgr2; +u32 wimr0; +u32 ldc; +u32 dcvr0; +u32 dcvr1; +u32 dcvr2; +u32 dcvr3; +u32 ltr0; +u32 ltr1; +u32 ltr2; +u32 ltr3; +u32 ltbr0; +u32 ltbr1; +u32 pmcr0; +u32 pmcr1; +u32 pdr2; +}; + +/* Bit definitions for RCSR register in CCM */ +#define CCM_RCSR_NF16B (1 << 31) +#define CCM_RCSR_NFMS (1 << 30) + +#endif +#define __REG (x) (*((volatile u32 *)(x)))#define __REG16 (x) (*((volatile u16 *)(x)))#define __REG8 (x) (*((volatile u8 *)(x)))
Signature · 1 line
1.5.6
PATCH 2/3 mxc_nand: Update driver to work with i.MX31.
Tested on i.MX31 Litekit.
--- drivers/mtd/nand/mxc_nand.c | 34 +++++++++++++++++++++++++++++++--- 1 files changed, 31 insertions(+), 3 deletions(-)
drivers/mtd/nand/mxc_nand.c +31 -3
@@ -149,6 +149,36 @@ static struct nand_ecclayout nand_soft_eccoob = { };#endif +#ifdef CONFIG_MX27 +static int is_16bit_nand (void ) +{ +struct system_control_regs *sc_regs = + (struct system_control_regs *)IMX_SYSTEM_CTL_BASE ; + +if (readl (&sc_regs->fmcr) &NF_16BIT_SEL ) +return 1 ; +else +return 0 ; +} +#elif defined(CONFIG_MX31 ) +static int is_16bit_nand (void ) +{ +struct clock_control_regs *sc_regs = + (struct clock_control_regs *)CCM_BASE ; + +if (readl (&sc_regs->rcsr) &CCM_RCSR_NF16B ) +return 1 ; +else +return 0 ; +} +#else +#warning "8/16 bit NAND autodetection not supported" +static int is_16bit_nand (void ) +{ +return 0 ; +} +#endif +static uint32_t *mxc_nand_memcpy32 (uint32_t *dest,uint32_t *source,size_t size) {uint32_t *d = dest;
@@ -808,8 +838,6 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,int board_nand_init (struct nand_chip *this) { -struct system_control_regs *sc_regs = - (struct system_control_regs *)IMX_SYSTEM_CTL_BASE ;struct mtd_info *mtd;uint16_t tmp;int err =0 ;
@@ -871,7 +899,7 @@ int board_nand_init(struct nand_chip *this)writew (0x4 , &host->regs->nfc_wrprot);/* NAND bus width determines access funtions used by upper layer */ -if (readl (&sc_regs->fmcr) &NF_16BIT_SEL ) +if (is_16bit_nand ()) this->options |=NAND_BUSWIDTH_16 ; host->pagesize_2k =0 ;
Signature · 1 line
1.5.6
PATCH 3/3 MX31: Activate NAND support for i.MX31 Litekit board.
--- include/configs/imx31_litekit.h | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-)
include/configs/imx31_litekit.h +10 -0
@@ -89,6 +89,7 @@#define CONFIG_CMD_PING #define CONFIG_CMD_SPI #define CONFIG_CMD_DATE +#define CONFIG_CMD_NAND #define CONFIG_BOOTDELAY 3
@@ -174,4 +175,13 @@#undef CONFIG_CMD_MTDPARTS#define CONFIG_JFFS2_DEV "nor0" +/* +* NAND +*/ +#define CONFIG_NAND_MXC +#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR +#define CONFIG_MXC_NAND_HWECC +#endif /* __CONFIG_H */
Signature · 1 line
1.5.6
PATCH 2/3 mxc_nand: Update driver to work with i.MX31.
In reply to Magnus LiljaQuoted 6 lines · Magnus Lilja
drivers/mtd/nand/mxc_nand.c +6
-0+#ifdef CONFIG_MX27 +static int is_16bit_nand (void ) +{ +struct system_control_regs *sc_regs = + (struct system_control_regs *)IMX_SYSTEM_CTL_BASE ; +
drivers/mtd/nand/mxc_nand.c static struct nand_ecclayout nand_soft_eccoob = { · line 167
Quoted 10 lines
drivers/mtd/nand/mxc_nand.c +10
-0+if (readl (&sc_regs->fmcr) &NF_16BIT_SEL ) +return 1 ; +else + return 0; +} +#elif defined(CONFIG_MX31) +static int is_16bit_nand (void ) +{ +struct clock_control_regs *sc_regs = + (struct clock_control_regs *)CCM_BASE ;
Maybe call the clock_control regs cc_regs?
Otherwise ACK, assuming this is ARM-tree bound.
-Scott