arm: mvebu: add Synology DS213j and DS414 .dts files
v2 cover arm: mvebu: add Synology DS213j and DS414 .dts files
Hi,
This series adds .dts files for Synology DS213j (armada 370 2-bay NAS) and DS414 (armada XP 4-bay NAS) devices. It is based on comments received on a v0 submission of DS213j .dts file [1] and Andrew's comments on a v1 ( for both DS213j and DS414 .dts files) [2].
Following previous comments, I have also added in the set 5 additional patches to:
- add 'micron' in vendor-prefixes.txt (note: NASDAQ symbol is 'mu')
- s/ssi/sii/ in kirkwood-synology.dtsi
- use uart0 label in armada-xp-lenovo-ix4-300d.dts for stdout-path
- move common UART0 and SPI0 pinctrl entries to armada-370.dtsi
- move common Ge0/1 RGMII and SPI0 pinctrl entries to armada-xp-mv78230.dtsi
Cheers,
a+
[1]: http://thread.gmane.org/gmane.linux.drivers.devicetree/95401
[2]: http://thread.gmane.org/gmane.linux.drivers.devicetree/98830
Changes since v1:
- Added a patch to fix Seiko Instruments, Inc. prefix from "ssi" to "sii" for s35390 RTC chip in kirkwood-synology.dtsi as reported by Andrew
- Fixed DS414 and DS213j .dts files which had the same issue due to a blind copy-and-paste.
- Added a patch for armada-xp-lenovo-ix4-300d.dts to use uart alias for stdout-path, as suggested by Andrew.
- removed pinctrl properties for ethernet interface wrongly referencing a RGMII pin configuration: the PHY is connected using SGMII.
- moved some DS213j pinctrl entries (spi0, uart0) in armada-370.dtsi
- same thing for DS414 pinctrl entries (ge0/1, spi0) moved to armada-xp-mv78230.dtsi
- changed pinctrl nodes and labels to match naming convention found in .dtsi: pmx_*: pmx- changed to *_pin: -pin.
- same thing for DS414
- added a comment in the .dts file about DS414 being susceptible at boot when an USB/serial converter is connected to the UART pins.
Changes since v0:
- Added a comment at the beginning of DS213j and DS414j .dts file regarding the need for a recent Marvell bootloader. Arnd suggested to do a specific .dtb file for new and old bootloaders but I think if we follow this path for DS414 and DS213j, we will probably have to do it for all Armada-based synology NAS and possibly for other Armada 370/XP based devices. Opting for recent bootloaders config and having a comment is easier. It is likely that a user already has a recent bootloader. Otherwise, upgrade is a one click process anyway. If a user thinks it is easier to have two different .dts files in the kernel, she will still be able to push a patch.
- Added a comment in the .dts file about the bootloader screwing the kernel if the environment is saved.
- Kept GPL licence for .dts file
- Fixed bad naming of node and alias (_ vs -)
- Added micron vendor prefix for n25q064 flash
- Disabled SoC RTC; a Seiko S-35390A is used as main RTC
- Added comments about the purpose of each serial port
- Added stdout-path = &uart0; to help barebox. A specific patch is included in the series to provide labels for uart serial nodes
- Added patch for DS414 .dts file
Arnaud Ebalard (8):
of: add "micron" vendor prefix for Micron
arm: mvebu: fix vendor prefix typo in kirkwood-synology.dtsi
arm: mvebu: add uartX labels for Armada SoC serial nodes
arm: mvebu: use recently introduced uart label for stdout-path
arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370
arm: mvebu: add common ge0/1 and spi0 pintcrl entries for Armada XP MV78230
arm: mvebu: add .dts file for Synology DS213j
arm: mvebu: add .dts file for Synology DS414
.../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/Makefile | 6 +- arch/arm/boot/dts/armada-370-synology-ds213j.dts | 323 ++++++++++++++++++++ arch/arm/boot/dts/armada-370-xp.dtsi | 5 +- arch/arm/boot/dts/armada-370.dtsi | 11 + arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 2 +- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 20 ++ arch/arm/boot/dts/armada-xp-synology-ds414.dts | 332 +++++++++++++++++++++ arch/arm/boot/dts/armada-xp.dtsi | 5 +- arch/arm/boot/dts/kirkwood-synology.dtsi | 2 +- 10 files changed, 699 insertions(+), 8 deletions(-) create mode 100644 arch/arm/boot/dts/armada-370-synology-ds213j.dts create mode 100644 arch/arm/boot/dts/armada-xp-synology-ds414.dts
Signature · 1 line
2.1.1
PATCH v2 1/8 of: add "micron" vendor prefix for Micron
Micron vendor prefix is not listed yet in vendor-prefixes.txt file. Even if the expected vendor prefix should be the NASDAQ symbol ("mu" in that case), it seems reasonable to use "micron" here because it is what is already found at various locations inside the kernel (see files under arch/arm/boot/dts/ for instance).
--- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/vendor-prefixes.txt +1 -0
@@ -96,6 +96,7 @@ mitsubishi Mitsubishi Electric Corporation mosaixtech Mosaix Technologies, Inc. moxa Moxa mpl MPL AG +micron Micron Technology, Inc. mundoreader Mundo Reader S.L. murata Murata Manufacturing Co., Ltd. mxicy Macronix International Co., Ltd.
Signature · 1 line
2.1.1
PATCH v2 2/8 arm: mvebu: fix vendor prefix typo in kirkwood-synology.dtsi
In reply to Arnaud EbalardAs reported by Andrew, the vendor prefix for Seiko Instruments, Inc. S-35390A I2C RTC chip in kirkwood-synology.dtsi has a typo (ssi instead of sii). This patches fixes it.
--- arch/arm/boot/dts/kirkwood-synology.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/kirkwood-synology.dtsi +1 -1
@@ -266,7 +266,7 @@ s35390a: s35390a at 30 { status = "disabled"; - compatible = "ssi,s35390a"; + compatible = "sii,s35390a"; reg = <0x30>; }; };
Signature · 1 line
2.1.1
PATCH v2 3/8 arm: mvebu: add uartX labels for Armada SoC serial nodes
In reply to Arnaud EbalardThis patch adds uartX labels for Armada SoC serial nodes. This is a preliminary work to be able to easily reference the serial lines in Device Tree files. One expected use is when providing stdout-path property for barebox.
--- arch/arm/boot/dts/armada-370-xp.dtsi | 5 +++-- arch/arm/boot/dts/armada-xp.dtsi | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-)
arch/arm/boot/dts/armada-370-xp.dtsi +3 -2
@@ -151,7 +151,7 @@ status = "disabled"; }; - serial at 12000 { + uart0: serial at 12000 { compatible = "snps,dw-apb-uart"; reg = <0x12000 0x100>; reg-shift = <2>;
@@ -160,7 +160,8 @@ clocks = <&coreclk 0>; status = "disabled"; }; - serial at 12100 { + + uart1: serial at 12100 { compatible = "snps,dw-apb-uart"; reg = <0x12100 0x100>; reg-shift = <2>;
arch/arm/boot/dts/armada-xp.dtsi +3 -2
@@ -52,7 +52,7 @@ reg = <0x11100 0x100>; }; - serial at 12200 { + uart2: serial at 12200 { compatible = "snps,dw-apb-uart"; reg = <0x12200 0x100>; reg-shift = <2>;
@@ -61,7 +61,8 @@ clocks = <&coreclk 0>; status = "disabled"; }; - serial at 12300 { + + uart3: serial at 12300 { compatible = "snps,dw-apb-uart"; reg = <0x12300 0x100>; reg-shift = <2>;
Signature · 1 line
2.1.1
PATCH v2 4/8 arm: mvebu: use recently introduced uart label for stdout-path
In reply to Arnaud EbalardNow that labels for uartX are available in Marvell Armada .dtsi files, this patch replaces the "/soc/internal-regs/serial at 12000" found in armada-xp-lenovo-ix4-300d.dts file for stdout-path property by the more concise &uart0.
--- arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts +1 -1
@@ -22,7 +22,7 @@ chosen { bootargs = "console=ttyS0,115200 earlyprintk"; - stdout-path = "/soc/internal-regs/serial at 12000"; + stdout-path = &uart0; }; memory {
Signature · 1 line
2.1.1
PATCH v2 5/8 arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370
In reply to Arnaud Ebalardpinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are common configurations. Instead of replicating them in each .dts file, put those in armada-370.dtsi file so that they can be referenced.
--- arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)
arch/arm/boot/dts/armada-370.dtsi +11 -0
@@ -115,6 +115,17 @@ compatible = "marvell,mv88f6710-pinctrl"; reg = <0x18000 0x38>; + uart0_pins: uart0-pins { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "uart0"; + }; + + spi0_pins: spi0-pins { + marvell,pins = "mpp33", "mpp34", + "mpp35", "mpp36"; + marvell,function = "spi0"; + }; + sdio_pins1: sdio-pins1 { marvell,pins = "mpp9", "mpp11", "mpp12", "mpp13", "mpp14", "mpp15";
Signature · 1 line
2.1.1
PATCH v2 6/8 arm: mvebu: add common ge0/1 and spi0 pintcrl entries for Armada XP MV78230
In reply to Arnaud Ebalardpinctrl entries for the two GbE interfaces using RGMII signaling w/ the PHY via MPP0-11/MPP12-23 and the spi0 interface using MPP36-39 are common configurations. Instead of replicating them in each .dts file, put those in armada-xp-mv78230.dtsi file so that they can be referenced.
--- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
arch/arm/boot/dts/armada-xp-mv78230.dtsi +20 -0
@@ -171,6 +171,26 @@ compatible = "marvell,mv78230-pinctrl"; reg = <0x18000 0x38>; + ge0_rgmii_pins: ge0-rgmii-pins { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10", "mpp11"; + marvell,function = "ge0"; + }; + + ge1_rgmii_pins: ge1-rgmii-pins { + marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", + "mpp16", "mpp17", "mpp18", "mpp19", + "mpp20", "mpp21", "mpp22", "mpp23"; + marvell,function = "ge1"; + }; + + spi0_pins: spi0-pins { + marvell,pins = "mpp36", "mpp37", + "mpp38", "mpp39"; + marvell,function = "spi"; + }; + sdio_pins: sdio-pins { marvell,pins = "mpp30", "mpp31", "mpp32", "mpp33", "mpp34", "mpp35";
Signature · 1 line
2.1.1
PATCH v2 7/8 arm: mvebu: add .dts file for Synology DS213j
In reply to Arnaud EbalardSynology DS213j is a 2-bay NAS powered by a Marvell Armada 370 (88F6710 @1.2Ghz). It is very similar on many aspects to previous 2-bay synology models based on Marvell kirkwood SoC. Here is a short summary of the device:
- 512MB RAM
- boot on SPI flash (64Mbit Micron N25Q064)
- 1 GbE interface (Armada MAC connected to a Marvell 88E1512 PHY via SGMII)
- 2 rear USB 2.0 ports (directly handled by the Armada 370)
- 2 internal SATA ports handled by the Armada 370: 2 GPIO for presence, 2 for powering them
- two front amber LED (disk1, disk2) controlled by the SoC
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a TI MSP430F2111)
- Fan handled via 4 GPIO (3 for speed, 1 for alarm)
--- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/armada-370-synology-ds213j.dts | 323 +++++++++++++++++++++++ 2 files changed, 325 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/armada-370-synology-ds213j.dts
arch/arm/boot/dts/Makefile +2 -1
@@ -495,7 +495,8 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \ armada-370-mirabox.dtb \ armada-370-netgear-rn102.dtb \ armada-370-netgear-rn104.dtb \ - armada-370-rd.dtb + armada-370-rd.dtb \ + armada-370-synology-ds213j.dtb dtb-$(CONFIG_MACH_ARMADA_375) += \ armada-375-db.dtb dtb-$(CONFIG_MACH_ARMADA_38X) += \
arch/arm/boot/dts/armada-370-synology-ds213j.dts new file +323 -0
323 lines not on this page · raw message
Signature · 1 line
2.1.1
PATCH v2 8/8 arm: mvebu: add .dts file for Synology DS414
In reply to Arnaud EbalardSynology DS414 is a 4-bay NAS powered by a Marvell Armada XP (mv78230 dual-core @1.33Ghz). It is very similar on many aspects to previous 4-bay synology models based on Marvell kirkwood SoC. Here is a short summary of the device:
- 1GB RAM
- Boot on SPI flash (64Mbit Micron N25Q064)
- 2 GbE interfaces (Armada MAC connected to two Marvell 88E1512 PHY via RGMII)
- 1 front USB 2.0 ports (directly handled by the Armada 370)
- 2 rear USB 3.0 ports (handled by an EtronTech EJ168A XHCI controller on the PCIe bus)
- 4 internal SATA ports handled by a Marvell 88SX7042 SATA-II controller on the PCIe bus)
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a Microchip PIC16F883)
Additional note: the front LEDs the and the two fans are not directly connected to the SoC and under its control. The former are presumably driven by the SATA controller, the latter by the PIC.
--- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/armada-xp-synology-ds414.dts | 332 +++++++++++++++++++++++++ 2 files changed, 334 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/armada-xp-synology-ds414.dts
arch/arm/boot/dts/Makefile +2 -1
@@ -509,7 +509,8 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \ armada-xp-lenovo-ix4-300d.dtb \ armada-xp-matrix.dtb \ armada-xp-netgear-rn2120.dtb \ - armada-xp-openblocks-ax3-4.dtb + armada-xp-openblocks-ax3-4.dtb \ + armada-xp-synology-ds414.dtb dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \ dove-cubox.dtb \ dove-cubox-es.dtb \
arch/arm/boot/dts/armada-xp-synology-ds414.dts new file +332 -0
332 lines not on this page · raw message
Signature · 1 line
2.1.1
PATCH v2 2/8 arm: mvebu: fix vendor prefix typo in kirkwood-synology.dtsi
In reply to Arnaud EbalardQuoted 7 lines · Arnaud Ebalard
As reported by Andrew, the vendor prefix for Seiko Instruments, Inc. S-35390A I2C RTC chip in
kirkwood-synology.dtsihas a typo (ssi instead of sii). This patches fixes it.Reported-by Andrew Lunn <[email protected]>Signed-off-by Arnaud Ebalard <[email protected]>
Thanks for the patch.
Andrewy
Quoted 26 lines
--- arch/arm/boot/dts/kirkwood-synology.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm/boot/dts/kirkwood-synology.dtsi +1
-1@@ -266,7 +266,7 @@ s35390a: s35390a at 30 { status = "disabled"; - compatible = "ssi,s35390a"; + compatible = "sii,s35390a"; reg = <0x30>; }; };Signature · 8 lines
2.1.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH v2 4/8 arm: mvebu: use recently introduced uart label for stdout-path
In reply to Arnaud EbalardQuoted 8 lines · Arnaud Ebalard
Now that labels for uartX are available in Marvell Armada .dtsi files, this patch replaces the "/soc/internal-regs/serial at 12000" found in
armada-xp-lenovo-ix4-300d.dtsfile for stdout-path property by the more concise &uart0.Suggested-by Andrew Lunn <[email protected]>Signed-off-by Arnaud Ebalard <[email protected]>
Thanks for the patch
Andrew
Quoted 26 lines
--- arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts +1
-1@@ -22,7 +22,7 @@ chosen { bootargs = "console=ttyS0,115200 earlyprintk"; - stdout-path = "/soc/internal-regs/serial at 12000"; + stdout-path = &uart0; }; memory {Signature · 8 lines
2.1.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH v2 5/8 arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370
In reply to Arnaud EbalardQuoted 16 lines · Arnaud Ebalard
pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are common configurations. Instead of replicating them in each .dts file, put those in
armada-370.dtsifile so that they can be referenced.Suggested-by Andrew Lunn <[email protected]>Signed-off-by Arnaud Ebalard <[email protected]>--- arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)arch/arm/boot/dts/armada-370.dtsi +0
-0
arch/arm/boot/dts/armada-370.dtsi line 121
Quoted 7 lines
arch/arm/boot/dts/armada-370.dtsi +4
-0@@ -115,6 +115,17 @@ compatible = "marvell,mv88f6710-pinctrl"; reg = <0x18000 0x38>; + uart0_pins: uart0-pins { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "uart0"; + };
Thanks for these.
We can go one stage further. kirkwood.dts has:
uart0: serial at 12000 {
compatible = "ns16550a";
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <33>;
clocks = <&gate_clk 7>;
pinctrl-0 = <&pmx_uart0>;
pinctrl-names = "default";
status = "disabled";
};i.e actually references them. This is safe because a board .dts file can override the pins if needed.
We should do the same here, both for 370 and XP.
Andrew
Quoted 19 lines
arch/arm/boot/dts/armada-370.dtsi +7
-0+ + spi0_pins: spi0-pins { + marvell,pins = "mpp33", "mpp34", + "mpp35", "mpp36"; + marvell,function = "spi0"; + }; + sdio_pins1: sdio-pins1 { marvell,pins = "mpp9", "mpp11", "mpp12", "mpp13", "mpp14", "mpp15";Signature · 8 lines
2.1.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH v2 5/8 arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370
Hi,
Quoted 40 lines · Andrew Lunn
Quoted 16 lines · Arnaud Ebalard
pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are common configurations. Instead of replicating them in each .dts file, put those in
armada-370.dtsifile so that they can be referenced.Suggested-by Andrew Lunn <[email protected]>Signed-off-by Arnaud Ebalard <[email protected]>--- arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)arch/arm/boot/dts/armada-370.dtsi +0
-0arch/arm/boot/dts/armada-370.dtsi line 121
Quoted 7 lines
arch/arm/boot/dts/armada-370.dtsi +4
-0@@ -115,6 +115,17 @@ compatible = "marvell,mv88f6710-pinctrl"; reg = <0x18000 0x38>; + uart0_pins: uart0-pins { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "uart0"; + };Thanks for these.
We can go one stage further.
kirkwood.dtshas:uart0: serial at 12000 { compatible = "ns16550a"; reg = <0x12000 0x100>; reg-shift = <2>; interrupts = <33>; clocks = <&gate_clk 7>; pinctrl-0 = <&pmx_uart0>; pinctrl-names = "default"; status = "disabled"; };
Quoted 4 lines
i.e actually references them. This is safe because a board .dts file can override the pins if needed.
We should do the same here, both for 370 and XP.
Just to be sure I understand: for uart0 and uart1, I think this can only be done for Armada 370 (on XP, uart0/1 rx/tx are not mpp).
This only a matter of adding the following in armada-370.dtsi for uart0:
/*
* Default UART pinctrl setting without RTS/CTS, can
* be overwritten on board level.
*/
uart0: serial at 12000 {
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};For uart1, it's not obvious because there are 6 different MPP which can be configured to act as uart1 TXD. Same for RXD. If I remove the ones overlapping w/ RGMII pins for GbE interfaces, which one should be selected as default: 41/42, 55/57, 60/61?
Now, regarding armada XP, uart2 and uart3 txd/rxd MPP are 42/43 and 44/45. Best we can do is put the same as above in each specific armada-xp-mv78XXX.dtsi file, where pinctrl node is, after adding uart2-pins and uart3-pins. Unless I am missing something, this cannot be done in armada-xp.dtsi.
Cheers,
a+
PATCH v2 5/8 arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370
Quoted 44 lines · Arnaud Ebalard
Hi,
Quoted 40 lines · Andrew Lunn
Quoted 16 lines · Arnaud Ebalard
pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are common configurations. Instead of replicating them in each .dts file, put those in
armada-370.dtsifile so that they can be referenced.Suggested-by Andrew Lunn <[email protected]>Signed-off-by Arnaud Ebalard <[email protected]>--- arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)arch/arm/boot/dts/armada-370.dtsi +0
-0arch/arm/boot/dts/armada-370.dtsi line 121
Quoted 7 lines
arch/arm/boot/dts/armada-370.dtsi +4
-0@@ -115,6 +115,17 @@ compatible = "marvell,mv88f6710-pinctrl"; reg = <0x18000 0x38>; + uart0_pins: uart0-pins { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "uart0"; + };Thanks for these.
We can go one stage further.
kirkwood.dtshas:uart0: serial at 12000 { compatible = "ns16550a"; reg = <0x12000 0x100>; reg-shift = <2>; interrupts = <33>; clocks = <&gate_clk 7>; pinctrl-0 = <&pmx_uart0>; pinctrl-names = "default"; status = "disabled"; };
Quoted 7 lines
Quoted 4 lines
i.e actually references them. This is safe because a board .dts file can override the pins if needed.
We should do the same here, both for 370 and XP.
Just to be sure I understand: for uart0 and uart1, I think this can only be done for Armada 370 (on XP, uart0/1 rx/tx are not mpp).
I must admit, i did not look at the datasheet for XP. So you can ignore XP.
Quoted 10 lines
This only a matter of adding the following in
armada-370.dtsifor uart0:/*
* Default UART pinctrl setting without RTS/CTS, can * be overwritten on board level. */ uart0: serial at 12000 { pinctrl-0 = <&uart0_pins>; pinctrl-names = "default"; };
Looks good.
Quoted 2 lines
For uart1, it's not obvious because there are 6 different MPP which can be configured to act as uart1 TXD.
That is too many configurations. So lets leave it per board.
Quoted 5 lines
Now, regarding armada XP, uart2 and uart3 txd/rxd MPP are 42/43 and 44/45. Best we can do is put the same as above in each specific
armada-xp-mv78XXX.dtsifile, where pinctrl node is, after adding uart2-pins and uart3-pins. Unless I am missing something, this cannot be done inarmada-xp.dtsi.
Actually, i think it can. But i could be wrong.
armada-370-xp.dtsi declares uart0 and uart1. armada-xp.dtsi then defined another two uart's, uart2 and uart3. You should be able to define the pinctrl nodes for the serial ports there, even if the main pinctrl node is in the SoC specific .dtsi file.
Andrew
PATCH v2 7/8 arm: mvebu: add .dts file for Synology DS213j
In reply to Arnaud Ebalardarch/arm/boot/dts/armada-370-synology-ds213j.dts line 86
Quoted 9 lines · Arnaud Ebalard
arch/arm/boot/dts/armada-370-synology-ds213j.dts new file +9
-0+ sata1_pres_pin: sata1-pres-pin { + marvell,pins = "mpp60"; + marvell,function = "gpio"; + }; + + sata2_pres_pin: sata2-pres-pin { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + };
Hi Arnaud
Are they above correct?
MPP_MODE(48,
MPP_FUNCTION(0x0, "gpio", NULL),
MPP_FUNCTION(0x1, "dev", "ad9"),
MPP_FUNCTION(0x2, "uart0", "rts"),
MPP_FUNCTION(0x3, "sd0", "cmd"),
MPP_FUNCTION(0x4, "sata1", "prsnt"),
MPP_FUNCTION(0x5, "spi0", "cs1")),and
MPP_MODE(60,
MPP_FUNCTION(0x0, "gpio", NULL),
MPP_FUNCTION(0x1, "dev", "ale1"),
MPP_FUNCTION(0x2, "uart1", "rxd"),
MPP_FUNCTION(0x3, "sata0", "prsnt"),
MPP_FUNCTION(0x4, "pcie", "rst-out"),
MPP_FUNCTION(0x5, "audio", "sdi")),Seems like function sata[01] would be better than gpio.
Also, i don't see you using these anywhere.
There are a few files in /sys which you might find interesting.
/sys/kernel/debug/pinctrl/f1018000.pinctrl/pinconf-groups shows you how pins are currently defined. These can be how Linux has set them, or if Linux has not touched them, how the boot loader set them.
/sys/kernel/debug/pinctrl/f1018000.pinctrl/pinmux-pins shows you what has been claimed by Linux, either as a gpio or for a specific function.
There are two schools of thoughts for pinctl. One is to leave the bootloader to configure the pins, and Linux should use them as they are. The other is that Linux should not trust the bootloader and configure the pins itself. With kirkwood we have tried to configure everything in Linux. I also think for these two boards, we should configure everything. The reason being the broken bootloader. I suspect because of the saveenv corruption, more than average are going to install a new uboot, or barebox image. A generic uboot might not get the pinctl correct, and a barebox image will be using the dtb blob to configure the pins. So it would be good to see that all pins which are used and claimed by a driver.
Thanks
Andrew
PATCH v2 7/8 arm: mvebu: add .dts file for Synology DS213j
Hi Andrew,
Quoted 33 lines · Andrew Lunn
arch/arm/boot/dts/armada-370-synology-ds213j.dts line 86
Quoted 9 lines · Arnaud Ebalard
arch/arm/boot/dts/armada-370-synology-ds213j.dts new file +9
-0+ sata1_pres_pin: sata1-pres-pin { + marvell,pins = "mpp60"; + marvell,function = "gpio"; + }; + + sata2_pres_pin: sata2-pres-pin { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + };Hi Arnaud
Are they above correct?
MPP_MODE(48, MPP_FUNCTION(0x0, "gpio", NULL), MPP_FUNCTION(0x1, "dev", "ad9"), MPP_FUNCTION(0x2, "uart0", "rts"), MPP_FUNCTION(0x3, "sd0", "cmd"), MPP_FUNCTION(0x4, "sata1", "prsnt"), MPP_FUNCTION(0x5, "spi0", "cs1")),and
MPP_MODE(60, MPP_FUNCTION(0x0, "gpio", NULL), MPP_FUNCTION(0x1, "dev", "ale1"), MPP_FUNCTION(0x2, "uart1", "rxd"), MPP_FUNCTION(0x3, "sata0", "prsnt"), MPP_FUNCTION(0x4, "pcie", "rst-out"), MPP_FUNCTION(0x5, "audio", "sdi")),
Quoted 3 lines
Seems like function sata[01] would be better than gpio.
Also, i don't see you using these anywhere.
The main reason is that I have (still a draft version of) a patch that adds a small feature to fixed regulator; the idea is to add an input signal (gpio/interrupt) to be able to start/stop the regulator. I have tested it on my RN102 and it works as expected.
ATM, disks on RN102, RN104 and RN2120 are powered by u-boot and I did not add fixed regulators to have Linux kernel do it. This means if you add a disk after boot which was not there at boot, it will not be powered. If you remove a disk that was there at boot, power will still be available.
With Synology NAS, it's a bit different: you need a fixed regulator to power the disks because u-boot will not start them, AFAICT.
In the end, the sata presence pins are declared as gpio in order to be able to use them as input signal for a modified fixed regulator. It's also to document their existence.
I have nothing against changing the function to sata[01] but how will those be used, by whom?
Quoted 9 lines
There are a few files in /sys which you might find interesting.
/sys/kernel/debug/pinctrl/f1018000.pinctrl/pinconf-groupsshows you how pins are currently defined. These can be how Linux has set them, or if Linux has not touched them, how the boot loader set them.
/sys/kernel/debug/pinctrl/f1018000.pinctrl/pinmux-pinsshows you what has been claimed by Linux, either as a gpio or for a specific function.
Will take a look.
Quoted 11 lines
There are two schools of thoughts for pinctl. One is to leave the bootloader to configure the pins, and Linux should use them as they are. The other is that Linux should not trust the bootloader and configure the pins itself. With kirkwood we have tried to configure everything in Linux. I also think for these two boards, we should configure everything. The reason being the broken bootloader. I suspect because of the saveenv corruption, more than average are going to install a new uboot, or barebox image. A generic uboot might not get the pinctl correct, and a barebox image will be using the dtb blob to configure the pins. So it would be good to see that all pins which are used and claimed by a driver.
I think I prefer second school. Relying on u-boot/barebox doing things may break at next bootloader update.
Cheers,
a+
PATCH v2 5/8 arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370
In reply to Andrew LunnQuoted 68 lines · Andrew Lunn
Quoted 44 lines · Arnaud Ebalard
Hi,
Quoted 40 lines · Andrew Lunn
Quoted 16 lines · Arnaud Ebalard
pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are common configurations. Instead of replicating them in each .dts file, put those in
armada-370.dtsifile so that they can be referenced.Suggested-by Andrew Lunn <[email protected]>Signed-off-by Arnaud Ebalard <[email protected]>--- arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)arch/arm/boot/dts/armada-370.dtsi +0
-0arch/arm/boot/dts/armada-370.dtsi line 121
Quoted 7 lines
arch/arm/boot/dts/armada-370.dtsi +4
-0@@ -115,6 +115,17 @@ compatible = "marvell,mv88f6710-pinctrl"; reg = <0x18000 0x38>; + uart0_pins: uart0-pins { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "uart0"; + };Thanks for these.
We can go one stage further.
kirkwood.dtshas:uart0: serial at 12000 { compatible = "ns16550a"; reg = <0x12000 0x100>; reg-shift = <2>; interrupts = <33>; clocks = <&gate_clk 7>; pinctrl-0 = <&pmx_uart0>; pinctrl-names = "default"; status = "disabled"; };Quoted 7 lines
Quoted 4 lines
i.e actually references them. This is safe because a board .dts file can override the pins if needed.
We should do the same here, both for 370 and XP.
Just to be sure I understand: for uart0 and uart1, I think this can only be done for Armada 370 (on XP, uart0/1 rx/tx are not mpp).
I must admit, i did not look at the datasheet for XP. So you can ignore XP.
Quoted 10 lines
This only a matter of adding the following in
armada-370.dtsifor uart0:/*
* Default UART pinctrl setting without RTS/CTS, can * be overwritten on board level. */ uart0: serial at 12000 { pinctrl-0 = <&uart0_pins>; pinctrl-names = "default"; };
Quoted 12 lines
Looks good.
Quoted 2 lines
For uart1, it's not obvious because there are 6 different MPP which can be configured to act as uart1 TXD.
That is too many configurations. So lets leave it per board.
Quoted 5 lines
Now, regarding armada XP, uart2 and uart3 txd/rxd MPP are 42/43 and 44/45. Best we can do is put the same as above in each specific
armada-xp-mv78XXX.dtsifile, where pinctrl node is, after adding uart2-pins and uart3-pins. Unless I am missing something, this cannot be done inarmada-xp.dtsi.
It would make sense to have a basic pinctrl node in armada-370-xp.dtsi already. It will only have the reg property set, which is IIRC the same for all SoCs. Each of the more specific dtsi will set what is common below that, i.e. armada-370.dtsi will have the compatible + 370 specific pinmux settings. For XP, the common pinmux settings will be in armada-xp.dtsi while the compatible is set later in each of the XP variant dtsi files.
Sebastian
Quoted 6 lines
Actually, i think it can. But i could be wrong.
armada-370-xp.dtsideclares uart0 and uart1.armada-xp.dtsithen defined another two uart's, uart2 and uart3. You should be able to define the pinctrl nodes for the serial ports there, even if the main pinctrl node is in the SoC specific .dtsi file.