Skip to contentSkip to conversation

Exynos SROMc configuration and Ethernet support for SMDK5410

PATCH Superseded Pavel Fedin 2 participants 6 messages Nov 12, 2015 – Nov 13, 2015

Subsystems (4)

v8 of 9 Superseded Latest is v9 →

lore
Share & tools
lore
#0 lore raw

v8 cover Exynos SROMc configuration and Ethernet support for SMDK5410

This patch extends Exynos SROM controller driver with ability to configure controller outputs and enables SMSC9115 Ethernet chip on SMDK5410 board, which is connected via SROMc bank #3.

With this patchset, support for the whole existing SMDK range can be added. Actually, only bank number is different.

This patchset also depends on Exynos 5410 pinctrl support, introduced by patches 0003 and 0004 from this set:
[PATCH v4 0/5] ARM: EXYNOS: ODROID-XU DT and LEDs
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/330862.html

Pinctrl support is necessary in order to correctly configure multifunctional pins of the Exynos chip.

v7 => v8:
- More fixes to documentation

v6 => v7:
- Fixed stupid error in Tacc description in the documentation

v5 => v6:
- Even more improvements to the documentation, fixed some errors and typos.
- Separated adding bus ranges from generic SROMc support
- Some stuff renamed for even better code readability
- Stylistic cleanups in the DTS (everything in alphabetic order, use named constant name for interrupt config byte)

v4 => v5:
- Some cosmetic changes in the dtsi ("compatible" goes first)
- Use correctly specified ranges for the SROMc node
- Reuse existing properties where possible ("reg" for bank# and "reg-io-width" for data width)
- Separated page-mode property from timings array
- More improvements to the documentation

v3 => v4:
- Devices are now added as subnodes, with additional properties. This allows to cleary specify dependency. If configuration fails, error will be reported and child devices will not be probed.
- These additional properties now have "samsung,srom-XXX" format
- Fixed code style, now better understood.

v2 => v3:
- Fixed up SROMc region size in the device tree
- Reordered patches, documentation goes first now

v1 => v2:
- Fixed some typos and bad labels in device tree
- Improved documentation

Pavel Fedin (4):
Documentation: dt-bindings: Describe SROMc configuration
ARM: dts: Add SROMc to Exynos 5410
drivers: exynos-srom: Add support for bank configuration
ARM: dts: Add Ethernet chip to SMDK5410

 .../bindings/arm/samsung/exynos-srom.txt           | 73 +++++++++++++++++++++-
 arch/arm/boot/dts/exynos5410-smdk5410.dts          | 41 ++++++++++++
 arch/arm/boot/dts/exynos5410.dtsi                  | 11 ++++
 arch/arm/mach-exynos/Kconfig                       |  2 +-
 drivers/soc/samsung/Kconfig                        |  2 +-
 drivers/soc/samsung/exynos-srom.c                  | 61 +++++++++++++++++-
 6 files changed, 184 insertions(+), 6 deletions(-)
Signature · 1 line
2.4.4
#1 lore raw

PATCH v8 1/4 Documentation: dt-bindings: Describe SROMc configuration

Add documentation for new subnode properties, allowing bank configuration. Based on u-boot implementation, but heavily reworked.

Also, fix size of SROMc mapping in the example.

---
 .../bindings/arm/samsung/exynos-srom.txt           | 73 +++++++++++++++++++++-
 1 file changed, 71 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt +71 -2
index 33886d5..07c8507 100644
@@ -5,8 +5,77 @@ Required properties:
 
 - reg: offset and length of the register set
 
-Example:
+Optional properties:
+The SROM controller can be used to attach external peripherals. In this case
+extra properties, describing the bus behind it, should be specified as below:
+
+- #address-cells: Must be set to 2 to allow device address translation.
+		  Address is specified as (bank#, offset).
+
+- #size-cells: Must be set to 1 to allow device size passing
+
+- ranges: Must be set up to reflect the memory layout with four integer values
+	  per bank:
+		<bank-number> 0 <parent address of bank> <size>
+
+Sub-nodes:
+The actual device nodes should be added as subnodes to the SROMc node. These
+subnodes, except regular device specification, should contain the following
+properties, describing configuration of the relevant SROM bank:
+
+Required properties:
+- reg: bank number, base address (relative to start of the bank) and size of
+       the memory mapped for the device. Note that base address will be
+       typically 0 as this is the start of the bank.
+
+- samsung,srom-timing : array of 6 integers, specifying bank timings in the
+                        following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
+                        Each value is specified in cycles and has the following
+                        meaning and valid range:
+                        Tacp : Page mode access cycle at Page mode (0 - 15)
+                        Tcah : Address holding time after CSn (0 - 15)
+                        Tcoh : Chip selection hold on OEn (0 - 15)
+                        Tacc : Access cycle (0 - 31, the actual time is N + 1)
+                        Tcos : Chip selection set-up before OEn (0 - 15)
+                        Tacs : Address set-up before CSn (0 - 15)
+
+Optional properties:
+- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used.
+
+- samsung,srom-page-mode : page mode configuration for the bank:
+			   0 - normal (one data)
+			   1 - four data
+			   If omitted, default of 0 is used.
+
+Example: basic definition, no banks are configured
+	sromc at 12570000 {
+		compatible = "samsung,exynos-srom";
+		reg = <0x12570000 0x14>;
+	};
+
+Example: SROMc with SMSC911x ethernet chip on bank 3
 	sromc at 12570000 {
+		#address-cells = <2>;
+		#size-cells = <1>;
+		ranges = <0 0 0x04000000 0x20000   // Bank0
+			  1 0 0x05000000 0x20000   // Bank1
+			  2 0 0x06000000 0x20000   // Bank2
+			  3 0 0x07000000 0x20000>; // Bank3
+
 		compatible = "samsung,exynos-srom";
-		reg = <0x12570000 0x10>;
+		reg = <0x12570000 0x14>;
+
+		ethernet at 3 {
+			compatible = "smsc,lan9115";
+			reg = <3 0 0x10000>;	   // Bank 3, offset = 0
+			phy-mode = "mii";
+			interrupt-parent = <&gpx0>;
+			interrupts = <5 8>;
+			reg-io-width = <2>;
+			smsc,irq-push-pull;
+			smsc,force-internal-phy;
+
+			samsung,srom-page-mode = <1>;
+			samsung,srom-timing = <9 12 1 9 1 1>;
+		};
 	};
Signature · 1 line
2.4.4
#3 lore raw

PATCH v8 2/4 ARM: dts: Add SROMc to Exynos 5410

In reply to Pavel Fedin

This machine uses own SoC device tree file, add missing part.

---
 arch/arm/boot/dts/exynos5410.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/boot/dts/exynos5410.dtsi +5 -0
index 4603356..e2b58f8 100644
@@ -101,6 +101,11 @@
 			reg = <0x10000000 0x100>;
 		};
 
+		sromc: sromc at 12250000 {
+			compatible = "samsung,exynos-srom";
+			reg = <0x12250000 0x14>;
+		};
+
 		pmu_system_controller: system-controller at 10040000 {
 			compatible = "samsung,exynos5410-pmu", "syscon";
 			reg = <0x10040000 0x5000>;
Signature · 1 line
2.4.4
#4 lore raw

PATCH v8 3/4 drivers: exynos-srom: Add support for bank configuration

In reply to Pavel Fedin

Implement handling properties in subnodes and adding child devices to the system. Child devices will not be added if configuration fails.

Since the driver now does more than suspend-resume support, dependency on CONFIG_PM is removed.

---
 arch/arm/mach-exynos/Kconfig      |  2 +-
 drivers/soc/samsung/Kconfig       |  2 +-
 drivers/soc/samsung/exynos-srom.c | 61 +++++++++++++++++++++++++++++++++++++--
 3 files changed, 61 insertions(+), 4 deletions(-)
arch/arm/mach-exynos/Kconfig +1 -1
index 83c85f5..c22dc42 100644
@@ -16,7 +16,7 @@ menuconfig ARCH_EXYNOS
 	select ARM_GIC
 	select COMMON_CLK_SAMSUNG
 	select EXYNOS_THERMAL
-	select EXYNOS_SROM if PM
+	select EXYNOS_SROM
 	select HAVE_ARM_SCU if SMP
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
drivers/soc/samsung/Kconfig +1 -1
index 2833b5b..ea4bc2a 100644
@@ -8,6 +8,6 @@ config SOC_SAMSUNG
 
 config EXYNOS_SROM
 	bool
-	depends on ARM && ARCH_EXYNOS && PM
+	depends on ARM && ARCH_EXYNOS
 
 endmenu
drivers/soc/samsung/exynos-srom.c +59 -2

83 lines not on this page · raw message

Signature · 1 line
2.4.4
#5 lore raw

PATCH v8 4/4 ARM: dts: Add Ethernet chip to SMDK5410

In reply to Pavel Fedin

The chip is smsc9115, connected via SROMc bank 3. Additionally, some GPIO initialization is required.

---
 arch/arm/boot/dts/exynos5410-smdk5410.dts | 41 +++++++++++++++++++++++++++++++
 arch/arm/boot/dts/exynos5410.dtsi         |  6 +++++
 2 files changed, 47 insertions(+)
arch/arm/boot/dts/exynos5410-smdk5410.dts +41 -0
index cebeaab..373abf7 100644
@@ -11,6 +11,7 @@
 
 /dts-v1/;
 #include "exynos5410.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
 / {
 	model = "Samsung SMDK5410 board based on EXYNOS5410";
 	compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
@@ -61,6 +62,46 @@
 	disable-wp;
 };
 
+&pinctrl_0 {
+	srom_ctl: srom-ctl {
+		samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5",
+			       "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3";
+		samsung,pin-function = <2>;
+		samsung,pin-drv = <0>;
+	};
+
+	srom_ebi: srom-ebi {
+		samsung,pins = "gpy3-0", "gpy3-1", "gpy3-2", "gpy3-3",
+			       "gpy3-4", "gpy3-5", "gpy3-6", "gpy3-7",
+			       "gpy5-0", "gpy5-1", "gpy5-2", "gpy5-3",
+			       "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7",
+			       "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3",
+			       "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&sromc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&srom_ctl>, <&srom_ebi>;
+
+	ethernet at 3 {
+		compatible = "smsc,lan9115";
+		reg = <3 0 0x10000>;
+		phy-mode = "mii";
+		interrupt-parent = <&gpx0>;
+		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+		reg-io-width = <2>;
+		smsc,irq-push-pull;
+		smsc,force-internal-phy;
+
+		samsung,srom-page-mode = <1>;
+		samsung,srom-timing = <9 12 1 9 1 1>;
+	};
+};
+
 &uart0 {
 	status = "okay";
 };
arch/arm/boot/dts/exynos5410.dtsi +6 -0
index e2b58f8..9cfb814 100644
@@ -104,6 +104,12 @@
 		sromc: sromc at 12250000 {
 			compatible = "samsung,exynos-srom";
 			reg = <0x12250000 0x14>;
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges = <0 0 0x04000000 0x20000
+				  1 0 0x05000000 0x20000
+				  2 0 0x06000000 0x20000
+				  3 0 0x07000000 0x20000>;
 		};
 
 		pmu_system_controller: system-controller at 10040000 {
Signature · 1 line
2.4.4
Acked-by on v8 1/4
#2 lore raw

Re: [PATCH v8 1/4] Documentation: dt-bindings: Describe SROMc configuration

In reply to Pavel Fedin
Quoted 7 lines · Pavel Fedin

Add documentation for new subnode properties, allowing bank configuration. Based on u-boot implementation, but heavily reworked.

Also, fix size of SROMc mapping in the example.

One nit below.

Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt Required properties: · line 68

Quoted 5 lines
                compatible = "samsung,exynos-srom";
Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt +3 -1
-               reg = <0x12570000 0x10>;
+               reg = <0x12570000 0x14>;
+
+               ethernet at 3 {

This should actually be "ethernet at 3,0"

Fields (not cells) in the unit address should be separated by commas.

Quoted 16 lines
Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt +12 -1
+                       compatible = "smsc,lan9115";
+                       reg = <3 0 0x10000>;       // Bank 3, offset = 0
+                       phy-mode = "mii";
+                       interrupt-parent = <&gpx0>;
+                       interrupts = <5 8>;
+                       reg-io-width = <2>;
+                       smsc,irq-push-pull;
+                       smsc,force-internal-phy;
+
+                       samsung,srom-page-mode = <1>;
+                       samsung,srom-timing = <9 12 1 9 1 1>;
+               };
        };
--

2.4.4