J-Core SPI controller support
Subsystems (3)
Rich Felker
maintainerv4 cover J-Core SPI controller support
This driver is used with the J2, an open-source VHDL reimplementation of SH-2. I've split it out from the main J-Core support patches going upstream through my own linux-sh tree. Changes since the v3 should include everything requested by Mark Brown in previous review (mainly the chipsel changes I failed to make before), plus significant cleanup (removal of unused macros and other cruft) and refactoring to eliminate duplicate code.
Rich
Rich Felker (2):
of: add J-Core SPI master bindings
spi: add driver for J-Core SPI controller
.../devicetree/bindings/spi/jcore,spi.txt | 30 +++ drivers/spi/Kconfig | 4 + drivers/spi/Makefile | 1 + drivers/spi/spi-jcore.c | 220 +++++++++++++++++++++ 4 files changed, 255 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/jcore,spi.txt create mode 100644 drivers/spi/spi-jcore.c
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Rich Felker
maintainerPATCH v4 1/2 of: add J-Core SPI master bindings
--- .../devicetree/bindings/spi/jcore,spi.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/jcore,spi.txt
Documentation/devicetree/bindings/spi/jcore,spi.txt new file +30 -0
@@ -0,0 +1,30 @@ +J-Core SPI master + +Required properties: + +- compatible: Must be "jcore,spi2". + +- reg: Memory region for registers. + +- #address-cells: Must be 1. + +- #size-cells: Must be 0. + +Optional properties: + +- clock-frequency: Specifies an input clock frequency relative to + which the SPI clock speed must be programmed. Necessary only if + the input clock rate is something other than 50 MHz. + +See spi-bus.txt for additional properties not specific to this device. + +Example: + +spi@40 { + compatible = "jcore,spi2"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40 0x8>; + spi-max-frequency = <25000000>; + clock-frequency = <50000000>; +}
Signature · 1 line
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Re: [PATCH v4 1/2] of: add J-Core SPI master bindings
Quoted 5 lines · Rich Felker
Signed-off-by Rich Felker <[email protected]>--- .../devicetree/bindings/spi/jcore,spi.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/jcore,spi.txt
Rich Felker
maintainerRe: [PATCH v4 1/2] of: add J-Core SPI master bindings
Quoted 8 lines · Rob Herring
Quoted 5 lines · Rich Felker
Signed-off-by Rich Felker <[email protected]>--- .../devicetree/bindings/spi/jcore,spi.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/jcore,spi.txtAcked-by Rob Herring <[email protected]>
Thanks. Since I switched to to using the clk framework rather than a clock-frequency property (at Mark Brown's suggestion/request), I'll be submitting one more version for your review.
After that, who should be responsible for upstreaming this and the other binding patches? You, me, or the subsystem maintainers that the drivers are going through?
Rich
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Rob Herring
maintainerRe: [PATCH v4 1/2] of: add J-Core SPI master bindings
Quoted 10 lines · Rich Felker
Quoted 8 lines · Rob Herring
Quoted 5 lines · Rich Felker
Signed-off-by Rich Felker <[email protected]>--- .../devicetree/bindings/spi/jcore,spi.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/jcore,spi.txtAcked-by Rob Herring <[email protected]>
Quoted 7 lines
Thanks. Since I switched to to using the clk framework rather than a clock-frequency property (at Mark Brown's suggestion/request), I'll be submitting one more version for your review.
After that, who should be responsible for upstreaming this and the other binding patches? You, me, or the subsystem maintainers that the drivers are going through?
Mark will take the SPI changes. I generally only take standalone binding patches thru the DT tree.
Rob
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Rich Felker
maintainerPATCH v4 2/2 spi: add driver for J-Core SPI controller
In reply to Rich FelkerThe J-Core "spi2" device is a PIO-based SPI master controller. It differs from "bitbang" devices in that that it's clocked in hardware rather than via soft clock modulation over gpio, and performs byte-at-a-time transfers between the cpu and SPI controller.
This driver will be extended to support future versions of the J-Core SPI controller with DMA transfers when they become available.
--- drivers/spi/Kconfig | 4 + drivers/spi/Makefile | 1 + drivers/spi/spi-jcore.c | 220 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 225 insertions(+) create mode 100644 drivers/spi/spi-jcore.c
drivers/spi/Kconfig +4 -0
@@ -285,6 +285,10 @@ config SPI_IMX This enables using the Freescale i.MX SPI controllers in master mode. +config SPI_JCORE + tristate "J-Core SPI Master" + depends on OF + config SPI_LM70_LLP tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" depends on PARPORT
drivers/spi/Makefile +1 -0
@@ -46,6 +46,7 @@ obj-$(CONFIG_SPI_FSL_SPI) += spi-fsl-spi.o obj-$(CONFIG_SPI_GPIO) += spi-gpio.o obj-$(CONFIG_SPI_IMG_SPFI) += spi-img-spfi.o obj-$(CONFIG_SPI_IMX) += spi-imx.o +obj-$(CONFIG_SPI_JCORE) += spi-jcore.o obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o obj-$(CONFIG_SPI_LP8841_RTC) += spi-lp8841-rtc.o obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o
drivers/spi/spi-jcore.c new file +220 -0
220 lines not on this page · raw message
Signature · 1 line
2.8.1
Mark Brown
maintainerRe: [PATCH v4 2/2] spi: add driver for J-Core SPI controller
drivers/spi/Kconfig config SPI_IMX · line 291
Quoted 4 lines · Rich Felker
drivers/spi/Kconfig +4
-0+config SPI_JCORE + tristate "J-Core SPI Master" + depends on OF +
An architecture or SoC dependency with || COMPILE_TEST would be useful for avoiding cluttering Kconfig for other users. Though as this is in a FPGA it's perhaps likely people will pick this up for other FPGAs so perhaps a comment to that effect if it seems likely.
drivers/spi/spi-jcore.c line 84
Quoted 5 lines
drivers/spi/spi-jcore.c new file +5
-0+static void jcore_spi_baudrate (struct jcore_spi *hw,int speed) +{ +if (speed == hw->speed_hz)return ; + hw->speed_hz = speed; +if (speed >= hw->clock_freq/2 )
Coding style, spaces around /.
drivers/spi/spi-jcore.c line 131
Quoted 1 line
drivers/spi/spi-jcore.c new file +1
-0+return count<len ? -EREMOTEIO :0 ;
Again here, and please also write this as a normal if statement so it's easier to read.
drivers/spi/spi-jcore.c line 179
Quoted 9 lines
drivers/spi/spi-jcore.c new file +9
-0+/* The SPI clock rate controlled via a configurable clock divider +* which is applied to the reference clock. A 50 MHz reference is +* most suitable for obtaining standard SPI clock rates, but some +* designs may have a different reference clock, and the DT must +* make the driver aware so that it can properly program the +* requested rate. If omitted, 50 MHz is assumed. */ + clock_freq =50000000 ; +of_property_read_u32 (node,"clock-frequency" , &clock_freq); + hw->clock_freq = clock_freq;
Why are you not using the clock API for this? Just require a clock and use clk_get_rate() to find out what rate it is.
drivers/spi/spi-jcore.c line 185
Quoted 1 line
drivers/spi/spi-jcore.c new file +1
-0+ pdev->dev.dma_mask =0 ;
Why are we doing this? There's no DMA code...
drivers/spi/spi-jcore.c line 190
Quoted 1 line
drivers/spi/spi-jcore.c new file +1
-0+dev_info (&pdev->dev,"base %p, noirq\n" , hw->base);
This is just adding noise to the boot, just remove it - it's useful to log information we get from the silicon but things like the base address don't really add anything and end up cluttering (and slowing) the boot when everything does it.
Rich Felker
maintainerRe: [PATCH v4 2/2] spi: add driver for J-Core SPI controller
Quoted 11 lines · Mark Brown
drivers/spi/Kconfig config SPI_IMX · line 291
Quoted 4 lines · Rich Felker
drivers/spi/Kconfig +4
-0+config SPI_JCORE + tristate "J-Core SPI Master" + depends on OF +An architecture or SoC dependency with ||
COMPILE_TESTwould be useful for avoiding clutteringKconfigfor other users. Though as this is in a FPGA it's perhaps likely people will pick this up for other FPGAs so perhaps a comment to that effect if it seems likely.
Unlike some of the other SoC hardware (interrupt controller) that's more closely tied to the SH cpu trap behavior, the SPI master seems like something that would be nice and easy to reuse elsewhere. I don't feel strongly about it either way though; I can add the arch dep if you want.
Quoted 7 lines
drivers/spi/spi-jcore.c line 84
Quoted 5 lines
drivers/spi/spi-jcore.c new file +5
-0+static void jcore_spi_baudrate (struct jcore_spi *hw,int speed) +{ +if (speed == hw->speed_hz)return ; + hw->speed_hz = speed; +if (speed >= hw->clock_freq/2 )Coding style, spaces around /.
OK.
Quoted 4 lines
drivers/spi/spi-jcore.c line 131
Quoted 1 line
drivers/spi/spi-jcore.c new file +1
-0+return count<len ? -EREMOTEIO :0 ;Again here, and please also write this as a normal if statement so it's easier to read.
OK.
Quoted 4 lines
Quoted 4 lines
drivers/spi/spi-jcore.c new file +4
-0+/* The SPI clock rate controlled via a configurable clock divider +* which is applied to the reference clock. A 50 MHz reference is +* most suitable for obtaining standard SPI clock rates, but some +* designs may have a different reference clock, and the DT must
Quoted 8 lines
drivers/spi/spi-jcore.c line 179
Quoted 5 lines
drivers/spi/spi-jcore.c new file +5
-0+* make the driver aware so that it can properly program the +* requested rate. If omitted, 50 MHz is assumed. */ + clock_freq =50000000 ; +of_property_read_u32 (node,"clock-frequency" , &clock_freq); + hw->clock_freq = clock_freq;Why are you not using the clock API for this? Just require a clock and use
clk_get_rate()to find out what rate it is.
I thought about that but I'm not familiar with it. I can try to figure it out quickly and test that approach; don't see any reason it shouldn't work. Would you insist on having full support for enabling/disabling the clk when it's in use, or would you be happy with treating it as a fixed clock that's always-on for now and possibly extending it with more functionality later if there's ever hardware where that's relevant/helpful?
Quoted 3 lines
drivers/spi/spi-jcore.c line 185
Quoted 1 line
drivers/spi/spi-jcore.c new file +1
-0+ pdev->dev.dma_mask =0 ;Why are we doing this? There's no DMA code...
There will be later, but I can remove this for now if it's not needed.
Quoted 6 lines
drivers/spi/spi-jcore.c line 190
Quoted 1 line
drivers/spi/spi-jcore.c new file +1
-0+dev_info (&pdev->dev,"base %p, noirq\n" , hw->base);This is just adding noise to the boot, just remove it - it's useful to log information we get from the silicon but things like the base address don't really add anything and end up cluttering (and slowing) the boot when everything does it.
OK.
Rich
Mark Brown
maintainerRe: [PATCH v4 2/2] spi: add driver for J-Core SPI controller
Quoted 7 lines · Rich Felker
Quoted 4 lines · Mark Brown
An architecture or SoC dependency with ||
COMPILE_TESTwould be useful for avoiding clutteringKconfigfor other users. Though as this is in a FPGA it's perhaps likely people will pick this up for other FPGAs so perhaps a comment to that effect if it seems likely.
Quoted 5 lines
Unlike some of the other SoC hardware (interrupt controller) that's more closely tied to the SH cpu trap behavior, the SPI master seems like something that would be nice and easy to reuse elsewhere. I don't feel strongly about it either way though; I can add the arch dep if you want.
I guess it depends if anyone is actually doing that or not, if nobody is the dependency would be better.
Quoted 10 lines
Quoted 2 lines
Why are you not using the clock API for this? Just require a clock and use
clk_get_rate()to find out what rate it is.I thought about that but I'm not familiar with it. I can try to figure it out quickly and test that approach; don't see any reason it shouldn't work. Would you insist on having full support for enabling/disabling the clk when it's in use, or would you be happy with treating it as a fixed clock that's always-on for now and possibly extending it with more functionality later if there's ever hardware where that's relevant/helpful?
It's fine to just enable it at startup and leave it on, though the runtime PM ops are trivial and you can set auto_runtime_pm to have the core do the gets and puts.
Rich Felker
maintainerRe: [PATCH v4 2/2] spi: add driver for J-Core SPI controller
Quoted 8 lines · Mark Brown
Quoted 6 lines · Rich Felker
Quoted 4 lines · Mark Brown
An architecture or SoC dependency with ||
COMPILE_TESTwould be useful for avoiding clutteringKconfigfor other users. Though as this is in a FPGA it's perhaps likely people will pick this up for other FPGAs so perhaps a comment to that effect if it seems likely.
Quoted 8 lines
Quoted 5 lines
Unlike some of the other SoC hardware (interrupt controller) that's more closely tied to the SH cpu trap behavior, the SPI master seems like something that would be nice and easy to reuse elsewhere. I don't feel strongly about it either way though; I can add the arch dep if you want.
I guess it depends if anyone is actually doing that or not, if nobody is the dependency would be better.
OK, let's add the dependency for now with the intent to remove it if/when there's a need.
Quoted 11 lines
Quoted 10 lines
Quoted 2 lines
Why are you not using the clock API for this? Just require a clock and use
clk_get_rate()to find out what rate it is.I thought about that but I'm not familiar with it. I can try to figure it out quickly and test that approach; don't see any reason it shouldn't work. Would you insist on having full support for enabling/disabling the clk when it's in use, or would you be happy with treating it as a fixed clock that's always-on for now and possibly extending it with more functionality later if there's ever hardware where that's relevant/helpful?
Quoted 3 lines
It's fine to just enable it at startup and leave it on, though the runtime PM ops are trivial and you can set
auto_runtime_pmto have the core do the gets and puts.
I was able to get it working via the clk api and I'll include support for this in the next version of the patch, but to actually use it depends on changing arch/sh to use the common clk framework; otherwise there's no way to provide a suitable clk in the DT and have [devm_]clk_get actually pick it up. Should I keep around the option of using clock-frequency too? That would be most convenient.
I do have a pending patch from Sato-san to switch arch/sh over to CCF but it's part of a series and I don't think it's ready to merge. I may be able to merge just a minimal, safe subset that won't break legacy non-DT configurations, though.
Rich
Mark Brown
maintainerRe: [PATCH v4 2/2] spi: add driver for J-Core SPI controller
Quoted 6 lines · Rich Felker
I was able to get it working via the clk api and I'll include support for this in the next version of the patch, but to actually use it depends on changing
arch/shto use the common clk framework; otherwise there's no way to provide a suitable clk in the DT and have [devm_]clk_get actually pick it up. Should I keep around the option of using clock-frequency too? That would be most convenient.
It sounds like at the minute the devices all have one frequency anyway in which case just having a default frequency in there that you fall back to if you get -ENOENT from a failed clock lookup might be enough?
Rich Felker
maintainerRe: [PATCH v4 2/2] spi: add driver for J-Core SPI controller
Quoted 9 lines · Mark Brown
Quoted 6 lines · Rich Felker
I was able to get it working via the clk api and I'll include support for this in the next version of the patch, but to actually use it depends on changing
arch/shto use the common clk framework; otherwise there's no way to provide a suitable clk in the DT and have [devm_]clk_get actually pick it up. Should I keep around the option of using clock-frequency too? That would be most convenient.
Quoted 3 lines
It sounds like at the minute the devices all have one frequency anyway in which case just having a default frequency in there that you fall back to if you get
-ENOENTfrom a failed clock lookup might be enough?
Yes. 50 MHz is the natural default frequency, but I found out at the last minute from the hardware engineers that clocking the current SoC up to 62.5 MHz (for faster cpu) will require the SPI timing to be programmed based on the faster reference clock. This messes up the ability to get optimal SD card transfer rates, so we'll probably end up having a real 50 MHz clock for the SPI anyway, but I thought it was important to be able to handle this issue in the DT binding anyway.
Since it's not an immediate need right now anyway I'll drop the clock-frequency property proposal and just use the more general clocks approach you suggested.
Rich
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Re: [PATCH v4 2/2] spi: add driver for J-Core SPI controller
Quoted 7 lines · Rich Felker
Yes. 50 MHz is the natural default frequency, but I found out at the last minute from the hardware engineers that clocking the current SoC up to 62.5 MHz (for faster cpu) will require the SPI timing to be programmed based on the faster reference clock. This messes up the ability to get optimal SD card transfer rates, so we'll probably end up having a real 50 MHz clock for the SPI anyway, but I thought it was important to be able to handle this issue in the DT binding anyway.
For those of you following along at home, the first open source VHDL release of http://j-core.org runs at 33 mhz on Spartan 6 FPGAs, the second at 50mhz on the same hardware, and you'd think the third would be 66mhz as the chip continues to be optimized, but one of the new I/O busses requires a multiple of 12.5 mhz and they didn't want to add a clock domain crossing thing for it, hence 62.5 mhz.
Earlier it was easy to get everything to work off a single master clock, but as we add more peripherals to the SOC and speed things up stuff's likely to change. (Development is ongoing, and we have a public
http://j-core.org/roadmap.html out through 2019. It you're waiting for stuff to stop changing before getting basic board support in that runs on existing releases, it's might be a while.)
Rob
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Re: [PATCH v4 2/2] spi: add driver for J-Core SPI controller
In reply to Rich FelkerHi Rich,
Quoted 25 lines · Rich Felker
Quoted 13 lines · Mark Brown
Quoted 11 lines · Rich Felker
Quoted 2 lines · Mark Brown
Why are you not using the clock API for this? Just require a clock and use
clk_get_rate()to find out what rate it is.I thought about that but I'm not familiar with it. I can try to figure it out quickly and test that approach; don't see any reason it shouldn't work. Would you insist on having full support for enabling/disabling the clk when it's in use, or would you be happy with treating it as a fixed clock that's always-on for now and possibly extending it with more functionality later if there's ever hardware where that's relevant/helpful?
Quoted 3 lines
It's fine to just enable it at startup and leave it on, though the runtime PM ops are trivial and you can set
auto_runtime_pmto have the core do the gets and puts.I was able to get it working via the clk api and I'll include support for this in the next version of the patch, but to actually use it depends on changing
arch/shto use the common clk framework; otherwise there's no way to provide a suitable clk in the DT and have [devm_]clk_get actually pick it up. Should I keep around the option of using clock-frequency too? That would be most convenient.
Quoted 4 lines
I do have a pending patch from Sato-san to switch
arch/shover to CCF but it's part of a series and I don't think it's ready to merge. I may be able to merge just a minimal, safe subset that won't break legacy non-DT configurations, though.
I think you can use non-CCF clocks with DT, if you register them first. Cfr. the clk_names[] array and shmobile_clk_workaround() function in v3.18:arch/arm/mach-shmobile/board-koelsch-reference.c and v3.18:arch/arm/mach-shmobile/clock.c
Or was that the other way around?
Gr{oetje,eeting}s,
Geert
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Rich Felker
maintainerRe: [PATCH v4 2/2] spi: add driver for J-Core SPI controller
Quoted 33 lines · Geert Uytterhoeven
Hi Rich,
Quoted 25 lines · Rich Felker
Quoted 13 lines · Mark Brown
Quoted 11 lines · Rich Felker
Quoted 2 lines · Mark Brown
Why are you not using the clock API for this? Just require a clock and use
clk_get_rate()to find out what rate it is.I thought about that but I'm not familiar with it. I can try to figure it out quickly and test that approach; don't see any reason it shouldn't work. Would you insist on having full support for enabling/disabling the clk when it's in use, or would you be happy with treating it as a fixed clock that's always-on for now and possibly extending it with more functionality later if there's ever hardware where that's relevant/helpful?
Quoted 3 lines
It's fine to just enable it at startup and leave it on, though the runtime PM ops are trivial and you can set
auto_runtime_pmto have the core do the gets and puts.I was able to get it working via the clk api and I'll include support for this in the next version of the patch, but to actually use it depends on changing
arch/shto use the common clk framework; otherwise there's no way to provide a suitable clk in the DT and have [devm_]clk_get actually pick it up. Should I keep around the option of using clock-frequency too? That would be most convenient.Quoted 4 lines
I do have a pending patch from Sato-san to switch
arch/shover to CCF but it's part of a series and I don't think it's ready to merge. I may be able to merge just a minimal, safe subset that won't break legacy non-DT configurations, though.
Quoted 6 lines
I think you can use non-CCF clocks with DT, if you register them first. Cfr. the clk_names[] array and
shmobile_clk_workaround()function in v3.18:arch/arm/mach-shmobile/board-koelsch-reference.c and v3.18:arch/arm/mach-shmobile/clock.cOr was that the other way around?
You can, but they will only be registered if a board file or equivalent registers them. The intent is not to have any board files for boards supported through device tree and eventually to remove all the board files from arch/sh.
Rich