x86/devicetree: Enable multiprocessing
Subsystems (2)
v7 cover x86/devicetree: Enable multiprocessing
Current x86 implementation of Device Tree does not support multiprocessing, and the bindings documentation describes the "reg" property as CPU number instead of hardware-assigned local APIC ID.
v7:
* Change log update
v6:
* Calling of_property_read_u32() to get Local APIC ID from "reg"
* DT documentation changes: corrected CPU node example and changed the "reg" property description
v5:
* Using the "reg" property to specify Local APIC ID
Ivan Gorinov (2):
of: Documentation: Specify local APIC ID in "reg" x86/devicetree: Use CPU description from Device Tree
Documentation/devicetree/bindings/x86/ce4100.txt | 37 ++++++++++++++++------ arch/x86/kernel/devicetree.c | 39 +++++++++++++++++------- 2 files changed, 56 insertions(+), 20 deletions(-)
Signature · 1 line
2.7.4
PATCH v7 1/2 of: Documentation: Specify local APIC ID in "reg"
Use the "reg" property to specify the processor's local APIC ID instead of setting it to the "cpu" node index in Device Tree.
Local APIC ID is assigned by hardware and visible in the APIC ID register. Some processor models allow APIC ID to be changed by software, but CPUID instruction executed with %eax = 0x0b always returns the initial ID in %edx.
Local APIC ID does not match the DT "cpu" node index in many systems.
--- Documentation/devicetree/bindings/x86/ce4100.txt | 37 ++++++++++++++++++------ 1 file changed, 28 insertions(+), 9 deletions(-)
Documentation/devicetree/bindings/x86/ce4100.txt +28 -9
@@ -7,17 +7,36 @@ Many of the "generic" devices like HPET or IO APIC have the ce4100 name in their compatible property because they first appeared in this SoC. -The CPU node ------------- - cpu@0 { - device_type = "cpu"; - compatible = "intel,ce4100"; - reg = <0>; - lapic = <&lapic0>; +The CPU nodes +------------- + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0x00 { + device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x00>; + }; + + cpu@0x02 { + device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x02>; + }; }; -The reg property describes the CPU number. The lapic property points to -the local APIC timer. +A "cpu" node describes one logical processor (hardware thread). + +Required properties: + +- device_type + Device type, must be "cpu". + +- reg + Local APIC ID, the unique number assigned to each processor by + system hardware. The SoC node ------------
Signature · 1 line
2.7.4
PATCH v7 2/2 x86/devicetree: Use CPU description from Device Tree
In reply to Ivan GorinovCurrent x86 Device Tree implementation does not support multiprocessing. Use new DT bindings to describe the processors.
--- arch/x86/kernel/devicetree.c | 39 ++++++++++++++++++++++++++++----------- 1 file changed, 28 insertions(+), 11 deletions(-)
arch/x86/kernel/devicetree.c +28 -11
@@ -130,31 +130,46 @@ static void __init dtb_setup_hpet(void)#endif } +static void __init dtb_cpu_setup (void ) +{ +struct device_node *dn; +u32 apic_id, version; +int ret; + + version =GET_APIC_VERSION (apic_read (APIC_LVR )); +for_each_node_by_type (dn,"cpu" ) { + ret =of_property_read_u32 (dn,"reg" , &apic_id); +if (ret <0 ) { +pr_warn ("%pOF: missing local APIC ID\n" , dn); +continue ; + } +generic_processor_info (apic_id, version); + } +} +static void __init dtb_lapic_setup (void ) {#ifdef CONFIG_X86_LOCAL_APIC struct device_node *dn;struct resource r; +unsigned long lapic_addr =APIC_DEFAULT_PHYS_BASE ;int ret; dn =of_find_compatible_node (NULL ,NULL ,"intel,ce4100-lapic" ); -if (!dn) -return ; - - ret =of_address_to_resource (dn,0 , &r); -if (WARN_ON (ret)) -return ; +if (dn) { + ret =of_address_to_resource (dn,0 , &r); +if (WARN_ON (ret)) +return ; + lapic_addr = r.start; + }/* Did the boot loader setup the local APIC ? */ if (!boot_cpu_has (X86_FEATURE_APIC )) { -if (apic_force_enable (r.start)) +if (apic_force_enable (lapic_addr))return ; } - smp_found_config =1 ; pic_mode =1 ; -register_lapic_address (r.start); -generic_processor_info (boot_cpu_physical_apicid, -GET_APIC_VERSION (apic_read (APIC_LVR ))); +register_lapic_address (lapic_addr);#endif }
@@ -256,6 +271,7 @@ static void __init dtb_ioapic_setup(void) {}static void __init dtb_apic_setup (void ) {dtb_lapic_setup (); +dtb_cpu_setup ();dtb_ioapic_setup (); }
@@ -292,6 +308,7 @@ void __init x86_dtb_init(void)if (!of_have_populated_dt ())return ; + smp_found_config =1 ;dtb_setup_hpet ();dtb_apic_setup (); }
Signature · 1 line
2.7.4
Re: [PATCH v7 2/2] x86/devicetree: Use CPU description from Device Tree
Quoted 2 lines · Ivan Gorinov
Current x86 Device Tree implementation does not support multiprocessing. Use new DT bindings to describe the processors.
Neither changelog, nor the code doesn't reflect how you mitigate the issue kbuild bot reported about.
Care to address?
Quoted 3 lines
+ smp_found_config = 1;
dtb_setup_hpet();
dtb_apic_setup();Signature · 2 lines
With Best Regards, Andy Shevchenko